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Passing data between different banks requires use of the register at $ 1 which selects the banks to be read from and written to via LDA (zero page), Y and STA (zero page), Y CPU opcodes. The register at $ 0 selects the bank where the CPU fetches instructions from, which will default to 15 ($ F) on
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39:. While numerous 6502-based processors can perform bank switching, they achieve this via separate logic. The 6509 has this logic on-
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The 6509 has a reputation for being difficult to program, due to its bank switching scheme. It is used in the
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80:MOS 6509 datasheet (GIF format, zipped)
20:, an enhanced version of the popular
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159:(and 6510T, 6512, 6513, 6514, 6515)
27:, is capable of addressing up to 1
336:. You can help Knowledge (XXG) by
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85:MOS 6509 datasheet (PDF format)
388:MOS Technology microprocessors
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242:Interrupts in 65xx processors
138:(and 6501, 6503, 6504, 6505)
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332:-related article is a
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54:line of computers.
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235:Architecture
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377:Categories
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272:Ricoh 2A03
226:740 family
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171:(and 4510)
67:See also:
58:References
47:power up.
286:Designers
255:machines
29:megabyte
218:Renesas
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193:65C134
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129:, CSG
334:stub
253:game
251:For
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136:6502
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