1439:
The question of treatment of "N" (immediate) flag in presence of I (indirect) flag is open as the situation is somewhat ambiguousāthat is, whether or not to honour the flag value specified in the original instruction or the one in the indirectly specified (looked up) address leads to a conflict. The
1391:
addressing mode. The location is first chosen by "looking" at P (indexed) and R (relative to program counter) flags. Then, if I (indirect) flag is detected, a 32-bit word is loaded from the memory location calculated so far and the calculation is restarted (including all addressing mode flags, index
1448:
NAR 2 has instructions to initialize the value of particular index register ("PIR" mnemonic). However, it does not have special instructions to read values index registers. This is achieved by using indexed and immediate (P, N) addressing mode flags, such as:
384:
Fixed point) arithmetic. However, this is only true for addition, subtraction and negation (sign change). Multiplication and division assume that the "point" is fixed to the right of least significant bit - that is that the numbers are
1006:
With four address mode selection bits (P, R, I and N - indexed, relative, indirect and immediate), NAR 2 instructions can specify 16 different addressing modes but not all make sense in all instructions. In the following table:
1379:
Note 1: "N" (immediate) flag has no effect on jump (flow control) instructions, as the processor can not jump into a specified value, but only to a memory address.
944:
The NAR 2 assembly language syntax was designed to be straightforward and easy to parse. Each program line may contain up to one instruction specified as follows:
1517:
1751:
1737:
1392:
register selection and parameter value - only the "opcode" is omitted). Thus, the following program, if loaded at memory location 0 and executed:
1732:
1458:... which essentially puts Xi+n into accumulator. For n=0, this turns into a "load index register value into accumulator" instruction.
181:(note: the address is loaded from specified location and, should it also specify "I" flag the indirect address calculation continues)
909:
Zero Jump) performs a conditional jump to the address specified by the parameter if the current value of the accumulator is zero
1510:
756:
but they can be explained as if they operate on vectors of bits and separately apply logical operations on each pair of bits.
1436:
seems more generic (could freeze NAR 2 from any location), but this depends on when BN register value is incremented/changed.
1777:
97:
1746:
1756:
1503:
951:
Whitespace, if instruction specifies any index registers, addressing mode or a parameter and then comma-separated:
261:
are specifiable, X0 to X15. However, X0 was never used, possibly because it was reserved as program counter (BN)
1742:
247:
90:
251:
45:
935:
Stop the
Computer) stops any further processing; this is the only instruction that ignores the parameter.
57:
1571:
108:
679:
753:
1485:
53:
1556:
853:
to the address specified by the parameter if the current value of the accumulator is negative
1489:
1440:
table above presents the first case to show different addressing modes achievable this way.
932:
916:
906:
890:
880:
876:
860:
850:
846:
830:
813:
797:
787:
771:
734:
722:
705:
693:
676:
664:
647:
627:
617:
605:
595:
583:
573:
561:
551:
539:
522:
498:
488:
472:
462:
446:
436:
420:
410:
394:
381:
367:
347:
337:
318:
308:
289:
265:
237:
226:
189:
171:
157:
143:
136:
125:
94:
69:
65:
34:
23:
1566:
1388:
218:
178:
525:
Change the Sign of
Accumuator, Fixed Point) - Changes (flips) the sign of the accumulator
68:. Many NAR 2 simulators have been created — for instance, one was named "Å ljiva" (
1631:
1576:
1023:
f() is the "effective value" function used for indirect addressing (see details below):
258:
115:
1771:
760:
1488:- Examples of student assignments for "ORS" course (Basics of Computer Systems), in
276:
Following opcodes were available (actual codes were not specified, only mnemonics):
1647:
122:
380:
Note: all mnemonics in this group end with letter "F" indicating "Fiksni zarez" (
1581:
741:
708:
683:
61:
1495:
1433:
R, I, 0 ; Memory-Into-Accumulator, Relative, Indirect, from location BN+0
1417:"I, 0" specifies that the actual address is to be loaded from memory location 0
1411:"I, 0" specifies that the actual address is to be loaded from memory location 0
1405:"I, 0" specifies that the actual address is to be loaded from memory location 0
715:
with the parameter and the accumulator and stores the result in the accumulator
686:
with the parameter and the accumulator and stores the result in the accumulator
712:
650:
Change the Sign of
Accumuator) - Changes (flips) the sign of the accumulator
1611:
1606:
1601:
1596:
1591:
737:
1694:
1687:
1682:
1677:
1561:
1551:
1546:
1541:
749:
1672:
1667:
1662:
1657:
1652:
1626:
1616:
1586:
1527:
465:
Multiply, Fixed Point) - Multiples the accumulator with the parameter
439:
Subtract, Fixed Point) - subtracts the parameter from the accumulator
104:
78:
48:
professor
Nedeljko ParezanoviÄ as an enhancement to its predecessor,
1492:. Task "V1: NAR" requires the student to write a simulator of NAR 2.
1475:, another processor designed by a professor to help students learn.
1710:
1621:
1467:
1455:
Xi, P, N, n ; Memory-Into-Accumulator, Indexed, Immediate, 0
49:
1472:
73:
1499:
1401:... will freeze NAR 2 in an infinite address calculation loop:
1398:
I, 0 ; Memory-Into-Accumulator, Indirect, from location 0
491:
Divide, Fixed Point) - Divides the accumulator by the parameter
816:
Shift Right) - shifts the bits of the accumulator to the right
340:
Accumulator Into Memory) stores the content of the accumulator
41:
1020:
Xi specifies the index register selected by data at location
790:
Shift Left) - shifts the bits of the accumulator to the left
370:
Load Index
Register) Loads the value into the index register
1011:
M specifies the 32-bit value (content) of memory location x
16:
32-bit RISC architecture developed by
Nedeljko ParezanoviÄ
744:
on the content of the accumulator (ignores the parameter)
311:
Memory Into
Accumulator) loads the value into accumulator
598:
Multiply) - Multiples the accumulator with the parameter
576:
Subtract) - subtracts the parameter from the accumulator
957:
Names of addressing mode flags (also comma separated)
413:
Add, Fixed Point) - adds parameter to the accumulator
1724:
1703:
1640:
1534:
1017:
p specifies the 16-bit signed parameter at location
44:word computer created by Faculty of Mathematics of
1420:Memory location 0 is loaded. It reads "I, 0" again
1414:Memory location 0 is loaded. It reads "I, 0" again
1408:Memory location 0 is loaded. It reads "I, 0" again
620:Divide) - Divides the accumulator by the parameter
1511:
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8:
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1504:
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883:to the address specified by the parameter
752:. Their names imply that they are purely
1026:
554:Add) - adds parameter to the accumulator
250:that can be treated either as integer (
163:elativno) - relative to program counter
7:
118:to use with indexed addressing modes
1486:Primeri seminarskih zadataka iz ORS
1444:Reading values from Index Registers
40:2) is a theoretical model of a 32-
14:
940:Standard assembly language syntax
254:) or real (floating point) number
114:4 bits (20 to 23) specifying the
93:uses 32-bit machine words. Each
1014:BN specifies the program counter
879:Unconditional Jump) performs an
954:Name of index register, if used
748:Note: above operations are all
60:courses. The word "nar" means
1:
1745:and history of computing in:
121:4 bits (16 to 19) containing
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1389:multi-level memory indirect
1383:Multi-level memory indirect
179:multi-level memory indirect
1794:
849:Negative Jump) performs a
213:NAR 2 has four registers:
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530:Floating point arithmetic
502:
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450:
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398:
351:
322:
293:
77:) as that fruit grows in
81:, while "nar" does not.
266:flags or flag registers
241:Counter of Instructions
91:central processing unit
1526:Computer systems from
280:Memory/register access
195:eposredno) - immediate
46:University of Belgrade
1778:Models of computation
109:most significant bits
85:Instruction structure
58:Computer architecture
948:Instruction mnemonic
38:Educational Computer
52:. It was used for
881:unconditional jump
754:logical operations
375:Integer arithmetic
1765:
1764:
1752:former Yugoslavia
1738:former Yugoslavia
1377:
1376:
1033:Instruction type
54:Assembly language
1785:
1731:Full lists from
1520:
1513:
1506:
1497:
1490:Serbian language
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1002:Addressing modes
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851:conditional jump
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1641:1960‑1979
1636:
1567:ATLAS-TIM AT 32
1535:1980‑2000
1530:
1524:
1482:
1464:
1446:
1387:NAR 2 supports
1385:
1004:
999:
960:Parameter value
942:
823:
764:
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655:Bitwise/logical
532:
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282:
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259:Index registers
219:Program counter
211:
204:parameter value
111:(bits 24 to 31)
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1577:Galaksija Plus
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1480:External links
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990:X1, p, n, 0
986:X1, p, n, 1
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941:
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761:Logical shifts
758:
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246:Single 32-bit
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116:Index register
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1648:CER Computers
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743:
740:) - performs
739:
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729:
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518:iksnom zarezu
517:
514:kumulatora u
513:
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484:iksnom zarezu
483:
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177:ndirektno) -
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1030:Addr. flags
1005:
998:X2, p, n, 0
995:
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987:
983:
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967:Sample code:
966:
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943:
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88:
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18:
1704:Theoretical
1582:Hobby ZR-84
1427:Note that:
974:X1, p, 0
742:logical NOT
709:Disjunction
684:logical AND
680:Conjunction
252:fixed point
248:accumulator
149:) - indexed
98:instruction
62:Pomegranate
713:logical OR
643:kumulatora
326:kumulator
100:contains:
89:The NAR 2
33:aÄunar 2,
1572:Galaksija
868:zuslovni
359:ndeksnog
304:kumulator
272:Mnemonics
257:Up to 16
209:Registers
142:osredno,
1772:Category
1725:See also
1612:Lira 386
1602:Lira 512
1597:Pecom 64
1592:Pecom 32
1462:See also
1333:BN+Xi+p
1330:BN+Xi+p
1313:BN+Xi+p
838:gativni
738:Negation
701:junkcija
672:junkcija
385:integer.
355:unjenje
297:emorija
236:aredbi,
184:bit 16:
166:bit 17:
152:bit 18:
147:mediated
131:bit 19:
1695:HRS-100
1688:CER-203
1683:CER-202
1678:CER-200
1607:Lira AT
1562:TIM-600
1557:TIM-030
1552:TIM-011
1547:TIM-001
1542:TIM-100
994:n, 1
978:n, 1
924:ustavi
750:bitwise
635:romeni
506:romeni
363:egistra
333:emoriju
221:called
200:16 bit
95:Machine
66:Serbian
29:stavni
24:Serbian
1747:Serbia
1733:Serbia
1673:CER-22
1668:CER-20
1663:CER-12
1658:CER-11
1653:CER-10
1627:LPA512
1617:Lola 8
1587:ET-188
1528:Serbia
928:aÄunar
428:zmi u
402:eri u
232:rojaÄ
202:signed
105:opcode
79:Serbia
1757:World
1743:World
1716:NAR 2
1711:NAR 1
1622:PA512
1468:NAR 1
1373:f(M)
1370:f(M)
1353:f(M)
1293:f(M)
1290:f(M)
1273:f(M)
1253:Xi+p
1250:Xi+p
1233:Xi+p
1213:f(M)
1210:f(M)
1193:f(M)
1173:BN+p
1170:BN+p
1153:BN+p
1133:f(M)
1130:f(M)
1113:f(M)
1053:Jump
1050:Data
982:15
805:meri
779:meri
730:acija
454:ži u
126:flags
107:in 8
50:NAR 1
20:NAR 2
1473:MMIX
1350:M)]
1270:M)]
1190:M)]
1110:M)]
996:oduf
992:oduf
809:esno
639:nak
510:nak
495:PZAF
480:i u
469:DELF
443:MNOF
417:ODUF
391:SABF
74:plum
56:and
1632:Vuk
1453:mua
1431:mua
1423:...
1396:mua
988:mua
984:pir
980:aum
976:mua
972:aum
933:en.
917:sr.
913:ZAR
907:en.
902:kok
898:la-
891:sr.
887:NUS
877:en.
872:kok
861:sr.
857:BES
847:en.
842:kok
831:sr.
827:NES
814:en.
798:sr.
794:POD
788:en.
783:evo
772:sr.
768:POL
735:en.
728:Neg
723:sr.
719:NEG
706:en.
699:Dis
694:sr.
690:DIS
677:en.
670:Kon
665:sr.
661:KON
648:en.
628:sr.
624:PZA
618:en.
611:Del
606:sr.
602:DEL
596:en.
589:Mno
584:sr.
580:MNO
574:en.
569:zmi
567:Odu
562:sr.
558:ODU
552:en.
547:eri
545:Sab
540:sr.
536:SAB
523:en.
499:sr.
489:en.
478:Del
473:sr.
463:en.
452:Mno
447:sr.
437:en.
426:Odu
421:sr.
411:en.
400:Sab
395:sr.
382:en.
368:en.
348:sr.
344:PIR
338:en.
319:sr.
315:AUM
309:en.
290:sr.
286:MUA
238:en.
227:sr.
190:sr.
172:sr.
158:sr.
144:en.
137:sr.
70:en.
64:in
42:bit
35:en.
1774::
1364:I
1361:R
1344:I
1341:R
1321:R
1310:M
1301:R
1284:I
1264:I
1230:M
1204:I
1201:R
1184:I
1181:R
1161:R
1150:M
1141:R
1124:I
1104:I
1093:p
1090:p
1073:p
1070:M
1047:N
1044:I
1041:R
1038:P
931:,
922:Za
905:,
896:Nu
875:,
866:Be
845:,
836:Ne
812:,
803:Po
786:,
777:Po
733:,
704:,
675:,
646:,
616:,
594:,
591:ži
572:,
550:,
521:,
487:,
461:,
435:,
409:,
366:,
336:,
307:,
223:BN
217:a
128::
27:Na
1519:e
1512:t
1505:v
1367:N
1358:P
1338:P
1327:N
1318:P
1298:P
1287:N
1278:P
1258:P
1247:N
1238:P
1218:P
1207:N
1167:N
1127:N
1087:N
926:R
915:(
900:S
889:(
870:S
859:(
840:S
829:(
807:D
796:(
781:L
770:(
721:(
692:(
663:(
641:A
637:Z
633:P
626:(
613:i
604:(
582:(
560:(
538:(
516:F
512:A
508:Z
504:P
497:(
482:F
471:(
456:F
445:(
430:F
419:(
404:F
393:(
361:R
357:I
353:P
346:(
331:M
328:U
324:A
317:(
302:A
299:U
295:M
288:(
243:)
234:N
230:B
225:(
193:N
188:(
186:N
175:I
170:(
168:I
161:R
156:(
154:R
140:P
135:(
133:P
31:R
22:(
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