1250:
181:). A given sequence of arithmetic operations may thus behave slightly differently compared to a strict single-precision or double-precision IEEE 754 FPU. As this may sometimes be problematic for some semi-numerical calculations written to assume double precision for correct operation, to avoid such problems, the x87 can be configured using a special configuration/status register to automatically round to single or double precision after each operation. Since the introduction of
1375:
1407:
1278:
1226:
1306:. This device was tested which includes temperature cycling between -55 and 125 °C, hermeticity sealed and extended burn-in. This military version operates at 16 MHz. This military version was available in 68-lead PGA and quad flatpack. This military version was available for USD $ 1155 in 100-unit of quantities for the PGA version. The 33 MHz version of 387DX was available and it has the performance of 3.4
1262:
1238:
1363:
1351:
1395:
1339:
1423:
1136:
829:
The 5 MHz 8087 was the original x87 processor. Compared to typical software-implemented floating-point routines on an 8086 (without an 8087), the factors would be even larger, perhaps by another factor of 10 (i.e., a correct floating-point addition in assembly language may well consume over 1000
1210:
Later followed the i80287XL with 387SX microarchitecture with a 287 pinout, the i80287XLT, a special version intended for laptops, as well as other variants. It contains an internal 3/2 multiplier, so that motherboards that ran the coprocessor at 2/3 CPU speed could instead run the FPU at the same
1301:
standard. Released in 1987, two years after the 386 chip, the i387 includes much improved speed over Intel's previous 8087/80287 coprocessors and improved characteristics of its trigonometric functions. It was made available for USD $ 500 in quantities of 100. Shortly afterwards, it was made
218:
notation (minimum to maximum) covers timing variations dependent on transient pipeline status and the arithmetic precision chosen (32, 64 or 80 bits); it also includes variations due to numerical cases (such as the number of set bits, zero, etc.). The L → H notation depicts values
1310:. The following boxed version of 16-, 20-, 25-, and 33-MHz 387DX math coprocessor were available for USD $ 570, $ 647, $ 814, and $ 994 respectfully. The 8087 and 80287's FPTAN and FPATAN instructions are limited to an argument in the range ±π/4 (±45°), and the 8087 and 80287 have no
1198:
in quantities of 100. These boxed version of 80287, 80287-8, and 80287-10 were available for USD $ 212, $ 326, and $ 374 respectively. There was boxed version of 80C287A available for USD $ 457. Other 287 models with 387-like performance are the Intel 80C287, built using
165:
that schedule x87 code effectively. Such a stack-based interface potentially can minimize the need to save scratch variables in function calls compared with a register-based interface (although, historically, design issues in the 8087 implementation limited that potential.)
1194:. Intel's models included variants with specified upper frequency limits ranging from 6 up to 12 MHz. The NMOS version were available 6, 8 and 10 MHz. The available 10 MHz Intel 80287-10 Numerics Coprocessor version was for 250
1218:
microprocessor and was initially the only coprocessor available for the 80386 until the introduction of the 80387 in 1987. However, the 80387 is strongly preferred for its higher performance and the greater capability of its instruction set.
1449:
implementation. When installed into an i486SX system, the i487 disabled the main CPU and took over all CPU operations. The i487 took measures to detect the presence of an i486SX and would not function without the original CPU in place.
60:
routines can. The x87 instruction set includes instructions for basic floating-point operations such as addition, subtraction and comparison, but also for more complex numerical operations, such as the computation of the
1302:
available through Intel's
Personal Computer Enhancement Operation for a retail market price of USD $ 795. The 25 MHz version was available in retail channel for USD $ 1395. The Intel M387 math coprocessor met under
92:
structure ranging from ST(0) to ST(7) with registers that can be directly accessed by either operand, using an offset relative to the top, as well as pushed and popped. (This scheme may be compared to how a
1321:. When a math coprocessor is paired with the 386, the coprocessor performs the floating-point arithmetic in hardware, returning results much faster than an (emulating) software library call.
72:
have had these x87 instructions implemented in the main CPU, but the term is sometimes still used to refer to that part of the instruction set. Before x87 instructions were standard in PCs,
141:
These properties make the x87 stack usable as seven freely addressable registers plus a dedicated accumulator (or as seven independent accumulators). This is especially applicable on
1629:
1789:
Intel
Corporation, "New Product Focus Component: A 32-Bit Microprocessor With A Little Help From Some Friends", Special 32-Bit Issue Solutions, November/December 1985, page 13.
3007:
2824:
3110:
3012:
3205:
3022:
1986:
1317:
Without a coprocessor, the 386 normally performs floating-point arithmetic through (relatively slow) software routines, implemented at runtime through a software
3027:
3017:
3002:
2829:
1162:
math coprocessor. The 80C187 interface to the main processor is the same as that of the 8087, but its core is essentially that of an 80387SX and is thus fully
185:, the x87 instructions are not as essential as they once were, but remain important as a high-precision scalar unit for numerical calculations sensitive to
2819:
108:(FADD, FMUL, FCOM, etc.) implicitly address ST(0) and ST(1). The non-strict stack model also allows binary operations to use ST(0) together with a direct
2032:
1818:
Yoshida, Stacy, "Math
Coprocessors: Keeping Your Computer Up for the Count", Intel Corporation, Microcomputer Solutions, September/October 1990, page 16
1780:
Yoshida, Stacy, "Math
Coprocessors: Keeping Your Computer Up for the Count", Intel Corporation, Microcomputer Solutions, September/October 1990, page 16
1533:
companies design a chip and rely on a fabbed company to manufacture it, while fabbed companies can do both the design and the manufacture by themselves.
126:(a combined destination and left operand). This can also be reversed on an instruction-by-instruction basis with ST(0) as the unmodified operand and ST(
52:). Like other extensions to the basic instruction set, x87 instructions are not strictly needed to construct working programs, but provide hardware and
177:
standard. By default, the x87 processors all use 80-bit double-extended precision internally (to allow sustained precision over many calculations, see
3055:
1374:
1324:
The i387 is compatible only with the standard i386 chip, which has a 32-bit processor bus. The later cost-reduced i386SX, which has a narrower 16-bit
1127:
floating-point processors, marketed for use with the i8080 CPU, were in fact licensed versions of AMD's Am9511 and Am9512 FPUs from 1977 and 1979.)
1799:
Intel
Corporation, "Personal Computer Enhancement", Personal Computer Enhancement Operation, Order No. 245.2, 10-89/75K/AL/GO, October 1989, page 4
3115:
1895:
Intel
Corporation, "Focus: Components: Militarized Peripherals Support M386 Microprocessor", Microcomputer Solutions, March/April 1989, page 12
1809:
Intel
Corporation, "New Product Focus: Systems: SnapIn 386 Module Upgrades PS/2 PCs", Microcomputer Solutions, September/October 1991, page 12
1726:
2176:
2161:
2085:
2075:
2005:
1948:
1914:
Intel
Corporation, "Personal Computer Enhancement", Personal Computer Enhancement Operation, Order No. 245.2, 10-89/75K/AL/GO, October 1989
2080:
2100:
2095:
2090:
1886:
Intel
Corporation, "NewsBits: 25 MHZ 80387 Available Through Retail Channels", Microcomputer Solutions, September/October 1988, page 1
1584:
1555:
1211:
speed of the CPU. Both 80287XL and 80287XLT offered 50% better performance, 83% less power consumption, and additional instructions.
76:
or programmers had to use rather slow library calls to perform floating-point operations, a method that is still common in (low-cost)
961:
3065:
3045:
2308:
2154:
2132:
2127:
2122:
2117:
2070:
2065:
2990:
2137:
2112:
2303:
2272:
2243:
2025:
48:
that work in tandem with corresponding x86 CPUs. These microchips have names ending in "87". This is also known as the NPX (
1933:
Lewnes, Ann, "The Intel386 Architecture Here to Stay", Intel
Corporation, Microcomputer Solutions, July/August 1989, page 2
1904:
Lewnes, Ann, "The Intel386 Architecture Here to Stay", Intel Corporation, Microcomputer Solutions, July/August 1989, page 2
2874:
2731:
2375:
2284:
2144:
2107:
2060:
1609:
1332:, which is compatible with the SX's narrower 16-bit data bus. Intel released the low power version of 387SX coprocessor.
840:
Companies that have designed or manufactured floating-point units compatible with the Intel 8087 or later models include
3172:
2346:
2296:
2260:
1249:
941:
558:
146:
1225:
2370:
2341:
2333:
2291:
2279:
2255:
134:. Furthermore, the contents in ST(0) can be exchanged with another stack register using an instruction called FXCH ST(
1406:
2248:
1501:
162:
89:
3195:
3125:
2018:
1480:
1147:
based) 80188 and 80186 seem to mention specific math coprocessors, both chips were actually paired with an 8087.
2055:
2041:
56:
implementations of common numerical tasks, allowing these tasks to be performed much faster than corresponding
207:
Clock cycle counts for examples of typical x87 FPU instructions (only register-register versions shown here).
3215:
3200:
3167:
3142:
2736:
123:
62:
1237:
3157:
2213:
2203:
2198:
2166:
1683:
977:
877:
1673:
Numbers are taken from respective processors' data sheets, programming manuals, and optimization manuals.
3210:
3147:
2869:
1475:
1307:
1261:
2479:
1394:
917:
196:
3105:
1710:
2595:
1435:
1005:
219:
corresponding to the lowest (L) and the highest (H) maximal clock frequencies that were available.
44:. It originated as an extension of the 8086 instruction set in the form of optional floating-point
3152:
2767:
1734:
1656:
1638:
1318:
170:
2918:
2802:
2772:
1839:
1017:
158:
1362:
1350:
1328:, can not interface with the i387's 32-bit bus. The i386SX requires its own coprocessor, the
2855:
2653:
2547:
2402:
2234:
2189:
1829:
1648:
1045:
38:
1591:
1566:
1462:
was the last FPU for x86 to be manufactured separately from the CPU, in this case NexGen's
1277:
153:) are optimized down to a zero clock penalty by using one of the integer paths for FXCH ST(
2510:
2483:
1325:
1124:
997:
186:
105:
101:
77:
41:
1988:
Intel 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture
1563:
Unpublished course notes, Computer Science Division, University of California at Berkeley
1338:
3050:
2714:
1381:
1191:
157:) in parallel with the FPU instruction. Despite being natural and convenient for human
34:
3189:
2677:
2667:
2626:
2363:
1756:
1660:
1624:
1442:
1298:
1163:
174:
161:
programmers, some compiler writers have found it complicated to construct automatic
2930:
2616:
2267:
57:
1962:
2836:
2787:
2777:
2672:
2639:
2634:
2621:
2580:
2574:
2568:
2320:
2315:
2149:
1438:
1303:
1187:
1183:
1155:
1108:
612:
193:
142:
100:
There are instructions to push, calculate, and pop values on top of this stack;
94:
69:
45:
3075:
3070:
2985:
2980:
2975:
2970:
2965:
2960:
2955:
2950:
2945:
2940:
2935:
2925:
2864:
2809:
2782:
2726:
2607:
2562:
2556:
2531:
2525:
2519:
2498:
2492:
2451:
2446:
2441:
2436:
2431:
2426:
2411:
2351:
1857:"New Product Focus Components: The 32-Bit Computing Engine Full Speed Ahead".
1422:
1144:
1135:
1120:
1116:
1098:
662:
447:
1843:
824:* An effective zero clock delay is often possible, via superscalar execution.
3135:
3120:
3080:
2913:
2908:
2903:
2797:
2792:
2699:
2694:
2208:
1913:
1834:
1798:
1652:
1025:
776:
756:
451:
53:
3130:
2709:
2358:
2220:
178:
73:
1166:-compliant and capable of executing all the 80387's extra instructions.
27:
Subset of x86 instruction set architecture for floating-point arithmetic
3162:
3060:
2898:
2891:
2886:
2881:
2841:
2762:
2754:
2749:
2743:
2721:
2421:
2416:
1530:
1329:
945:
909:
149:
of 1993 and later), where these exchange instructions (codes D9C8..D9CF
110:
3085:
2851:
2704:
2689:
2398:
2230:
1506:
1385:
1061:
989:
709:
504:
260:
190:
104:(FSQRT, FPTAN etc.) then implicitly address the topmost ST(0), while
2010:
1943:
1643:
17:
2649:
2185:
1585:"How Intel 8087 stack overflow/underflow should have been handled"
1492:
1463:
1446:
1276:
1215:
1200:
1134:
1112:
885:
393:
2997:
2814:
2684:
2662:
2458:
1511:
1496:
1488:
1484:
1297:) is the first Intel coprocessor to be fully compliant with the
1204:
1151:
1037:
182:
2014:
169:
The x87 provides single-precision, double-precision and 80-bit
2543:
2330:
1195:
929:
841:
2006:
Everything you always wanted to know about math coprocessors
1872:"NewsBit: Intel 80387 Available Through Retail Channels".
1830:"Chips to Improve Performance Of 386 Machines, Intel Says"
1625:"The pitfalls of verifying floating-point computations"
1715:. pp. 3-25 (iAPX 186/20) and 3-106 (iAPX 188/20).
88:
The x87 registers form an eight-level deep non-strict
1630:
ACM Transactions on Programming Languages and Systems
3098:
3038:
2850:
2648:
2590:
2541:
2508:
2478:
2471:
2397:
2390:
2329:
2229:
2184:
2175:
2048:
199:and extended range available in the 80-bit format.
1712:Intel Microprocessor & Peripherals Handbook
1203:III, and the AMD 80EC287 manufactured in AMD's
1143:Although the original 1982 datasheet for the (
2026:
1445:machines. It actually contained a full-blown
1150:However, in 1987, to work with the refreshed
8:
1314:instructions for the SIN and COS functions.
173:binary floating-point arithmetic as per the
2475:
2394:
2181:
2033:
2019:
2011:
1876:. Intel Corporation: 1. July–August 1987.
1642:
1421:
1207:process, using only fully static gates.
221:
97:may be both pushed/popped and indexed.)
3111:Process–architecture–optimization model
1861:. Intel Corporation: 10. May–June 1987.
1546:
1523:
1334:
1221:
65:function and its inverse, for example.
3206:Computer-related introductions in 1980
1924:Borland Turbo Assembler documentation.
1838:. Vol. 9, no. 7. p. 5.
122:), in a role similar to a traditional
1684:"Arithmetic Processors: Then and Now"
1115:. It was built to be paired with the
7:
1949:Free On-line Dictionary of Computing
1610:"A conversation with William Kahan"
1556:"On the advantages of 8087's stack"
1380:i387 microarchitecture with 16-bit
1139:16 MHz version of the Intel 80C187
1123:microprocessors. (Intel's earlier
1111:for 16-bit processors designed by
25:
1554:William Kahan (2 November 1990).
3126:Intel HD, UHD, and Iris Graphics
1757:"80C187 80-BIT MATH COPROCESSOR"
1405:
1393:
1373:
1361:
1349:
1337:
1260:
1248:
1236:
1231:6 MHz version of the Intel 80287
1224:
2214:P6 variant (Enhanced Pentium M)
1727:"CPU Collection – Model 80187"
1608:Jack Woehr (1 November 1997).
68:Most x86 processors since the
1:
1583:William Kahan (8 July 1989).
118:specified stack register, ST(
972:, etc.), LC Technology (the
345:80387 (and later 287 models)
145:x86 processors (such as the
1623:David Monniaux (May 2008).
1304:MIL-STD-883 Rev. C standard
50:Numeric Processor eXtension
3232:
1158:CPU, Intel introduced the
1096:
1828:Moran, Tom (1987-02-16).
1434:(P23N) was marketed as a
1308:megawhetstones per second
1281:Intel 80387 CPU die image
1214:The 80287 works with the
1088:Architectural generations
1084:and other coprocessors).
732:
729:
726:
723:
720:
717:
714:
572:
334:0.041…0.066 → 0.083…0.133
310:0.034…0.055 → 0.100…0.111
296:
293:
290:
287:
284:
281:
278:
275:
179:IEEE 754 design rationale
171:double-extended precision
1653:10.1145/1353445.1353446
382:0.280…0.552 → 0.580…1.1
37:-related subset of the
2209:P6 variant (Pentium M)
1427:
1282:
1140:
978:National Semiconductor
878:Chips and Technologies
1425:
1280:
1138:
507:(including K6 II/III)
268:rel. 5 MHz 8087
1412:Socket for the 80387
1243:Intel 80287 die shot
918:Harris Semiconductor
1690:. 23 September 2010
1572:on 18 January 2017.
1436:floating-point unit
1107:was the first math
1006:ST Microelectronics
768:250…1000 → 800…3200
225:x87 implementation
3008:Sandy Bridge-based
2177:Microarchitectures
2162:Microarchitectures
1428:
1400:i386DX with i387DX
1283:
1141:
1080:), and Xtend (the
1024:processors etc.),
813:186…650 → 543…1900
745:125…500 → 580…2330
189:and requiring the
3181:
3180:
3094:
3093:
2467:
2466:
2386:
2385:
1967:www.cpu-world.com
1319:exception handler
1018:Texas Instruments
831:
825:
820:
819:
159:assembly language
106:binary operations
16:(Redirected from
3223:
3196:X86 architecture
3013:Ivy Bridge-based
2604:8/16-bit databus
2476:
2395:
2391:Current products
2182:
2042:Intel processors
2035:
2028:
2021:
2012:
1995:
1993:
1978:
1977:
1975:
1973:
1959:
1953:
1952:
1940:
1934:
1931:
1925:
1922:
1916:
1911:
1905:
1902:
1896:
1893:
1887:
1884:
1878:
1877:
1869:
1863:
1862:
1854:
1848:
1847:
1825:
1819:
1816:
1810:
1807:
1801:
1796:
1790:
1787:
1781:
1778:
1772:
1771:
1769:
1767:
1761:
1753:
1747:
1746:
1744:
1742:
1733:. Archived from
1723:
1717:
1716:
1706:
1700:
1699:
1697:
1695:
1688:www.cpushack.com
1680:
1674:
1671:
1665:
1664:
1646:
1620:
1614:
1613:
1605:
1599:
1598:
1597:on 12 June 2013.
1596:
1590:. Archived from
1589:
1580:
1574:
1573:
1571:
1565:. Archived from
1560:
1551:
1534:
1528:
1409:
1397:
1377:
1365:
1353:
1341:
1264:
1252:
1240:
1228:
828:
823:
816:~11000 → 34000×
812:
771:~18000 → 58000×
767:
750:
744:
738:
703:
698:47…116 → 280…700
697:
691:
656:
650:
644:
640:
606:
600:
594:
590:
552:
546:
540:
536:
498:
492:
486:
482:
441:
435:
429:
425:
387:
378:
374:
339:
330:
326:
321:80287 (original)
315:
306:
302:
222:
102:unary operations
78:embedded systems
39:x86 architecture
21:
3231:
3230:
3226:
3225:
3224:
3222:
3221:
3220:
3186:
3185:
3182:
3177:
3106:Tick–tock model
3090:
3034:
3023:Broadwell-based
2914:Extreme Edition
2846:
2644:
2586:
2537:
2504:
2463:
2382:
2325:
2225:
2171:
2044:
2039:
2002:
1991:
1985:
1982:
1981:
1971:
1969:
1961:
1960:
1956:
1942:
1941:
1937:
1932:
1928:
1923:
1919:
1912:
1908:
1903:
1899:
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1890:
1885:
1881:
1871:
1870:
1866:
1856:
1855:
1851:
1827:
1826:
1822:
1817:
1813:
1808:
1804:
1797:
1793:
1788:
1784:
1779:
1775:
1765:
1763:
1762:. November 1992
1759:
1755:
1754:
1750:
1740:
1738:
1737:on 23 July 2011
1725:
1724:
1720:
1708:
1707:
1703:
1693:
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1677:
1672:
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1602:
1594:
1587:
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1543:
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1472:
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1413:
1410:
1401:
1398:
1389:
1378:
1369:
1366:
1357:
1354:
1345:
1342:
1275:
1268:
1265:
1256:
1253:
1244:
1241:
1232:
1229:
1192:microprocessors
1172:
1133:
1101:
1095:
1090:
1044:coprocessors),
998:Rise Technology
976:coprocessors),
884:coprocessors),
838:
810:
791:
765:
751:~9000 → 42000×
748:
742:
736:
704:~2100 → 13000×
701:
695:
689:
654:
648:
642:
638:
604:
601:20…60 → 100…300
598:
592:
588:
550:
544:
538:
534:
496:
490:
484:
480:
439:
433:
427:
423:
385:
376:
372:
337:
328:
324:
316:1 → 2× as fast
313:
304:
300:
267:
258:
253:
205:
187:round-off error
163:code generators
152:
86:
42:instruction set
28:
23:
22:
15:
12:
11:
5:
3229:
3227:
3219:
3218:
3216:Stack machines
3213:
3208:
3203:
3201:Floating point
3198:
3188:
3187:
3179:
3178:
3176:
3175:
3170:
3165:
3160:
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3150:
3145:
3140:
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3138:
3133:
3128:
3123:
3113:
3108:
3102:
3100:
3096:
3095:
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3083:
3078:
3073:
3068:
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3053:
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3020:
3015:
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2988:
2983:
2978:
2973:
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1299:IEEE 754-1985
1296:
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1255:Intel 80287XL
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928:processors),
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836:Manufacturers
835:
827:
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561:/ Pentium MMX
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499:~320 → 1400×
495:
493:11…16 → 50…75
489:
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461:
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175:IEEE 754-1985
172:
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55:
51:
47:
43:
40:
36:
32:
19:
3211:Coprocessors
3183:
2591:
2472:Discontinued
2309:Cypress Cove
2268:Sandy Bridge
1987:
1970:. Retrieved
1966:
1957:
1947:
1938:
1929:
1920:
1909:
1900:
1891:
1882:
1873:
1867:
1858:
1852:
1833:
1823:
1814:
1805:
1794:
1785:
1776:
1764:. Retrieved
1751:
1739:. Retrieved
1735:the original
1731:cpu-info.com
1730:
1721:
1711:
1704:
1692:. Retrieved
1687:
1678:
1669:
1634:
1628:
1618:
1603:
1592:the original
1578:
1567:the original
1562:
1549:
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1311:
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1284:
1213:
1209:
1179:
1175:
1173:
1159:
1156:Intel 80C186
1149:
1142:
1104:
1102:
1081:
1077:
1073:
1069:
1065:
1057:
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1049:
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168:
154:
140:
135:
131:
127:
119:
115:
109:
99:
87:
67:
58:machine code
49:
46:coprocessors
30:
29:
2321:Golden Cove
2316:Willow Cove
2297:Cannon Lake
1944:Intel 487SX
1637:(3): 1–41.
1439:coprocessor
1188:Intel 80286
1184:coprocessor
1109:coprocessor
807:1300 → 3800
762:1000 → 3200
613:Pentium Pro
340:1.2 → 2.4×
203:Performance
143:superscalar
132:destination
124:accumulator
114:or with an
95:stack frame
84:Description
70:Intel 80486
3190:Categories
3116:Intel GPUs
2830:Core-based
2594:(external
2482:oriented (
2352:Silvermont
2304:Sunny Cove
2273:Ivy Bridge
2056:Processors
1644:cs/0701192
1541:References
1441:for Intel
1190:series of
1117:Intel 8088
1099:Intel 8087
1082:83S87SX-25
974:Green MATH
940:designs),
882:Super MATH
739:500 → 2330
692:233 → 1400
663:Pentium II
448:Cyrix 6x86
442:~18 → 56×
396:(or 80487)
388:~10 → 20×
259:(millions/
116:explicitly
3168:Codenames
3081:StrongARM
2919:Dual-Core
2892:Dual-Core
2803:Dual-Core
2773:OverDrive
2722:A100/A110
2715:OverDrive
2509:pre-x86 (
2376:Gracemont
2285:Broadwell
1874:Solutions
1859:Solutions
1844:0199-6649
1835:InfoWorld
1661:218578808
1060:, etc.),
1026:Transmeta
1016:, etc.),
988:, etc.),
986:Geode GXm
982:Geode GX1
960:, etc.),
932:(various
906:Cyrix MII
777:Pentium 4
757:Athlon 64
545:…..000000
452:Cyrix MII
436:1.0 → 3.1
257:Peak FMUL
252:Max clock
197:precision
130:) as the
74:compilers
54:microcode
3173:Larrabee
3051:iAPX 432
2986:11th gen
2981:10th gen
2820:P6-based
2710:RapidCAD
2452:14th gen
2447:13th gen
2442:12th gen
2437:11th gen
2432:10th gen
2359:Goldmont
2347:Saltwell
2261:Westmere
2221:NetBurst
2167:Chipsets
1994:. Intel.
1741:14 April
1470:See also
1326:data bus
1186:for the
1164:IEEE 754
900:, etc.,
830:cycles).
790:multiple
547:83 → 275
434:….000000
194:mantissa
3163:Stratix
3099:Related
3061:Itanium
2976:9th gen
2971:8th gen
2966:7th gen
2961:6th gen
2956:5th gen
2951:4th gen
2946:3rd gen
2941:2nd gen
2936:1st gen
2899:Pentium
2882:Celeron
2842:Tolapai
2763:Pentium
2746:(1998)
2744:Celeron
2635:80387DX
2627:80387SX
2422:Pentium
2417:Celeron
2371:Tremont
2342:Bonnell
2292:Skylake
2280:Haswell
2256:Nehalem
2155:Itanium
2071:Pentium
2066:Celeron
1946:at the
1531:Fabless
1330:80387SX
1042:Math·Co
946:WinChip
916:etc.),
912:(early
910:Fujitsu
898:Cx87DLC
894:Cx87SLC
890:FasMath
573:1 (0*)
559:Pentium
474:117…129
420:218…303
417:200…273
369:314…487
366:191…497
363:122…129
297:250…800
291:180…186
282:193…203
249:FPATAN
147:Pentium
63:tangent
3086:XScale
2856:64-bit
2852:x86-64
2757:(2004)
2654:32-bit
2617:80C187
2610:(1980)
2583:(1982)
2577:(1982)
2571:(1982)
2565:(1979)
2559:(1978)
2548:16-bit
2542:Early
2534:(1977)
2528:(1974)
2522:(1972)
2501:(1974)
2495:(1971)
2403:64-bit
2399:x86-64
2249:Penryn
2235:64-bit
2231:x86-64
2190:32-bit
1972:9 June
1842:
1659:
1507:3DNow!
1447:i486DX
1443:i486SX
1432:i487SX
1426:i487SX
1386:CORDIC
1368:i387DX
1356:i387SX
1312:direct
1160:80C187
1154:based
1131:80C187
1062:Weitek
1056:, and
1034:TM5800
1030:TM5600
990:NexGen
792:cycles
710:Athlon
649:..0000
641:150 →
599:..0000
585:19…134
582:17…173
537:166 →
505:AMD K6
491:..0000
477:97…161
294:30…540
279:90…145
276:70…100
254:(MHz)
246:FPTAN
243:FSQRT
191:64-bit
3158:PIIXs
3039:Other
2837:Quark
2650:IA-32
2640:80487
2622:80287
2581:80286
2575:80188
2569:80186
2511:8-bit
2484:4-bit
2186:IA-32
2150:Quark
2049:Lists
1992:(PDF)
1766:3 May
1760:(PDF)
1694:3 May
1657:S2CID
1639:arXiv
1595:(PDF)
1588:(PDF)
1570:(PDF)
1559:(PDF)
1518:Notes
1493:SSSE3
1464:Nx586
1460:Nx587
1454:80587
1418:80487
1287:80387
1273:80387
1216:80386
1201:CHMOS
1176:80287
1170:80287
1113:Intel
1064:(the
1048:(the
1040:(the
1028:(the
1022:486DX
1010:486DX
1000:(the
994:Nx587
992:(the
980:(the
964:(the
944:(the
926:486DX
922:80387
888:(the
886:Cyrix
880:(the
854:486DX
798:20…43
787:20…43
727:16…35
721:13…24
696:..000
680:27…50
674:17…38
665:/ III
629:28…68
623:16…56
591:60 →
525:21…41
516:21…41
483:66 →
471:59…60
462:24…34
426:16 →
414:83…87
394:80486
375:16 →
354:88…91
351:29…57
348:23…34
314:~0000
288:40…50
285:10…15
240:FCOM
237:FXCH
234:FDIV
231:FMUL
228:FADD
90:stack
33:is a
3153:ICHs
3148:SCHs
3143:PCHs
3076:i960
3071:i860
3066:RISC
3056:EPIC
3046:CISC
2998:Xeon
2926:Core
2865:Atom
2815:Xeon
2810:Core
2727:Atom
2685:i486
2663:i386
2656:x86)
2608:8087
2596:FPUs
2563:8088
2557:8086
2532:8085
2526:8080
2520:8008
2499:4040
2493:4004
2459:Xeon
2427:Core
2412:Atom
2244:Core
2192:x86)
2145:Xeon
2108:Core
2061:Atom
1974:2021
1840:ISSN
1768:2023
1743:2018
1696:2023
1512:SIMD
1497:SSE4
1489:SSE3
1485:SSE2
1458:The
1430:The
1388:unit
1384:and
1344:i387
1295:i387
1285:The
1205:CMOS
1180:i287
1174:The
1152:CMOS
1145:NMOS
1121:8086
1105:8087
1103:The
1093:8087
1078:4167
1076:and
1074:3167
1070:1167
1066:1067
1058:Nano
1038:ULSI
1032:and
1014:5x86
970:3C87
966:2C87
958:Nano
936:and
924:and
902:6x86
858:5x86
811:..00
759:(K8)
743:..00
712:(K7)
399:8…20
338:.000
327:6 →
303:5 →
273:8087
266:FMUL
210:The
183:SSE2
3136:Arc
3121:GMA
2870:SoC
2788:III
2778:Pro
2737:SoC
2700:DX4
2695:DX2
2673:376
2592:x87
2544:x86
2480:BCD
2334:ULV
2331:x86
2086:III
2076:Pro
1649:doi
1502:AVX
1481:SSE
1476:MMX
1293:or
1291:387
1196:USD
1119:or
1046:VIA
1036:),
1004:),
1002:mP6
996:),
962:IIT
942:IDT
938:486
934:387
930:IBM
908:),
876:),
850:387
846:287
842:AMD
784:2…7
781:1…5
766:..0
724:1…2
718:1…4
715:1…4
671:2…5
668:1…3
645:200
620:2…5
617:1…3
595:300
576:1…4
567:1…3
564:1…3
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459:4…6
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440:000
386:000
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950:C3
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892:,
874:K8
872:,
870:K7
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866:K6
864:,
862:K5
860:,
856:,
852:,
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570:39
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450:,
430:50
428:00
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402:16
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373:00
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212:A
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