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189:" between the ideal expression of the solution to a particular programming problem, and the real physical hardware illustrated the inefficiency of current machine implementations. The three Burroughs architectures represent solving this problem by building hardware aligned with high-level languages, so-called
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The I/O system for the B1000 series consisted of a 24-bit data path and control strobes to and from the peripherals. The CPU would place data on the data path, then inform the peripheral that data was present. Many of the peripheral adapters were fairly simplistic, and the CPU actually drove the
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Later models of the machines in both the 1800 and 1900 series could be configured as either a single or dual processor. These were tightly coupled machines and competed in access to the main memory. The B1955 and B1965 could accommodate up to four processors on the memory bus, but at least one of
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in data from a register into the instruction register allowing very efficient instruction parsing. Another feature of the machine language was the appearance of having the output of the ALU appear as different addressable registers. X+Y, and X-Y are two read-only registers within the machine
296:. Successive cycles from a multi-cycle instruction were sourced from PROMs. The FPLAs and PROM outputs were wired together. The FPLA would drive the output on the first cycle, then get tri-stated. The PROMs would drive the control lines until the completion of the instruction.
404:
Wilner, Wayne T., "Design of the
Burroughs B1700", AFIPS (American Federation of Information Processing Societies) Joint Computer Conferences archive, Proceedings of the December 5-7, 1972, Fall Joint Computer Conference, Anaheim, California, 1972,
101:, and originally introduced in the 1970s with continued software development until 1987. The series consisted of three major generations which were the B1700, B1800, and B1900 series machines. They were also known as the
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format. Consequently, the processors didn't have to deal with serial I/O interrupt issues. This was taken care of by the fact that block mode terminals were the only type supported.
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Wilner, Wayne T., "Burroughs B1700 memory utilization", Proceedings of the
December 5-7, 1972, Fall Joint Computer Conference, part I, December 05-07, 1972, Anaheim, California
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Much of the original research for the B1700, initially codenamed the PLP ("Proper
Language Processor" or "Program Language Processor"), was done at the Burroughs
411:
Wilner, Wayne T., "Unconventional architecture", ACM Annual
Conference/Annual Meeting archive, Proceedings of the 1976 annual conference, Houston, Texas, 1976
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these would be assigned to the Multi-Line adapter which supplied serial I/O to the system. Only Dual-processor configurations were ever actually sold.
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sequencers which stayed in lock step with each other. The majority of the instructions executed in a single cycle. This first cycle was decoded by
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configuration. The serial I/O was polled. A given terminal would wait until it was addressed, and grab the line and send any data it had pending.
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The actual hardware was built to enhance this capability. Perhaps the most obvious examples were the bit-addressable memory, the variable size
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including addressing memory.) The B1000 series was perhaps the only "universal" solution from this perspective because it used idealized
391:, “Ideas for Computer Systems Organization: A Personal Survey”, Software Engineering, vol. 1, Academic Press, New York, 1970, pp.7-16.
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data path. The bit addressable memory supported the mix quite efficiently. Internally, the later generation memories stored data on
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One concession to the fact that
Burroughs was primarily a supplier to business (and thus running COBOL) was the availability of
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plants. The majority of design work was done at Santa
Barbara with the B1830 being the notable exception designed at Liège.
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but with the introduction of the B1955 in 1979 the series employed the more popular (and more readily obtainable)
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211:(B2000, 3000, and B4000) were aimed at the business world and executing COBOL (thus everything was done with
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195:(contemporary term; today more often called a "high-level language computer architecture"). The
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boundaries, but were capable of reading across this boundary and supplying a merged result.
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Wilner, Wayne T., "Microprogramming environment on the
Burroughs B1700", IEEE CompCon '72
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that sounds fairly limiting, but most commercial installations got by with hundreds of
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using 16 inputs (just the perfect size for a 16-bit instruction word) and 48
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398:, Burroughs Corporation, Santa Barbara Plant, Goleta, California, May 1972.
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adapter state machines through their operations with successive accesses.
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logic family. Up through the B1955, the control logic was implemented with
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for whatever language was required. These interpreters presented different
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Production of the B1700s began in the mid-1970s and occurred at both the
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The B1965, the last of the series, was implemented with a pair of
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The B1000 is distinguished from other machines in that it had a
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The initial hardware implementations were built out of the
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The Multi-Line was capable of driving multiple 19.2Kb
162:(Master Control Program) would schedule a particular
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ETM 313: Proper
Language Processor for Small Systems
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334:The B1000 series could address a maximum of 2
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385:, article found at www.computehistory.org
670:High-level language computer architecture
77:Learn how and when to remove this message
40:This article includes a list of general
354:
675:Computer-related introductions in 1972
338:of memory. In these days of multiple
109:(B5000, B6000, B7000, B8000) and the
7:
485:Eckert–Mauchly Computer Corporation
383:1965 Mainframe Computers Employ ICS
590:New Executive Programming Language
250:Internally, the machines employed
166:to run. The MCP would preload the
46:it lacks sufficient corresponding
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396:"B1700 Design and Implementation"
269:(CTL) Family originally made by
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327:the data into main memory in a
468:System Development Corporation
267:Complementary Transistor Logic
203:and very efficiently executed
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665:Burroughs mainframe computers
323:The Multi-Line Adapter would
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226:(ALU), and the ability to
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560:Burroughs B2500 and B4900
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377:B1700/B1800/B1900 manuals
154:allowing the machine to
192:language-directed design
158:any other machine. The
111:Burroughs Medium Systems
613:List of UNIVAC products
529:UNIVAC 1100/2200 series
519:Burroughs Large Systems
475:Convergent Technologies
364:(Bunker, et al.), 1968.
271:Fairchild Semiconductor
185:A notable idea of the "
152:writeable control store
140:Writeable control store
113:(B2000, B3000, B4000).
107:Burroughs Large Systems
105:, by contrast with the
103:Burroughs Small Systems
61:more precise citations.
18:Burroughs Small Systems
463:Burroughs Corporation
224:arithmetic logic unit
99:Burroughs Corporation
281:, muxes and such.
254:instructions and a
95:mainframe computers
480:Sperry Corporation
394:Wilner, Wayne T.,
316:serial lines in a
243:arithmetic in the
219:for any language.
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639:J. Presper Eckert
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16:(Redirected from
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634:Robert S. Barton
565:Command AND Edit
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379:at bitsavers.org
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217:virtual machines
172:virtual machines
93:was a series of
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618:UNIVAC FASTRAND
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91:B1000 Series
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595:Unisys Icon
329:linked list
168:interpreter
59:introducing
659:Categories
511:Mainframes
405:pp.489-497
371:References
318:multi-drop
231:language.
144:See also:
67:March 2019
42:references
344:kilobytes
340:gigabytes
336:megabytes
294:min-terms
286:microcode
235:Internals
182:, etc.
580:LINC 4GL
575:HOLMES 2
543:Products
135:Features
118:Pasadena
534:OS 2200
456:History
207:. The
180:Fortran
156:emulate
120:plant.
55:improve
627:People
605:UNIVAC
570:ES7000
449:Unisys
260:32-bit
256:24-bit
252:16-bit
44:, but
350:Notes
314:RS485
290:FPLAs
279:PROMs
205:ALGOL
199:were
176:COBOL
174:for
127:and
524:MCP
325:DMA
300:I/O
275:TTL
245:ALU
241:BCD
213:BCD
164:job
661::
247:.
228:OR
178:,
441:e
434:t
427:v
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74:(
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