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CDC 7600

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369:. Each functional unit consisted of several sections that operated in turn, for instance, an addition unit might have circuitry dedicated to retrieving the operands from memory, then the actual math unit, and finally another to send the results back to memory. At any given instance only one part of the unit was active, while the rest waited their turn. A pipeline improves on this by feeding in the next instruction before the first has completed, using up that idle time. For instance, while one instruction is being added together, the operands for the next add instruction can be fetched. That way, as soon as the current instruction completes and moves to the output circuitry, the operands for the next addition are already waiting to be added. In this way each functional unit works in "parallel", as well as the machine as a whole. The improvement in performance generally depends on the number of steps the unit takes to complete. For instance, the 6600's multiply unit took 10 cycles to complete an instruction, so by pipelining the units it could be expected to gain about 10 times the speed. 755:
has an access time of 60 of the 27.5-ns minor cycles and a word length of 480 bits (512 bits with parity). Accesses are fully pipelined and buffered, so the two have the same sequential transfer rate of 60 bits every 27.5 ns. The two work in parallel, so the sequential transfer rate from one to the other is 60 bits per 27.5 ns minor-cycle. On an operating system call, the contents of the small core memory are swapped out and replaced from the large core memory by the operating system, and restored afterward.
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improved performance over the 6600 by a factor of about 3. To achieve the rest of the goal, the machine would have to run at a faster speed, now possible using new transistor designs. However, there is a physical limit to performance because of the time it takes signals to move between parts of the machine, which in turn is defined by its physical size. As always, Cray's design work spent considerable effort on this problem and thus allow higher operating frequencies. For the 7600, each
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complete its trip through the unit before the next could be fed into it, which caused a bottleneck when the scheduler system ran out of instructions. Adding more functional units would not improve performance unless the scheduler was also greatly improved, especially in terms of allowing it to have more memory, so it could look through more instructions for ones that could be fed into the parallel units. That appeared to be a major problem.
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reported that the machine would break down at least once a day, and often four or five times. Acceptance at installation sites took years while the bugs were worked out, and while the machine generally sold well enough given its "high end" niche, it is unlikely the machine generated any sort of real
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possible without too much trouble. The machine initially did not come with software; sites had to be willing to write their own operating system, like LTSS, NCAROS, and others; and compilers like LRLTRAN (Livermore's version of Fortran with dynamic memory management and other non-standard features).
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The 7600 has two main core memories. Small core memory holds the instructions currently being executed and the data currently being processed. It has an access time of 10 of the 27.5-ns minor cycles and a 60-bit word length. Large core memory holds data ready to transfer to small core memory. It
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There are eight 60-bit registers, each with an address register. Moving an address to an address register starts a small core memory read or write. Arithmetic and logic instructions have these registers as sources and destinations. The programmer or compiler tries to fetch data in time to be used
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stack, which were in turn cooled by a liquid-freon system running through the core of the machine. Since this system was mechanical, and therefore prone to failure, the 7600 was redesigned into a large "C" shape to allow access to the modules on either side of the cooling piping by walking into the
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There is a 12-word instruction pipeline, called instruction word stack in CDC documentation. All addresses in the stack are fetched, without waiting for the instruction field to be processed. Therefore, the fetch of the target instruction of a conditional branch precedes evaluation of the branch
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Things are never that simple, however. Pipelining requires that the unit's internals can be effectively separated to the point where each step of the operation is running on completely separate circuitry. This is rarely achievable in the real world. Nevertheless, the use of pipelining on the 7600
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Like the 6600, the 7600 used 60-bit words with instructions that were generally 15 bits in length, although there were also 30-bit instructions. The instructions were packed into the 60-bit words, but a 30-bit instruction could not straddle two words, and control could only be transferred to the
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in general were also getting somewhat faster as the production processes and quality improved. These sorts of improvements might be expected to make a machine twice as fast, perhaps as much as five times. However, as with the 6600 design, Cray set himself the goal of producing a machine with ten
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known as "Peripheral Processor Units", or PPUs. For any given cycle of the machine one of the PPUs was in control, feeding data into the memory while the main processor was crunching numbers. When the cycle completed, the next PPU was given control. In this way the memory always held up-to-date
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In fact, from a high-level perspective, the 7600 was quite similar to the 6600. At the time computer memory could be arranged in blocks with independent access paths, and Cray's designs used this to their advantage. While most machines would use a single CPU to run all the functionality of the
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One of the reasons the 6600 was so much faster than its contemporaries is that it had multiple functional units that could operate in parallel. For instance, the machine could perform an addition of two numbers while simultaneously multiplying two others. However, any given instruction had to
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information for the main processor to work on (barring delays in the external devices themselves), eliminating delays on data, as well as allowing the CPU to be built for mathematical performance and nothing else. The PPU could have been called a very smart "communications channel".
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system, Cray realized that this meant each memory block spent a considerable amount of time idle while the CPU was processing instructions and accessing other blocks. In order to take advantage of this, the 6600 and 7600 left mundane housekeeping tasks, printing output or reading
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and store data before more data needs the same register, but if it is not ready, the processor goes into a wait state until it is. It also waits if one of the four floating-point arithmetic units is not ready when requested, but due to pipelining, this does not usually happen.
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CDC also manufactured two multi-processor computers based on the 7600, with the model number 7700. They consisted of two 7600 machines in an asymmetric configuration: a central and an adjunct machine. They were used for missile launch and inbound tracking of USSR
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first instruction in a word. However, the instruction set itself had changed to reflect the new internal memory layout, thereby rendering it incompatible with the earlier 6600. The machines were similar enough to make porting of
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From about 1969 to 1975, the CDC 7600 was generally regarded as the fastest computer in the world, except for specialized units. However, even with the advanced mechanicals and cooling, the 7600 was prone to failure. Both
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condition. During the execution of a 10-word (up to 40 instruction) loop, all the needed instructions remain in the stack, so no instructions are fetched, leaving small core memory free for data transfers.
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The CDC 7600 "was designed to be machine code upward compatible with the 6600, but to provide a substantial increase in performance". One user said: "Most users could run on either system without changes."
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As the 6600 neared production quality, Cray lost interest in it and turned to designing its replacement. Making a machine "somewhat" faster would not be too difficult in the late 1960s; the introduction of
381:, each one stuffed with subminiature resistors, diodes, and transistors. The six boards were stacked up and then interconnected along their edges, making a very compact, but basically unrepairable module. 384:
However the same dense packing also led to the machine's biggest problem – heat. For the 7600, Cray once again turned to his refrigeration engineer, Dean Roush, formerly of the
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and variable-size (up to 512 Kword) secondary memory (depending on site). It was generally about ten times as fast as the CDC 6600 and could deliver about 10
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field into the 1970s. The 7600 ran at 36.4 MHz (27.5 ns clock cycle) and had a 65 Kword primary memory (with a 60-bit word size) using
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on hand-compiled code, with a peak of 36 MFLOPS. In addition, in benchmark tests in early 1970 it was shown to be slightly faster than its
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Although the 7600 shared many features of the 6600, including hardware, instructions, and its 60-bit word size, it was not object-code
1225: 1190: 867: 1380: 1015: 1460: 817:. The radar simulator was a real-time simulator with a CDC 6400 for input/output front-end. These systems were to be used in the 818: 215: 1467: 935: 1636: 866:. Its sheer size allows only two corner units to be shown. The rest are in storage. Another 7600 is on display at the 830: 740: 739:
The 7600 was an architectural landmark, and most of its features are still standard parts of computer design. It is a
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with a 15-bit instruction word containing a 6-bit operation code. There are only 64 machine codes, including a
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In 1978, Science magazine reported that CDC sold "400 of its CDC 6600 models and 75 of its CDC 7600 models."
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in Redondo Beach CA (later moved to Kwajalein Atoll, South Pacific), and the second one was installed at
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Neil R. Lincoln with 18 Control Data Corporation (CDC) engineers on computer architecture and design
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Eventually, they were offered for sale: 2 CDC 7700s, 1 CDC 6400; 6 IBM 3033s were also for sale.
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A lecture given by a CDC representative at the computer center at UCLA, in about 1970.
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CDC 7600 serial number 1. This image shows two sides of the C-shaped chassis.
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Among the 7600's notable state-of-the-art contributions, beyond extensive
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allowed denser packing of components and, in turn, a higher clock speed.
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Presentation of the CDC 7600 and other machines designed by Seymour Cray
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was never completed, and Seymour Cray went on to form his own company,
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with the CDC 6600. In addition, it was not entirely source-code (
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In order to solve this problem, Cray turned to the concept of an
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Pugh, Emerson W.; Johnson, Lyle R.; Palmer, John H. (1991).
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CDC 7600 Presentation by Gordon Bell of Microsoft Research
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Milestones in Computer Science and Information Technology
1258:, which is when something from the old runs on the new. 1712: 1686: 1609: 1573: 1520: 1490: 196: 186: 176: 166: 152: 139: 119: 114: 102: 92: 87: 79: 71: 63: 53: 43: 38: 21: 1269: 1178: 862:One surviving 7600 is partially on display at the 1391:Chippewa Falls Museum of Industry and Technology 1020:Computational and Information Systems Laboratory 1016:"Control Data Corporation (CDC) 7600: 1971–1983" 870:, along with its console and a tape controller. 868:Chippewa Falls Museum of Industry and Technology 1122:J. E. Thornton (1980). "The CDC 6600 Project". 331:3D rendering of a full overview of two CDC 7600 1217:The Architecture of High Performance Computers 1085: 1083: 1468: 1106:"Parallel Operation in the Control Data 6600" 885: 883: 223: 83:$ 62 - $ 155 thousands (monthly rent in 1968) 8: 1767:Control Data Corporation mainframe computers 931: 929: 927: 925: 923: 397:inside of the "C" and opening the cabinet. 1570: 1475: 1461: 1453: 1412: 911: 909: 907: 230: 216: 1055:. Computer History Museum. Archived from 1377:of Microsoft Research (formerly of DEC) 1242:"Instruction buffering in the CDC 7600" 1124:IEEE Annals of the History of Computing 879: 292: 1757:Computer-related introductions in 1969 1010: 1008: 1006: 1004: 983: 981: 979: 404: 392:plate to the back of each side of the 96:Height : 188 cm (74 in) 18: 1158:Anthony, Sebastian (April 10, 2012). 1043: 1041: 751:operations in the central processor. 7: 1433:World's most powerful supercomputer 1302:"Control Data 7600 Computer System" 33:3D rendering with a figure as scale 14: 1762:Control Data Corporation hardware 936:CDC 7600 Reference Manual, Feb 71 916:CDC 7600 site preparation, May 76 1511: 821:. One computer was installed at 377:actually consisted of up to six 323: 309: 295: 98:Width: 302 cm (119 in) 27: 1272:IBM's 360 and Early 370 Systems 1160:"The history of supercomputers" 851:profits for CDC. The successor 1254:This is not to say it was not 767:Relationship with the CDC 6600 749:fixed-point multiply or divide 1: 1326:. July 27, 1981. p. 49. 1156:"parallel functional units" 1077:Multiply by a factor of ten. 831:Huntington Beach, California 1396:Lot of links about CDC 7600 250:to be the successor to the 162:(up to 512000 60-bit words) 1793: 989:A Seymour Cray Perspective 1654:Chippewa Operating System 1509: 1439: 1430: 1420: 1415: 1345:Charles Babbage Institute 728: 725: 715: 707: 704: 696: 693: 685: 682: 674: 671: 663: 660: 652: 649: 641: 638: 627: 624: 614: 606: 603: 595: 592: 584: 581: 573: 570: 562: 559: 551: 548: 540: 537: 529: 526: 516: 508: 500: 492: 484: 476: 468: 460: 452: 442: 211: 206: 26: 1484:Control Data Corporation 1373: – by C. 1177:Edwin D. Reilly (2003). 388:company. Roush added an 48:Control Data Corporation 1704:PLATO (computer system) 1386:Computer History Museum 1136:10.1109/MAHC.1980.10044 864:Computer History Museum 453:X0 (LCM start address) 358:times the performance. 1256:backward compatibility 379:printed circuit boards 345: 1699:Storage Module Device 1276:. MIT Press. p.  819:Pacific Missile Range 341:CDC 7600 assembly at 340: 317:CDC 7600 with scaling 1713:Affiliated companies 1381:SCD Computer Gallery 1091:"7600s at Livermore" 1049:"7600 Supercomputer" 892:, pp. 12, legend - 3 367:instruction pipeline 258:'s dominance of the 837:Reception and usage 741:load-store computer 616:Increment registers 607:A7 (write address) 596:A6 (write address) 407: 406:CDC 7600 registers 351:integrated circuits 994:2016-05-15 at the 585:A5 (read address) 574:A4 (read address) 563:A3 (read address) 552:A2 (read address) 541:A1 (read address) 405: 346: 148:processor @ 36 MHz 16:1967 supercomputer 1744: 1743: 1596: 1595: 1451: 1450: 1440:Succeeded by 1287:978-0-262-16123-7 1059:on 3 October 2012 890:Adams Survey 1968 827:McDonnell Douglas 806:operating systems 745:no-operation code 737: 736: 733: 732: 518:Address registers 444:Operand registers 240: 239: 1784: 1777:60-bit computers 1571: 1515: 1477: 1470: 1463: 1454: 1421:Preceded by 1413: 1328: 1327: 1315: 1309: 1308: 1306: 1298: 1292: 1291: 1275: 1265: 1259: 1252: 1246: 1245: 1238: 1232: 1231: 1220:. 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Archived from 955: 949: 944: 938: 933: 918: 913: 902: 899: 893: 887: 412: 411: 408: 327: 313: 299: 246:was designed by 232: 225: 218: 121:Operating system 31: 19: 1792: 1791: 1787: 1786: 1785: 1783: 1782: 1781: 1747: 1746: 1745: 1740: 1714: 1708: 1682: 1605: 1592: 1569: 1548:CDC 6000 series 1543:CDC 3000 series 1516: 1507: 1486: 1481: 1447: 1445: 1436: 1428: 1426: 1408:Inside the 7600 1404: 1337: 1332: 1331: 1318: 1316: 1312: 1304: 1300: 1299: 1295: 1288: 1267: 1266: 1262: 1253: 1249: 1240: 1239: 1235: 1228: 1214: 1213: 1209: 1204: 1200: 1193: 1176: 1175: 1171: 1157: 1155: 1151: 1121: 1120: 1116: 1108: 1104: 1102: 1098: 1089: 1088: 1081: 1076: 1072: 1062: 1060: 1047: 1046: 1039: 1029: 1027: 1026:on 20 July 2011 1014: 1013: 1002: 996:Wayback Machine 986: 977: 968: 966: 957: 956: 952: 945: 941: 934: 921: 914: 905: 900: 896: 888: 881: 876: 839: 769: 717:Program address 630:(all bits zero) 530:A0 (SCM start) 433: 425: 417: 403: 333: 332: 328: 319: 318: 314: 305: 304: 300: 291: 236: 207: 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Retrieved 963:the original 953: 942: 897: 861: 840: 811: 798: 785: 774: 770: 761: 757: 753: 738: 719: 716: 711:Increment 7 700:Increment 6 689:Increment 5 678:Increment 4 667:Increment 3 656:Increment 2 645:Increment 1 634:Increment 0 629: 618: 615: 520: 517: 446: 443: 436: 401:Architecture 383: 371: 364: 360: 347: 280: 256:Control Data 254:, extending 248:Seymour Cray 243: 241: 64:Release date 58:Seymour Cray 44:Manufacturer 1722:ETA Systems 1623:Languages: 1427:3 megaflops 1375:Gordon Bell 1164:Extremetech 1053:Collections 512:Register 7 509:X7 (write) 504:Register 6 501:X6 (write) 496:Register 5 488:Register 4 480:Register 3 472:Register 2 464:Register 1 456:Register 0 355:Transistors 274:rival, the 187:Predecessor 1751:Categories 1659:CDC Kronos 1491:Key people 1437:1969–1975 1320:"For Sale" 969:2010-04-08 959:"CDC 7600" 874:References 777:compatible 747:, with no 610:Address 7 599:Address 6 588:Address 5 577:Address 4 566:Address 3 555:Address 2 544:Address 1 533:Address 0 493:X5 (read) 485:X4 (read) 477:X3 (read) 469:X2 (read) 461:X1 (read) 283:pipelining 93:Dimensions 72:Units sold 1736:Cray Inc. 1676:CDC SCOPE 1601:CDC Cyber 1521:Computers 1324:InfoWorld 802:compilers 793:CDC 160-A 720:(18 bits) 619:(18 bits) 521:(18 bits) 447:(60 bits) 201:CDC Cyber 197:Successor 182:36 MFLOPS 160:Megabytes 67:June 1967 1694:CDC Wren 1610:Software 1565:CDC 8600 1560:CDC 7600 1553:CDC 6600 1538:CDC 1700 1528:CDC 1604 1424:CDC 6600 1416:Records 1357:CDC 8600 1353:CDC 6600 1349:CDC 1604 992:Archived 853:CDC 8600 394:cordwood 390:aluminum 252:CDC 6600 244:CDC 7600 191:CDC 6600 126:Chippewa 54:Designer 22:CDC 7600 1627:COMPASS 1144:5905504 781:COMPASS 726:  705:  694:  683:  672:  661:  650:  639:  625:  604:  593:  582:  571:  560:  549:  538:  527:  172:15 MIPS 1669:NOS/VE 1575:Vector 1443:Cray-1 1402:Photos 1284:  1224:  1189:  1142:  428:. . . 420:. . . 289:Design 268:MFLOPS 154:Memory 146:60-bit 134:KRONOS 115:System 88:Casing 39:Design 1727:ETA10 1642:MIMIC 1637:Cybil 1632:SYMPL 1305:(PDF) 1140:S2CID 1109:(PDF) 815:ICBMs 386:Amana 178:FLOPS 158:3.84 130:SCOPE 103:Power 80:Price 1650:OS: 1363:and 1282:ISBN 1222:ISBN 1187:ISBN 1065:2011 1032:2011 848:NCAR 846:and 844:LLNL 804:and 343:LLNL 242:The 168:MIPS 1664:NOS 1617:026 1278:388 1132:doi 829:in 823:TRW 708:B7 697:B6 686:B5 675:B4 664:B3 653:B2 642:B1 628:B0 272:IBM 141:CPU 106:95 75:+75 1753:: 1359:, 1351:, 1343:, 1322:. 1280:. 1185:. 1162:. 1138:. 1126:. 1082:^ 1051:. 1040:^ 1018:. 1003:^ 978:^ 922:^ 906:^ 882:^ 859:. 729:P 132:, 128:, 108:kW 1476:e 1469:t 1462:v 1367:. 1307:. 1290:. 1244:. 1230:. 1195:. 1166:. 1146:. 1134:: 1128:2 1111:. 1093:. 1067:. 1034:. 998:. 972:. 432:0 424:7 416:9 231:e 224:t 217:v

Index


Control Data Corporation
Seymour Cray
kW
Operating system
Chippewa
SCOPE
KRONOS
CPU
60-bit
Memory
Megabytes
MIPS
FLOPS
CDC 6600
CDC Cyber
v
t
e
Seymour Cray
CDC 6600
Control Data
supercomputer
magnetic core
MFLOPS
IBM
IBM System/360
pipelining
CDC 7600 serial number 1. This image shows two sides of the C-shaped chassis.
CDC 7600 with scaling

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