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This signal is transmitted after the entire frame is transferred. This signal is often a way to indicate that one entire frame is transmitted.
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A typical Camera
Interface would support at least a parallel interface although these days many camera interfaces are beginning to support the
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These are parallel data lines that carry pixel data. The data transmitted on these lines change with every Pixel Clock (PCLK).
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NOTE: The above lines are all treated as input lines to the Camera
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to the camera interface. An HSYNC indicates that one line of the frame is transmitted.
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The camera interface's parallel interface consists of the following lines:
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This is a special signal that goes from the camera sensor or
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This is the pixel clock and it would change on every pixel.
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155:Mobile Industry Processor Interface
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225:Digital image processing
256:MIPI Alliance standards
230:Camera Serial Interface
179:Horizontal Sync (HSYNC)
159:Camera Serial Interface
165:Electrical connections
189:Vertical Sync (VSYNC)
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195:Pixel Clock (PCLK)
63:"Camera interface"
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