174:(announced in 1959) used DTL circuits similar to the circuit shown in the first picture. IBM called the logic "complemented transistor diode logic" (CTDL). CTDL avoided the level shifting stage (R3 and R4) by alternating NPN and PNP based gates operating on different power supply voltages. NPN based circuits used +6V and -6V and the transistor switched at close to -6V, PNP based circuits used 0V and -12V and the transistor switched at close to 0V. Thus for example a NPN gate driven by a PNP gate would see the threshold voltage of -6V in the middle of the range of 0V to -12V. Similarly for the PNP gate switching at 0V driven by a range of 6V to -6V. The 1401 used
246:. In his patent the Schottky diode prevented the transistor from saturating by minimizing the forward bias on the collector–base transistor junction, thus reducing the minority carrier injection to a negligible amount. The diode could also be integrated on the same die, had a compact layout, no minority-carrier charge storage, and was faster than a conventional junction diode. His patent also showed how the Schottky transistor could be used in DTL circuits and improve the switching speed of other saturated logic designs, such as Schottky-TTL, at a low cost.
123:
114:, usually less than 1 volt). If either or both inputs are low, then at least one of the input diodes conducts and pulls the voltage at the anodes to a value less than about 2 volts. R3 and R4 then act as a voltage divider that makes Q1's base voltage negative and consequently turns off Q1. Q1's collector current will be essentially zero, so R2 will pull the output voltage Q high (logic 1; near V+).
211:
35:
535:. Page 32 states: "As the input signal changes, the charge on the capacitor is forced into the base of the transistor. This charge can effectively cancel the transistor stored charge, resulting in a reduction of storage time. This method is very effective if the output impedance of the preceding stage is low so that the peak reverse current into the transistor is high."
577:
105:
stage (D1, D2 and R1), an intermediate level shifting stage (R3 and R4), and an output common-emitter amplifier stage (Q1 and R2). If both inputs A and B are high (logic 1; near V+), then the diodes D1 and D2 are reverse biased. Resistors R1 and R3 will then supply enough current to turn on Q1 (drive
190:
In an integrated circuit version of the DTL gate, R3 is replaced by two level-shifting diodes connected in series. Also the bottom of R4 is connected to ground to provide bias current for the diodes and a discharge path for the transistor base. The resulting integrated circuit runs off a single
154:
which was the first all-transistorized computer in the world. A single card would hold four two-way circuits or three three-way or one eight-way. All input and output signals were compatible. The circuits were capable of reliably switching pulses as narrow as one microsecond.
214:
A digital clock made only with discrete transistors, diodes and resistors, no integrated circuits. This clock uses 550 switching diodes and 196 transistors to divide 60 Hz power-line frequency down to one pulse per second and provide a display of hours, minutes and
223:
is relatively large. When the transistor goes into saturation from all inputs being high, charge is stored in the base region. When it comes out of saturation (one input goes low) this charge has to be removed and will dominate the propagation time.
227:
One way to speed up DTL is to add a small "speed-up" capacitor across R3. The capacitor helps to turn off the transistor by removing the stored base charge; the capacitor also helps to turn on the transistor by increasing the initial base drive.
202:
released the 930-series DTμL micrologic family that had a better noise immunity, smaller die, and lower cost. It was the most commercially successful DTL family and copied by other IC manufacturers.
649:
38:
Schematic of basic two-input DTL NAND gate. R3, R4 and V− shift the positive output voltage of the input DL stage below the ground (to cut off the transistor at low input voltage).
674:
719:
504:
687:
575:, "Unitary Semiconductor High Speed Switching Device Utilizing a Barrier Diode", published December 31, 1964, issued August 26, 1969
235:. The Baker clamp is named for Richard H. Baker, who described it in his 1956 technical report "Maximum Efficiency Switching Circuits".
110:, about 0.3 V for germanium and 0.6 V for silicon). The turned on transistor's collector current will then pull the output Q low (logic 0; V
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transistors and diodes in its basic gates. The 1401 also added an inductor in series with R2. The physical packaging used the
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Q1 into saturation) and also supply the current needed by R4. There will be a small positive voltage on the base of Q1 (V
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824:
126:
NAND and NOR DTL logic circuits as used on IBM 608 cards. The PNP and NPN transistor symbols are those used by IBM.
671:
446:, page 188 states resistor is replaced with one or more diodes; figure 10-43 shows 2 diodes; cites to Schulz 1962.
818:
754:
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625:
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guidance computer used diode-resistor logic as much as possible, to minimize the number of transistors used.
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Another way to speed up DTL is to avoid saturating the switching transistor. That can be done with a
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624:; Louis A. Delhom; Texas Instruments and McGraw-Hill; 278 pages; 1968; LCCCN 67-22955.
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889:
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262:. Additionally, to increase fan-out, an additional transistor and diode may be used.
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introduced the SE100-series family, the first high-volume DTL chips. In 1964,
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The DTL circuit shown in the first picture consists of three stages: an input
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78:
34:
416:
Customer
Engineering Manual of Instruction: Transistor Component Circuits
171:
151:
772:
736:
493:
1963: Standard Logic IC Families
Introduced; Computer History Museum.
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259:
17:
209:
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121:
697:
456:
Schulz, D. (August 1962), "A High Speed Diode
Coupled NOR Gate",
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IBM Customer Manual of
Instruction: Transistor Component Circuits
760:
701:
131:
341:, pp. 60-61, Springer Science & Business Media, 2007
597:. New York: McGraw-Hill Book Company. pp. 141–143.
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Microelectronics
Digital and Analog Circuits and Systems
656:
1978 Fairchild Full Line
Condensed Catalog; 530 pages.
648:
1975 Fairchild Full Line
Condensed Catalog; 354 pages.
442:
Design and
Application of Transistor Switching Circuits
505:"Monolithic integrated circuit history; Andrew Wylie"
369:
The IBM 1401 may have also used a current mode logic.
622:
134:
manufactured transistors by modifying off-the-shelf
852:
782:
735:
444:, Texas Instruments Electronics Series, McGraw-Hill
632:1964 Fairchild DTμL Micrologic Catalog; 36 pages.
316:Emerson W. Pugh, Lyle R. Johnson, John H. Palmer,
81:(providing signal restoration) is performed by a
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8:
720:
706:
698:
389:
387:
118:Early diode logic with transistor inverter
27:"DTL" redirects here. For other uses, see
843:Current mode logic / Source-coupled logic
531:High-Speed Switching Transistor Handbook
33:
547:"Maximum Efficiency Switching Circuits"
293:
7:
551:MIT Lincoln Laboratory Report TR-110
482:ASIC world: "Diode Transistor Logic"
378:
254:A major advantage over the earlier
640:1965 Fairchild Catalog; 49 pages.
25:
138:, after which they had their own
422:. IBM. Form 223-688 (5M-11R-156)
807:Direct-coupled transistor logic
672:Diode-Transistor Logic (slides)
529:Roehr, William D., ed. (1963),
318:IBM's 360 and Early 370 Systems
53:that is the direct ancestor of
57:. It is called so because the
1:
320:, pp. 33-34, MIT Press, 1991
659:(see pages 13-110 to 13-113)
837:Transistor–transistor logic
681:- University of Connecticut
180:IBM Standard Modular System
55:transistor–transistor logic
912:
825:Integrated injection logic
651:(see pages 2-129 to 2-130)
250:Interfacing considerations
158:The designers of the 1962
26:
831:Resistor–transistor logic
819:Gunning transceiver logic
755:Depletion-load NMOS logic
440:Delham, Louis A. (1968),
339:History of Semiconductors
256:resistor–transistor logic
140:alloy-junction transistor
403:Retrieved on 2009-06-28.
694:- University of Babylon
591:Millman, Jacob (1979).
242:filed a patent for the
142:manufacturing plant at
75:logical inversion (NOT)
795:Diode–transistor logic
685:Diode-Transistor Logic
216:
191:power supply voltage.
127:
43:Diode–transistor logic
39:
813:Emitter-coupled logic
767:Pass transistor logic
557:on September 25, 2015
545:Baker, R. H. (1956),
213:
146:. In the mid 1950s,
125:
37:
643:(see pages 33 to 34)
277:High-threshold logic
29:DTL (disambiguation)
244:Schottky transistor
783:Other technologies
690:2018-06-19 at the
677:2018-08-27 at the
627:(see chapter 10.7)
458:Solid State Design
399:2010-08-09 at the
217:
128:
85:(in contrast with
40:
883:
882:
761:Complementary MOS
359:computermuseum.li
221:propagation delay
206:Speed improvement
69:are performed by
16:(Redirected from
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875:Four-phase logic
757:(including HMOS)
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51:digital circuits
49:) is a class of
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692:Wayback Machine
679:Wayback Machine
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616:Further reading
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604:0-07-042327-X
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511:on 2017-07-19
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79:amplification
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870:Domino logic
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773:Bipolar–CMOS
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555:the original
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524:
513:. Retrieved
509:the original
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424:. Retrieved
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413:IBM (1960).
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307:, IBM, 1960.
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144:Poughkeepsie
129:
100:
59:logic gating
46:
42:
41:
790:Diode logic
381:, p. 6
272:Diode logic
233:Baker clamp
148:diode logic
103:diode logic
71:diode logic
750:NMOS logic
745:PMOS logic
569:US 3463975
515:2018-07-19
426:2012-04-24
347:3540342583
337:Bo Lojek,
326:0262161230
288:References
186:Integrated
83:transistor
61:functions
845:(CML/SCL)
464:(8): 52,
238:In 1964,
200:Fairchild
196:Signetics
194:In 1962,
176:germanium
890:Category
775:(BiCMOS)
688:Archived
675:Archived
470:11579670
397:Archived
379:IBM 1960
266:See also
219:The DTL
215:seconds.
172:IBM 1401
166:Discrete
73:, while
865:Dynamic
152:IBM 608
112:CE(sat)
860:Static
809:(DCTL)
763:(CMOS)
601:
579:
571:,
468:
345:
324:
282:NORBIT
260:fan-in
853:Types
839:(TTL)
833:(RTL)
821:(GTL)
815:(ECL)
797:(DTL)
769:(PTL)
420:(PDF)
305:p. 20
160:D-17B
827:(IL)
803:(OC)
599:ISBN
466:OCLC
343:ISBN
322:ISBN
170:The
89:and
77:and
65:and
132:IBM
93:).
91:TTL
87:RTL
63:AND
47:DTL
18:DTL
892::
549:,
460:,
386:^
303:,
182:.
108:BE
67:OR
721:e
714:t
707:v
607:.
518:.
462:1
429:.
349:.
328:.
45:(
31:.
20:)
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