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Segments have a "Present" flag in their descriptors, allowing them to be removed from memory if the need arises. For example, code segments or unmodified data segments can be thrown away, and modified data segments can be swapped out to disk. However, because entire segments need to be operated on as
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The GDT is still present in 64-bit mode; a GDT must be defined, but is generally never changed or used for segmentation. The size of the register has been extended from 48 to 80 bits, and 64-bit descriptors are always "flat" (thus, from 0x0000000000000000 to 0xFFFFFFFFFFFFFFFF). However, the base of
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Creating shared memory through the GDT has some drawbacks. Notably such memory is visible to every process and with equal rights. In order to restrict visibility and to differentiate the protection of shared memory, for example to only allow read-only access for some processes, one can use separate
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If the System bit (4th bit of the Access field) is cleared, the size of the descriptor is 16 bytes instead of 8. This is because, even though code/data segments are ignored, TSS are not, but the TSS pointer can be 64bit long and thus the descriptor needs more space to insert the higher dword of the
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LDTs are the siblings of the Global
Descriptor Table (GDT), and each define up to 8192 memory segments accessible to programs - note that unlike the GDT, the zeroeth entry is a valid entry, and can be used like any other LDT entry. Also note that unlike the GDT, the LDT cannot be used to store
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There is also a Local
Descriptor Table (LDT). Multiple LDTs can be defined in the GDT, but only one is current at any one time: usually associated with the current Task. While the LDT contains memory segments which are private to a specific process, the GDT contains global segments. The x86
454:-based multitasking is used, while this is not possible for the GDT. The LDT also cannot store certain privileged types of memory segments (e.g. TSSes). Finally, the LDT is actually defined by a descriptor inside the GDT, while the GDT is directly defined by a linear address.
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a unit, it is necessary to limit their size in order to ensure that swapping can happen in a timely fashion. However, using smaller, more easily swappable segments means that segment registers must be reloaded more frequently which is itself a time-consuming operation.
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Loading a selector into a segment register reads the GDT or LDT entry at the time it is loaded, and caches the properties of the segment in a hidden register. Subsequent modifications to the GDT or LDT will not take effect until the segment register is reloaded.
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in order to define the characteristics of the various memory areas used during program execution, including the base address, the size, and access privileges like executability and writability. These memory areas are called
266:(IDT), in memory, every machine instruction referencing memory has an implicit segment register, occasionally two. Most of the time this segment register can be overridden by adding a segment prefix before the instruction.
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FS and GS are not constrained to 0, and they continue to be used as pointers to the offset of items such as the process environment block and the thread information block.
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segment offsets and limits, it is possible to make segments cover the entire addressable memory, which makes segment-relative addressing transparent to the user.
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LDT entries, pointed at the same physical memory areas and only created in the LDTs of processes which have requested access to a given shared memory area.
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processors have facilities for automatically switching the current LDT on specific machine events, but no facilities for automatically switching the GDT.
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507:(paged) address has also a selector in the LDT (typically this results in the LDT being filled with 64 KiB entries). This technique is sometimes called
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The lack of symmetry between both tables is underlined by the fact that the current LDT can be automatically switched on certain events, notably if
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If the operating system detects one of these modifications or any other unauthorized patch, it will generate a bug check and shut down the system.
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In order to reference a segment, a program must use its index inside the GDT or the LDT. Such an index is called a
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for multiple processes. There will be generally one LDT per user process, describing privately held memory, while
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to be used. Apart from the machine instructions which allow one to set/get the position of the GDT, and of the
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Every memory access performed by a process always goes through a segment. On the
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The references used may be made clearer with a different or consistent style of
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The GDT is a table of 8-byte entries. Each entry may refer to a
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of the GDT; attempting to do so will cause the machine to
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On x86 processors not having paging features, like the
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or LDTs. Call Gates and Task Gates are fine, however.
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may be too technical for most readers to understand
258:(or selector). The selector must be loaded into a
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572:Intel Architecture Software Developer's Manual
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347:. Unsourced material may be challenged and
50:Learn how and when to remove these messages
431:memory will be described by the GDT. The
367:Learn how and when to remove this message
176:Learn how and when to remove this message
158:Learn how and when to remove this message
142:, without removing the technical details.
103:Learn how and when to remove this message
540:"Patching Policy for x64-Based Systems"
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203:-family processors starting with the
140:make it understandable to non-experts
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546:from the original on 19 January 2022
345:adding citations to reliable sources
297:64-bit versions of Windows forbid
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31:This article has multiple issues.
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247:processor and later, because of
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39:or discuss these issues on the
603:Bran's Kernel Dev GDT Tutorial
447:are running on the computer).
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615:BrokenThorn Protected Mode
488:microprocessor introduced
264:Interrupt Descriptor Table
441:virtual machine monitors
403:certain system entries:
190:Global Descriptor Table
518:or in the Windows 3.1
395:and containing memory
381:Local Descriptor Table
309:Local Descriptor Table
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230:Local Descriptor Table
212:in Intel terminology.
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341:improve this section
397:segment descriptors
620:2018-04-23 at the
608:2008-02-03 at the
595:2009-02-14 at the
582:2009-10-17 at the
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550:11 December
486:Intel 80386
417:Intel 80286
216:Description
631:Categories
526:References
516:Windows NT
509:LDT tiling
232:(LDT), or
85:footnoting
36:improve it
577:GDT Table
328:does not
303:bug check
234:call gate
42:talk page
618:Archived
606:Archived
593:Archived
580:Archived
544:Archived
210:segments
81:citation
463:aliases
411:History
349:removed
334:sources
299:hooking
228:(TSS),
134:Please
496:code.
494:16-bit
490:paging
445:VMware
429:kernel
249:32-bit
443:like
245:80386
205:80286
198:Intel
552:2020
505:flat
501:OS/2
484:The
467:tiny
427:and
405:TSSs
332:any
330:cite
188:The
83:and
452:TSS
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391:in
385:LDT
343:by
201:x86
194:GDT
138:to
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