476:
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862:
167:. The chips were easier to lay out and more likely to function correctly, since their designs could be simulated more thoroughly prior to construction. Although the languages and tools have evolved, this general approach of specifying the desired behavior in a textual programming language and letting the tools derive the detailed physical design remains the basis of digital IC design today.
708:
3495:
316:
809:
Many EDA companies acquire small companies with software or other technology that can be adapted to their core business. Most of the market leaders are amalgamations of many smaller companies and this trend is helped by the tendency of software companies to design tools as accessories that fit
277:
Current digital flows are extremely modular, with front ends producing standardized design descriptions that compile into invocations of units similar to cells without regard to their individual technology. Cells implement logic or other electronic functions via the utilisation of a particular
698:
Functional safety synthesis, add reliability enhancements to structured elements (modules, RAMs, ROMs, register files, FIFOs) to improve fault detection / fault tolerance. This includes (not limited to) addition of error detection and / or correction codes (Hamming), redundant logic for fault
281:
Most analog circuits are still designed in a manual fashion, requiring specialist knowledge that is unique to analog design (such as matching concepts). Hence, analog EDA tools are far less modular, since many more functions are required, they interact more strongly and the components are, in
128:, responsible for generating a monochromatic exposure image, but even those copied digital recordings of mechanically drawn components. The process was fundamentally graphic, with the translation from electronics to graphics done manually; the best-known company from this era was
186:, a consortium of universities and fabricators that developed an inexpensive way to train student chip designers by producing real integrated circuits. The basic concept was to use reliable, low-cost, relatively low-technology IC processes and pack a large number of projects per
297:
facilities ("fabs") and additional individuals responsible for utilising the technology design-service companies who use EDA software to evaluate an incoming design for manufacturing readiness. EDA tools are also used for programming design functionality into
565:: starting with a proposed layout, compute the (approximate) electrical characteristics of every wire and device. Often used in conjunction with static timing analysis above to estimate the performance of the completed chip.
190:, with several copies of chips from each project remaining preserved. Cooperating fabricators either donated the processed wafers or sold them at cost, as they saw the program as helpful to their own long-term growth.
702:
Functional safety verification, running of a fault campaign, including insertion of faults into the design and verification that the safety mechanism reacts in an appropriate manner for the faults that are deemed
89:
chips. Since a modern semiconductor chip can have billions of components, EDA tools are essential for their design; this article in particular describes EDA specifically with respect to
251:. Simulators quickly followed these introductions, permitting direct simulation of chip designs and executable specifications. Within several years, back-ends were developed to perform
892:
585:, PV: checking if a design is physically manufacturable, and that the resulting chips will not have any function-preventing physical defects, and will meet original specifications.
278:
integrated circuit technology. Fabricators generally provide libraries of components for their production processes, with simulation models that fit standard simulation tools.
1422:
842:
334:
832:
1202:
1101:
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459:– Use of special purpose hardware to emulate the logic of a proposed design. Can sometimes be plugged into a system in place of a yet-to-be-built chip; this is called
159:
in 1980; considered the standard textbook for chip design. The result was an increase in the complexity of the chips that could be designed, with improved access to
1487:
1435:
2518:
847:
383:(additionally known as behavioral synthesis or algorithmic synthesis) – The high-level design description (e.g. in C/C++) is converted into
236:
as a hardware description language. Within a few years, there were many companies specializing in EDA, each with a slightly different emphasis.
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3200:
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3253:
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1604:
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695:(FIT) rates and diagnostic coverage metrics for designs in order to meet the compliance requirements for the desired safety integrity levels.
575:, solve Maxwell's equations directly for cases of interest in IC and PCB design. They are known for being slower but more accurate than the
3104:
837:
1528:
216:, had pursued EDA internally, with managers and developers beginning to spin out of these companies to concentrate on EDA as a business.
3258:
2537:
496:
matches specifications and executes tasks correctly. Includes dynamic functional verification via simulation, emulation, and prototypes.
199:
531:: attempts to prove, by mathematical methods, that the system has certain desired properties, and that some undesired effects (such as
2770:
2304:
1082:
Ousterhout, John K., Gordon T. Hamachi, Robert N. Mayo, Walter S. Scott, and George S. Taylor (1985). "The magic VLSI layout system".
175:
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1944:
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format is still in use today. By the mid-1970s, developers started to automate circuit design in addition to drafting and the first
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simulate and analyze the underlying process technology. Electrical properties of devices are derived directly from device physics
453:
Behavioral simulation – high-level simulation of a design's architectural operation, accurate at cycle-level or interface-level.
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or BIST – The installation of self-contained test-controllers to automatically test a logic or memory structure in the design
641:
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or the register transfer level, responsible for representing circuitry via the utilisation of interactions between registers.
699:
detection and fault tolerance (duplicate / triplicate) and protocol checks (interface parity, address alignment, beat count)
1027:
3319:
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3026:
3016:
1722:
559:: analysis of the timing of a circuit in an input-independent manner, hence finding a worst case over all possible inputs.
427:
170:
The earliest EDA tools were produced academically. One of the most famous was the "Berkeley VLSI Tools
Tarball", a set of
1491:
668:
or ATPG – The generation of pattern data systematically to exercise as many logic-gates and other components as possible.
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were designed by hand and manually laid out. Some advanced shops used geometric software to generate tapes for a
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204:
1981 marked the beginning of EDA as an industry. For many years, the larger electronic companies, such as
247:, another popular high-level design language, was first introduced as a hardware description language by
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814:; many new tools incorporate analog design and mixed systems. This is happening due to a trend to place
731:
721:
595:
582:
506:
502:
290:
78:
35:
407:– For standard cell digital, analog, RF-like Capture CIS in Orcad by Cadence and ISIS in Proteus.
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118:
90:
74:
1053:
Brayton, Robert K., Gary D. Hachtel, Curt McMullen, and
Alberto Sangiovanni-Vincentelli (1984).
1436:"Siemens acquires Mentor Graphics for $ 4.5 billion, eyes connected device, building expansion"
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436:– low-level transistor-simulation of a schematic/layout's behavior, accurate at device-level.
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Design flow primarily remains characterised via several primary components; these include:
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2159:
2104:
2019:
1134:
J. Lienig, J. Scheible (2020). "Chap. 6: Special Layout
Techniques for Analog IC Design".
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EDA for electronics has rapidly increased in importance with the continuous scaling of
268:
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2629:
2029:
1884:
1284:
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509:, but these checks/tools specialize in detecting and reporting potential issues like
286:
217:
182:, a computer-aided design platform. Another crucial development was the formation of
122:
86:
31:
17:
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were all founded around this time and collectively referred to as DMV. In 1981, the
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2129:
2119:
2004:
1974:
1348:
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886:
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2024:
1398:
645:
156:
152:
70:
1373:
1255:
J. Lienig, J. Scheible (2020). "Chap. 3.3: Mask Data: Layout Post
Processing".
861:
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RTL Linting for adherence to coding rules such as syntax, semantics, and style.
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2963:
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2009:
1994:
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of the layout. Examples of the latter are a seal ring and filler structures.
602:
510:
302:
or field-programmable gate arrays, customisable integrated circuit designs.
209:
1324:"Cadence Design Systems Inc (CDNS) Stock Price & News - Google Finance"
200:
Productivity-improving technologies § Semiconductor device fabrication
1558:
3006:
2369:
2319:
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2179:
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1984:
1969:
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739:
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2149:
2144:
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2134:
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2081:
2014:
1989:
1964:
1959:
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1835:
1805:
1742:
1737:
783:
546:
542:
398:
244:
2437:
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1999:
1924:
757:
397:
design description (e.g. written in
Verilog or VHDL) into a discrete
2496:
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2259:
2219:
2209:
1929:
1820:
763:
751:
706:
652:
effects occurring later when chip is manufactured using this mask.
474:
433:
213:
183:
174:
utilities used to design early VLSI systems. Widely used were the
133:
129:
774:
Market capitalization and company name as of
December 2011:
147:
The next era began following the publication of "Introduction to
2397:
2344:
2334:
2299:
1815:
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299:
233:
171:
2500:
1686:
1682:
1611:
VLSI Physical Design: From Graph
Partitioning to Timing Closure
1299:"Synopsys, Inc. (SNPS) Stock Price & News - Google Finance"
987:"EDA (Electronic Design Automation) - Where Electronics Begins"
936:
144:
catalogued the large majority of the developments of the time.
140:
tools were developed; as this occurred, the proceedings of the
1374:"Altium Limited (ALU) Stock Price & News - Google Finance"
309:
107:
1632:
Electronic Design
Automation For Integrated Circuits Handbook
1179:
Electronic Design
Automation For Integrated Circuits Handbook
660:– The generation of flat mask image from hierarchical design.
611:
which includes custom designations and structures to improve
628:
that enhances layout data with graphics operations, such as
106:
The earliest electronic design automation is attributed to
30:"ECAD" redirects here. For the Brazilian organization, see
1399:"Zuken Inc (6947) Stock Price & News - Google Finance"
1115:
Tomovich, Christine (1988). "MOSIS-A gateway to silicon".
786:
acquired Mentor in 2017 and renamed as
Siemens EDA in 2021
41:"Electronic design" redirects here. For the magazine, see
935:. Electronic Design Automation Consortium. Archived from
632:(RET) – methods for increasing the quality of the final
1028:"Carver Mead Awarded Kyoto Prize by Inamori Foundation"
330:
1668:
Combinatorial Algorithms for Integrated Circuit Layout
1462:"Mentor Finally Becomes Siemens EDA From January 2021"
893:
Foundations and Trends in Electronic Design Automation
810:
naturally into a larger vendor's suite of programs on
1648:, by Dirk Jansen et al., Kluwer Academic Publishers,
1590:
Fundamentals of Layout Design for Electronic Circuits
1258:
Fundamentals of Layout Design for Electronic Circuits
1137:
Fundamentals of Layout Design for Electronic Circuits
1057:. Vol. 2. Springer Science & Business Media.
959:"1966: Computer Aided Design Tools Developed for ICs"
85:
that chip designers use to design and analyze entire
1584:
http://www.staticfreesoft.com/documentsTextbook.html
178:, responsible for circuit complexity reductions and
3358:
3305:
3267:
3214:
3176:
3138:
3080:
2997:
2943:
2905:
2857:
2794:
2727:
2691:
2648:
2612:
2545:
2456:
2388:
2287:
2090:
1872:
1863:
1791:
1730:
1721:
843:
Asia and South Pacific Design Automation Conference
325:
may be too technical for most readers to understand
417:, like Layout in Orcad by Cadence, ARES in Proteus
833:International Conference on Computer-Aided Design
1586:Computer Aids for VLSI Design by Steven M. Rubin
1529:"EDA Innovation through Merger and Acquisitions"
1055:Logic minimization algorithms for VLSI synthesis
605:, utilised to physically manufacture the chip.
2536:Note: This template roughly follows the 2012
2512:
1698:
1551:"Semi Wiki:EDA Mergers and Acquisitions Wiki"
1514:"Synopsys to Acquire Magma Design Automation"
800:; Synopsys acquired SpringSoft in August 2012
711:PCB layout and schematic for connector design
239:The first trade show for EDA was held at the
8:
1201:: CS1 maint: multiple names: authors list (
1100:: CS1 maint: multiple names: authors list (
1067:: CS1 maint: multiple names: authors list (
1349:"ANSYS, Inc. (ANSS) Stock Price & News"
2519:
2505:
2497:
1869:
1727:
1705:
1691:
1683:
981:
979:
816:entire electronic systems on a single chip
793:; Synopsys acquired Magma in February 2012
549:, to ensure functional equivalence at the
541:: algorithmic comparison between a chip's
1646:The Electronic Design Automation Handbook
1488:"Synopsys to buy Magma for $ 507 million"
450:0/1) behavior, accurate at Boolean-level.
353:Learn how and when to remove this message
337:, without removing the technical details.
27:Software for designing electronic systems
848:Symposia on VLSI Technology and Circuits
924:
644:(ILT) – the up-front compensation for
622:with test patterns and alignment marks.
3229:Knowledge representation and reasoning
1425:. Google.com. Retrieved on 2013-08-10.
1194:
1177:Lavagno, Martin, and Scheffer (2006).
1093:
1060:
899:Signoff (electronic design automation)
3254:Philosophy of artificial intelligence
335:make it understandable to non-experts
7:
2580:Energy consumption (Green computing)
1634:, by Lavagno, Martin, and Scheffer,
838:Design Automation and Test in Europe
691:analysis, systematic computation of
3259:Distributed artificial intelligence
2538:ACM Computing Classification System
1613:, by Kahng, Lienig, Markov and Hu,
1486:Dylan McGrath (November 30, 2011).
1423:Company Comparison - Google Finance
1084:IEEE Design & Test of Computers
734:and company name as of March 2023:
2771:Integrated development environment
1557:. January 16, 2011. Archived from
1460:Dahad, Nitin (December 15, 2020).
1117:IEEE Circuits and Devices Magazine
598:or MDP - The generation of actual
545:-description and synthesized gate-
503:Clock domain crossing verification
176:Espresso heuristic logic minimizer
25:
3239:Automated planning and scheduling
2776:Software configuration management
1656:, 2003, available also in German
1592:, by Lienig, Scheible, Springer,
665:Automatic test pattern generation
630:resolution enhancement techniques
401:or representation of logic gates.
117:Prior to the development of EDA,
3493:
3483:
3474:
3473:
860:
314:
59:electronic computer-aided design
3484:
2887:Computational complexity theory
81:. The tools work together in a
2678:Network performance evaluation
1261:. Springer. pp. 102–110.
1140:. Springer. pp. 213–256.
642:inverse lithography technology
232:additionally began funding of
110:with the documentation of its
1:
3042:Multimedia information system
3027:Geographic information system
3017:Enterprise information system
2613:Computer systems organization
1945:Creo Elements/Direct Drafting
1012:Meade, Carver; Conway, Lynn.
569:Electromagnetic field solvers
428:Electronic circuit simulation
3520:Electronic design automation
3401:Computational social science
2989:Theoretical computer science
2809:Software development process
2585:Electronic design automation
2570:Very Large Scale Integration
828:Design Automation Conference
638:optical proximity correction
241:Design Automation Conference
142:Design Automation Conference
51:Electronic design automation
43:Electronic Design (magazine)
3224:Natural language processing
3012:Information storage systems
1014:Introduction to VLSI Design
446:or gate-netlist's digital (
442:– digital-simulation of an
393:– The translation of
293:operators, who operate the
289:technology. Some users are
3541:
3140:Human–computer interaction
3110:Intrusion detection system
3022:Social information systems
3007:Database management system
1527:Kirti Sikri Desai (2006).
904:Comparison of EDA software
719:
626:Layout-to-mask preparation
425:
369:
262:
230:U.S. Department of Defense
197:
40:
29:
3469:
3406:Computational engineering
3381:Computational mathematics
2534:
2485:
1619:10.1007/978-3-030-96415-3
1598:10.1007/978-3-030-39284-0
1490:. EETimes. Archived from
1267:10.1007/978-3-030-39284-0
1245:Retrieved January 2, 2023
1221:Semiconductor Engineering
1217:"Functional Verification"
1146:10.1007/978-3-030-39284-0
590:Manufacturing preparation
484:Analysis and verification
479:Schematic capture program
295:semiconductor fabrication
265:Integrated circuit design
249:Gateway Design Automation
3416:Computational healthcare
3411:Differentiable computing
3330:Graphics processing unit
2756:Domain-specific language
2625:Computational complexity
933:"About the EDA Industry"
505:(CDC check): similar to
114:computers in the 1950s.
3391:Computational chemistry
3325:Photograph manipulation
3216:Artificial intelligence
3032:Decision support system
2488:History of CAD software
2408:Open Cascade Technology
1758:Open Cascade Technology
1678:, Teubner Verlag, 1997.
963:Computer History Museum
791:Magma Design Automation
517:due to use of multiple
490:Functional verification
415:schematic-driven layout
57:), also referred to as
3525:Electronic engineering
3456:Educational technology
3287:Reinforcement learning
3037:Process control system
2935:Computational geometry
2925:Algorithmic efficiency
2920:Analysis of algorithms
2575:Systems on Chip (SoCs)
1955:DesignSpark Mechanical
1670:, by Thomas Lengauer,
1181:. Taylor and Francis.
746:Cadence Design Systems
712:
557:Static timing analysis
480:
79:printed circuit boards
34:. For other uses, see
3426:Electronic publishing
3396:Computational biology
3386:Computational physics
3282:Unsupervised learning
3196:Distributed computing
3072:Information retrieval
2979:Mathematical analysis
2969:Mathematical software
2859:Theory of computation
2824:Software construction
2814:Requirements analysis
2692:Software organization
2620:Computer architecture
2590:Hardware acceleration
2555:Printed circuit board
2245:SolidWorks Electrical
909:Platform-based design
876:Computer-aided design
822:Technical conferences
732:Market capitalization
722:List of EDA companies
720:Further information:
710:
636:. This also includes
596:Mask data preparation
583:Physical verification
478:
434:Transistor simulation
282:general, less ideal.
243:in 1984 and in 1986,
138:placement and routing
36:ECAD (disambiguation)
18:Hardware verification
3186:Concurrent computing
3158:Ubiquitous computing
3130:Application security
3125:Information security
2954:Discrete mathematics
2930:Randomized algorithm
2882:Computability theory
2867:Model of computation
2839:Software maintenance
2834:Software engineering
2796:Software development
2746:Programming language
2741:Programming paradigm
2658:Network architecture
1723:Free and open-source
539:Equivalence checking
462:in-circuit emulation
381:High-level synthesis
65:), is a category of
3461:Document management
3451:Operations research
3376:Enterprise software
3292:Multi-task learning
3277:Supervised learning
2999:Information systems
2829:Software deployment
2786:Software repository
2640:Real-time computing
1494:on October 25, 2012
796:NT$ 6.44 billion –
756:AU$ 4.88 billion –
525:Formal verification
226:Valid Logic Systems
161:design verification
119:integrated circuits
91:integrated circuits
75:integrated circuits
3244:Search methodology
3191:Parallel computing
3148:Interaction design
3057:Computing platform
2984:Numerical analysis
2974:Information theory
2766:Software framework
2729:Software notations
2668:Network components
2565:Integrated circuit
2110:AutoCAD Electrical
868:Electronics portal
750:$ 24.98 billion –
744:$ 56.68 billion –
738:$ 57.87 billion –
713:
673:Built-in self-test
481:
457:Hardware emulation
71:electronic systems
3507:
3506:
3436:Electronic voting
3366:Quantum Computing
3359:Applied computing
3345:Image compression
3115:Hardware security
3105:Security services
3062:Digital marketing
2849:Open-source model
2761:Modeling language
2673:Network scheduler
2494:
2493:
2283:
2282:
1950:Creo Elements/Pro
1905:Autodesk Inventor
1859:
1858:
1626:978-3-030-96414-6
1605:978-3-030-39284-0
1276:978-3-030-39284-0
1155:978-3-030-39284-0
1016:. Addison-Wesley.
939:on August 2, 2015
812:digital circuitry
778:$ 2.33 billion –
762:¥77.25 billion –
689:Functional safety
683:Functional safety
613:manufacturability
577:layout extraction
563:Layout extraction
405:Schematic capture
372:Design flow (EDA)
363:
362:
355:
273:Design flow (EDA)
16:(Redirected from
3532:
3497:
3496:
3487:
3486:
3477:
3476:
3297:Cross-validation
3269:Machine learning
3153:Social computing
3120:Network security
2915:Algorithm design
2844:Programming team
2804:Control variable
2781:Software library
2719:Software quality
2714:Operating system
2663:Network protocol
2528:Computer science
2521:
2514:
2507:
2498:
2390:Modeling kernels
1870:
1728:
1707:
1700:
1693:
1684:
1571:
1570:
1568:
1566:
1561:on April 3, 2019
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1223:. March 17, 2017
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929:
914:Silicon compiler
870:
865:
864:
789:$ 507 million –
440:Logic simulation
413:– usually
358:
351:
347:
344:
338:
318:
317:
310:
306:Software focuses
194:Commercial birth
165:logic simulation
163:tools that used
21:
3540:
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3535:
3534:
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3531:
3530:
3529:
3510:
3509:
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3503:
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3465:
3446:Word processing
3354:
3340:Virtual reality
3301:
3263:
3234:Computer vision
3210:
3206:Multiprocessing
3172:
3134:
3100:Security hacker
3076:
3052:Digital library
2993:
2944:Mathematics of
2939:
2901:
2877:Automata theory
2872:Formal language
2853:
2819:Software design
2790:
2723:
2709:Virtual machine
2687:
2683:Network service
2644:
2635:Embedded system
2608:
2541:
2530:
2525:
2495:
2490:
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2452:
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2279:
2160:DesignSpark PCB
2105:Altium Designer
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1034:. June 17, 2022
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780:Mentor Graphics
772:
729:
724:
718:
693:failure in time
685:
657:Mask generation
592:
535:) cannot occur.
486:
430:
424:
391:Logic synthesis
374:
368:
359:
348:
342:
339:
331:help improve it
328:
319:
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275:
263:Main articles:
261:
253:logic synthesis
222:Mentor Graphics
206:Hewlett-Packard
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3201:Multithreading
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3095:Formal methods
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3067:World Wide Web
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2190:IntegraStation
2187:
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2035:Grasshopper 3D
2027:
2022:
2017:
2012:
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2002:
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1992:
1987:
1982:
1977:
1972:
1967:
1962:
1957:
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1947:
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1937:
1932:
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1910:Autodesk Revit
1907:
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1900:Autodesk Alias
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1478:
1452:
1427:
1415:
1403:www.google.com
1390:
1378:www.google.com
1365:
1353:Google Finance
1340:
1328:www.google.com
1315:
1303:www.google.com
1290:
1275:
1247:
1234:
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1187:
1169:
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1126:
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1004:
993:. May 25, 2013
975:
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882:Circuit design
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623:
620:reticle layout
616:
609:Chip finishing
591:
588:
587:
586:
580:
566:
560:
554:
536:
529:model checking
522:
521:in the design.
515:meta-stability
500:
497:
485:
482:
473:
472:
469:Technology CAD
466:
454:
451:
437:
426:Main article:
423:
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370:Main article:
367:
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322:
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269:Design closure
260:
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195:
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103:
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69:for designing
67:software tools
26:
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14:
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10:
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2:
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3335:Mixed reality
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2630:Dependability
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2042:rattleCAD 4.0
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2030:Rhinoceros 3D
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32:ECAD (Brazil)
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3431:Cyberwarfare
3090:Cryptography
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2433:ShapeManager
2288:File formats
2155:Delta Design
2130:CircuitMaker
2120:BoardStation
2091:
2005:MicroStation
1792:
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1559:the original
1555:SemiWiki.com
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1492:the original
1481:
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927:
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887:EDA database
808:
805:Acquisitions
773:
730:
671:
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650:interference
625:
619:
618:Producing a
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146:
126:photoplotter
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3441:Video games
3421:Digital art
3178:Concurrency
3047:Data mining
2959:Probability
2699:Interpreter
2025:Pro/DESKTOP
1865:Proprietary
1358:December 4,
1123:(2): 22–23.
1090:(1): 19–30.
646:diffraction
600:lithography
157:Lynn Conway
153:Carver Mead
83:design flow
3514:Categories
3499:Glossaries
3371:E-commerce
2964:Statistics
2907:Algorithms
2704:Middleware
2560:Peripheral
2443:IntelliCAD
2092:Electrical
2067:T-FLEX CAD
2062:SpaceClaim
2057:SolidWorks
2052:Solid Edge
1995:KeyCreator
1980:Fusion 360
1873:Mechanical
1793:Electrical
1783:SolveSpace
1731:Mechanical
1531:. EDA Cafe
1188:0849330963
1038:January 1,
997:January 1,
968:January 1,
920:References
798:SpringSoft
603:photomasks
571:, or just
492:: ensures
422:Simulation
259:Modern day
198:See also:
112:700 series
102:Early days
3320:Rendering
3315:Animation
2946:computing
2897:Semantics
2595:Processor
2470:Sketchpad
2428:KernelCAD
2413:Parasolid
2275:Xpedition
2265:Ultiboard
2200:Micro-Cap
2185:FreeStyle
2072:Tinkercad
1773:rattleCAD
1535:March 23,
1471:March 23,
1445:March 23,
1408:March 23,
1383:March 23,
1333:March 23,
1308:March 23,
1285:215840278
1227:April 10,
1197:cite book
1164:215840278
1063:cite book
716:Companies
640:(OPC) or
634:photomask
511:data loss
210:Tektronix
3479:Category
3307:Graphics
3082:Security
2751:Compiler
2650:Networks
2547:Hardware
2270:Upverter
2240:Pulsonix
2205:Multisim
2180:Easytrax
2165:DipTrace
2115:Autotrax
2077:TurboCAD
1985:GstarCAD
1935:Cimatron
1920:BricsCAD
1915:AutoTURN
1890:ArchiCAD
1880:ABViewer
1851:XCircuit
1826:kTechLab
1811:Fritzing
1801:Electric
1763:OpenSCAD
1753:LibreCAD
1748:HeeksCAD
1716:software
1565:April 3,
1498:July 17,
1466:EE Times
943:July 29,
854:See also
740:Synopsys
703:covered.
533:deadlock
132:, whose
73:such as
3489:Outline
2476:UNISURF
2423:Romulus
2355:OpenDWG
2235:Proteus
2195:LTspice
2175:EasyEDA
2150:CR-8000
2145:CR-5000
2140:CR-3000
2135:CR-2000
2125:CADSTAR
2100:Allegro
2082:VariCAD
2015:Onshape
1990:IRONCAD
1965:FastCAD
1960:EasyCAD
1895:AutoCAD
1841:Oregano
1836:ngspice
1806:FreePCB
1743:FreeCAD
1738:BRL-CAD
1032:Caltech
784:Siemens
770:Defunct
727:Current
551:logical
547:netlist
527:, also
507:linting
448:Boolean
399:netlist
329:Please
291:foundry
245:Verilog
97:History
93:(ICs).
2478:(1968)
2472:(1963)
2466:(1963)
2438:Teigha
2365:PSpice
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2210:OrCAD
2170:EAGLE
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1831:Magic
1821:KiCad
1577:Notes
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1281:S2CID
1160:S2CID
878:(CAD)
764:Zuken
752:Ansys
300:FPGAs
214:Intel
188:wafer
184:MOSIS
180:Magic
134:GDSII
130:Calma
2731:and
2604:Form
2600:Size
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2375:STEP
2345:IGES
2330:DWFX
2300:ACIS
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1970:FINE
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1816:gEDA
1768:QCAD
1672:ISBN
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