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149:, Nanotronics, which was later acquired by Patriot Scientific Corporation. The processor is one of the few commercially produced microprocessors that use a stack-based computing model. Target applications for this unique architecture were mainly embedded devices (due to the processor's low power use) and efficient implementation of virtual stack machines, such as the
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Up to four instructions can be read on each instruction fetch, reducing memory-bandwidth requirements compared to typical 32 BIT RISC machines
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This characteristic also allows looping on an instruction group (a micro-loop) without additional instruction fetches from memory
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145:(RISC) microprocessor architecture. The architecture was originally developed by Russell H. Fish III and
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Besides its unusual two stack-based architecture, the processor had several other valuable features:
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Near Native speed Java interpretation with no JIT required, in approximately 20K bytes of code
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228:"25 Microchips That Shook the World § Computer Cowboys Sh-Boom Processor (1988)"
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programming language. The product was unsuccessful in the market.
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240:"IGNITE™ Intellectual Property Reference Manual"
245:. Patriot Scientific Corporation. March 2002.
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211:. Patriot Scientific Corporation. 99-037001.
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208:PSC1000™ Microprocessor Reference Manual
178:Single cycle (+ memory) sub-routine call
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169:Runs faster than the clock internally
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153:or the stack machine underlying the
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143:reduced instruction set computer
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226:Santo, Brian (1 May 2009).
181:Implicit sub-routine return
57:; 30 years ago
28:An Ignite Ia microprocessor
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230:. History of Technology.
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265:32-bit microprocessors
114:52 (including stacks)
151:Java virtual machine
205:Shaw, G.W. (1999).
187:Low power operation
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138:) is a two stack,
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37:Nanotronics, PTSC
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254:Categories
192:References
123:(formerly
93:Endianness
52:Introduced
103:Registers
129:PSC 1000
34:Designer
60: (
125:ShBoom
121:Ignite
71:Design
46:32-bit
17:Ignite
243:(PDF)
155:Forth
135:GNITE
127:and
82:Type
76:RISC
62:1994
55:1994
42:Bits
97:Big
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133:I
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