477:
40:
2329:
152:. Intel technologies require each speed range of RAM to have its own interface, resulting in a more complex motherboard layout but with fewer bottlenecks. HTX 3.1 at 26 GB/s can serve as a unified bus for as many as four DDR4 sticks running at the fastest proposed speeds. Beyond that DDR4 RAM may require two or more HTX 3.1 buses diminishing its value as unified transport.
191:/s (3.2 GHz × 2 transfers per clock cycle × 32 bits per link) per direction, or 51.2 GB/s aggregated throughput, making it faster than most existing bus standard for PC workstations and servers as well as making it faster than most bus standards for high-performance computing and networking.
432:
router needs a maximum 8000 Mbit/s of internal bandwidth (1000 Mbit/s × 4 ports × 2 directions)—HyperTransport greatly exceeds the bandwidth this application requires. However a 4 + 1 port 10 Gb router would require 100 Gbit/s of internal bandwidth. Add to that 802.11ac 8 antennas
238:
words, regardless of the physical width of the link. The first word in a packet always contains a command field. Many packets contain a 40-bit address. An additional 32-bit control packet is prepended when 64-bit addressing is required. The data payload is sent after the control packet. Transfers are
1079:
CPUs, the "SDF" data interconnects are run at the same frequency as the DRAM memory clock (MEMCLK), a decision made to remove the latency caused by different clock speeds. As a result, using a faster RAM module makes the entire bus faster. The links are 32-bit wide, as in HT, but 8 transfers are
273:
specification. This means that changes in processor sleep states (C states) can signal changes in device states (D states), e.g. powering off disks when the CPU goes to sleep. HyperTransport 3.0 added further capabilities to allow a centralized power management controller to implement power
959:
use up to three 16-bit HyperTransport links. Common clock rates for these processor links are 800 MHz to 1 GHz (older single and multi socket systems on 754/939/940 links) and 1.6 GHz to 2.0 GHz (newer single socket systems on AM2+/AM3 links—most newer CPUs using
242:
HyperTransport packets enter the interconnect in segments known as bit times. The number of bit times required depends on the link width. HyperTransport also supports system management messaging, signaling interrupts, issuing probes to adjacent devices or processors,
964:
GHz). While HyperTransport itself is capable of 32-bit width links, that width is not currently utilized by any AMD processors. Some chipsets though do not even utilize the 16-bit width used by the processors. Those include the Nvidia
1088:
CPUs, the IF bus is on a separate clock, either in a 1:1 or 2:1 ratio to the DRAM clock, because of Zen's early problems with high-speed DRAM affecting IF speed, and therefore system stability. The bus width has also been doubled. On
247:
transactions, and general data transactions. There are two kinds of write commands supported: posted and non-posted. Posted writes do not require a response from the target. This is usually used for high bandwidth devices such as
256:
transfers. Non-posted writes require a response from the receiver in the form of a "target done" response. Reads also require a response, containing the read data. HyperTransport supports the PCI consumer/producer ordering model.
535:
In August 2008, the HyperTransport
Consortium released HTX3, which extends the clock rate of HTX to 2.6 GHz (5.2 GT/s, 10.7 GTi, 5.2 real GHz data rate, 3 MT/s edit rate) and retains backwards compatibility.
210:
as appropriate. It also supports link splitting, where a single 16-bit link can be divided into two 8-bit links. The technology also typically has lower latency than other solutions due to its lower overhead.
318:
In contrast, HyperTransport is an open specification, published by a multi-company consortium. A single HyperTransport adapter chip will work with a wide spectrum of HyperTransport enabled microprocessors.
484:
A connector specification that allows a slot-based peripheral to have direct connection to a microprocessor using a HyperTransport interface was released by the HyperTransport
Consortium. It is known as
183:
HyperTransport supports an autonegotiated bit width, ranging from 2 to 32 bits per link; there are two unidirectional links per HyperTransport bus. With the advent of version 3.1, using full
1048:) is a superset of HyperTransport announced by AMD in 2016 as an interconnect for its GPUs and CPUs. It is also usable as interchip interconnect for communication between CPUs and GPUs (for
180:. This allows for a maximum data rate of 6400 MT/s when running at 3.2 GHz. The operating frequency is autonegotiated with the motherboard chipset (North Bridge) in current computing.
139:
457:
available. Companies such as XtremeData, Inc. and DRC take these FPGAs (Xilinx in DRC's case) and create a module that allows FPGAs to plug directly into the
Opteron socket.
299:
bus directly, but must first go through an adapter to expand the system. The proprietary front-side bus must connect through adapters for the various standard buses, like
441:
The issue of latency and bandwidth between CPUs and co-processors has usually been the major stumbling block to their practical implementation. Co-processors such as
433:
and the WiGig 60 GHz standard (802.11ad) and HyperTransport becomes more feasible (with anywhere between 20 and 24 lanes used for the needed bandwidth).
424:. Routers and switches have multiple network interfaces, and must forward data between these ports as fast as possible. For example, a four-port, 1000
1769:
1538:
1505:
270:
1156:
2297:
445:
have appeared that can access the HyperTransport bus and become integrated on the motherboard. Current generation FPGAs from both main manufacturers (
1926:
454:
1376:
1789:
1244:
1596:
1281:
1207:
1318:
1977:
1648:
1093:
and later CPUs, the IF bus is able to run at an asynchronous clock to the DRAM, to allow the higher clock speeds that DDR5 is capable of.
2324:
Interfaces are listed by their speed in the (roughly) ascending order, so the interface at the end of each section should be the fastest.
1451:
1157:"API NetWorks Accelerates Use of HyperTransport Technology With Launch of Industry's First HyperTransport Technology-to-PCI Bridge Chip"
2030:
1869:
1799:
215:
1859:
1049:
1178:
1957:
408:
extends this concept to larger clusters. The Aqua device from 3Leaf
Systems virtualizes and interconnects CPUs, memory, and I/O.
187:
links and utilizing the full HyperTransport 3.1 specification's operating frequency, the theoretical transfer rate is 25.6
231:
1749:
1033:. Because of this potential for confusion, the HyperTransport Consortium always uses the written-out form: "HyperTransport."
505:
slot (plus an x1 connector for power pins), HTX allows development of plug-in cards that support direct access to a CPU and
2301:
1952:
1921:
358:
222:. HyperTransport 3.0 added scrambling and receiver phase alignment as well as optional transmitter precursor deemphasis.
1349:
1080:
done per cycle (128-bit packets) compared to the original 2. Electrical changes are made for higher power efficiency. On
2356:
1899:
1117:
292:
2225:
2164:
2019:
1683:
1122:
1824:
1589:
973:
M1689—which use a 16-bit HyperTransport downstream link but limit the HyperTransport upstream link to 8 bits.
1526:
1879:
744:
370:
300:
82:
1546:
1164:
2351:
2332:
2307:
2199:
1854:
1574:
1065:
311:
305:
96:
1889:
596:
591:
586:
581:
576:
571:
67:
2361:
2153:
2106:
1962:
1734:
1582:
1554:
1102:
249:
71:
59:
1384:
476:
2149:
2002:
1884:
1477:
1255:
506:
389:
253:
63:
1292:
1218:
468:. This initiative opened their "Socket F" to plug-in boards such as those from XtremeData and DRC.
2061:
1616:
1407:
544:
The "DUT" test connector is defined to enable standardized functional test system interconnection.
78:
39:
1605:
1069:
417:
401:
350:
303:
or PCI Express. These are typically included in the respective controller functions, namely the
130:
The current specification HTX 3.1 remained competitive for 2014 high-speed (2666 and 3200
2051:
1673:
1609:
751:
733:
670:
142:
124:
1784:
766:
603:
464:
on
September 21, 2006, to further promote the usage of HyperTransport for plug-in cards and
266:
173:
1914:
1764:
1744:
1619:
1002:
518:
377:
31:
194:
Links of various widths can be mixed together in a single system configuration as in one
1189:
2215:
1834:
1759:
1663:
1638:
1112:
421:
373:
326:
288:
149:
75:
2345:
2287:
2174:
2066:
2014:
1997:
1779:
1678:
1668:
1643:
1478:"AMD Addresses Zen 4 Ryzen 7000 Series Memory Overclocking And Configuration Details"
1107:
148:
flash RAM) technology—a wider range of RAM speeds on a common CPU bus than any Intel
2024:
1967:
1819:
1724:
932:
739:
465:
385:
177:
131:
120:
218:(LVDS) operating at 1.2 V. HyperTransport 2.0 added post-cursor transmitter
2292:
2271:
2194:
2189:
2034:
1972:
1947:
1874:
1658:
1653:
1127:
629:
617:
502:
296:
239:
always padded to a multiple of 32 bits, regardless of their actual length.
176:" connection, meaning it sends data on both the rising and falling edges of the
108:
165:
HyperTransport comes in four versions—1.x, 2.0, 3.0, and 3.1—which run from 200
17:
2145:
1844:
1633:
1432:
1353:
1326:
1010:
948:
729:
722:
717:
712:
707:
660:
610:
342:
219:
207:
145:
116:
89:
2169:
2159:
2126:
2121:
2056:
1931:
1719:
1704:
1699:
1006:
940:
936:
928:
760:
650:
501:). Using a reversed instance of the same mechanical connector as a 16-lane
354:
346:
338:
334:
100:
480:
Connectors from top to bottom: HTX, PCI-Express for riser card, PCI-Express
202:
link to a peripheral device, which allows for a wider interconnect between
2179:
2116:
1849:
1709:
952:
755:
701:
695:
666:
625:
461:
429:
291:, which is different for every type of Intel processor. For instance, a
188:
951:
series and later use one 16-bit HyperTransport link. AMD Athlon 64 FX (
2312:
2266:
2250:
2076:
1894:
1839:
1774:
1729:
1132:
966:
956:
944:
686:
405:
381:
330:
27:
Computer processor interconnection technology first introduced in 2001
2245:
2136:
2111:
2101:
2096:
2091:
2086:
1904:
1794:
1754:
1714:
682:
676:
514:
450:
446:
235:
195:
184:
104:
2230:
2141:
85:
is in charge of promoting and developing HyperTransport technology.
1076:
287:
The primary use for HyperTransport is to replace the Intel-defined
2240:
2131:
2071:
2009:
1982:
1864:
1814:
1739:
1280:
Holden, Brian; Meschke, Mike; Abu-Lebdeh, Ziad; D'Orfani, Renato.
1137:
1090:
1085:
1081:
998:
643:
556:
475:
442:
199:
38:
1511:
2235:
2220:
2081:
1992:
1987:
1829:
1452:"AMD Zen 2 Microarchitecture Analysis: Ryzen 3000 and EPYC Rome"
425:
397:
380:
extension as part of their Direct
Connect Architecture in their
135:
1578:
2184:
1809:
1804:
970:
656:
562:
553:
510:
322:
244:
203:
169:
112:
93:
692:
nForce
Professional MCPs (Media and Communication Processor)
981:
There has been some marketing confusion between the use of
1056:. The company said the Infinity Fabric would scale from 30
453:) directly support the HyperTransport interface, and have
1560:
369:
Another use for HyperTransport is as an interconnect for
1013:
microprocessors. Hyper-Threading is officially known as
1282:"DUT Connector and Test Environment for HyperTransport"
376:
computers. AMD used HyperTransport with a proprietary
521:, among others, have released HTX compliant systems.
1206:
Emberson, David; Holden, Brian (December 12, 2007).
2280:
2259:
2208:
2044:
1940:
1692:
1626:
58:, is a technology for interconnection of computer
400:server CPUs is a superset of HyperTransport. The
1009:-based and the newer Nehalem and Westmere-based
1927:Coherent Accelerator Processor Interface (CAPI)
1072:GPUs which were subsequently released in 2017.
234:-based, where each packet consists of a set of
134:/s or about 10.4 GB/s and 12.8 GB/s)
111:chipsets. HyperTransport has also been used by
1163:(Press release). April 2, 2001. Archived from
390:Dual Socket Direct Connect (DSDC) Architecture
1590:
689:series (link between North and South Bridges)
8:
416:HyperTransport can also be used as a bus in
1408:"AMD's CPU-to-GPU Infinity Fabric Detailed"
214:Electrically, HyperTransport is similar to
81:that was introduced on April 2, 2001. The
34:, which is also sometimes abbreviated "HT".
1597:
1583:
1575:
559:and Direct Connect Architecture based CPUs
524:The original HTX standard is limited to 16
271:Advanced Configuration and Power Interface
513:. The initial card for this slot was the
777:
206:, and a lower bandwidth interconnect to
123:machines, as well as a number of modern
1556:Center of Excellence for HyperTransport
1148:
632:) HyperTransport SystemI/O controllers
172:to 3.2 GHz. It is also a DDR or "
43:Logo of the HyperTransport Consortium
7:
472:Add-on card connector (HTX and HTX3)
393:
88:HyperTransport is best known as the
1559:(in German), Uni HD, archived from
1375:Merritt, Rick (December 13, 2016).
517:InfiniPath InfiniBand HCA. IBM and
325:used HyperTransport to replace the
138:RAM and slower (around 1 GB/s
1476:Killian, Zak (September 1, 2022).
216:low-voltage differential signaling
25:
1243:Emberson, David (June 25, 2008).
1050:Heterogeneous System Architecture
2328:
2327:
795:Max. aggregate bandwidth (GB/s)
460:AMD started an initiative named
412:Router or switch bus replacement
265:HyperTransport also facilitates
1450:Cutress, Ian (June 10, 2019).
1406:Alcorn, Paul (March 5, 2020).
1377:"AMD Clocks Ryzen at 3.4 GHz+"
993:ransport and the later use of
969:150, nForce3 Pro 150, and the
1:
1922:Intel Ultra Path Interconnect
361:families of microprocessors.
1900:Intel QuickPath Interconnect
1890:Direct Media Interface (DMI)
1433:"Infinity Fabric (IF) - AMD"
1118:Intel QuickPath Interconnect
269:as it is compliant with the
198:link to another CPU and one
1254:. p. 4. Archived from
1217:. p. 4. Archived from
1123:List of interface bit rates
1052:), an arrangement known as
365:Multiprocessor interconnect
2378:
1885:Compute Express Link (CXL)
1539:"Technical Specifications"
283:Front-side bus replacement
29:
2321:
2122:IEEE-1284 (parallel port)
2037:logical device interface)
1507:HyperTransport Consortium
1289:HyperTransport Consortium
1252:HyperTransport Consortium
1215:HyperTransport Consortium
1186:HyperTransport Consortium
1161:HyperTransport Consortium
1064:GB/s, and be used in the
794:
791:
788:
785:
780:
437:Co-processor interconnect
295:cannot be plugged into a
83:HyperTransport Consortium
62:. It is a bidirectional
774:Frequency specifications
661:PowerPC 970 northbridges
97:central processing units
56:Lightning Data Transport
30:Not to be confused with
1350:"AMD_presentation_EPYC"
1317:Apple (June 25, 2003).
806:32-bit unidirectional*
1684:List of bus bandwidths
1510:(home), archived from
803:16-bit unidirectional
646:QuantumFlow Processors
481:
392:) line of processors.
44:
1103:Elastic interface bus
1054:Infinity Architecture
653:project (MPL licence)
479:
274:management policies.
250:uniform memory access
54:), formerly known as
42:
2127:IEEE-1394 (FireWire)
1865:PCI Extended (PCI-X)
1298:on September 3, 2006
1245:"HTX3 specification"
1167:on October 10, 2006.
763:TM8000 Efficeon CPUs
254:direct memory access
141:similar to high end
2357:Macintosh internals
1968:Parallel ATA (PATA)
1563:on October 29, 2008
1319:"WWDC 2003 Keynote"
1208:"HTX specification"
659:CPC925 and CPC945 (
107:and the associated
79:point-to-point link
1875:PCI Express (PCIe)
1549:on August 22, 2008
1514:on August 22, 2008
1356:on August 21, 2017
789:Max. HT frequency
769:chipsets K8 series
618:Radeon Xpress 3200
482:
402:HORUS interconnect
230:HyperTransport is
45:
2339:
2338:
2325:
2052:Apple Desktop Bus
2029:PCI Express (via
1988:Serial ATA (SATA)
1674:Network on a chip
1387:on August 8, 2019
1195:on July 16, 2011.
925:
924:
747:Thread Processors
723:nForce 900 series
718:nForce 700 series
713:nForce 600 series
708:nForce 500 series
620:for AMD processor
613:for AMD processor
611:Radeon Xpress 200
16:(Redirected from
2369:
2331:
2330:
2323:
1785:HP Precision Bus
1599:
1592:
1585:
1576:
1571:
1570:
1568:
1550:
1545:, archived from
1533:
1522:
1521:
1519:
1493:
1492:
1490:
1488:
1473:
1467:
1466:
1464:
1462:
1447:
1441:
1440:
1429:
1423:
1422:
1420:
1418:
1403:
1397:
1396:
1394:
1392:
1383:. Archived from
1372:
1366:
1365:
1363:
1361:
1352:. Archived from
1345:
1339:
1338:
1336:
1334:
1325:. Archived from
1314:
1308:
1307:
1305:
1303:
1297:
1291:. Archived from
1286:
1277:
1271:
1270:
1268:
1266:
1261:on March 8, 2012
1260:
1249:
1240:
1234:
1233:
1231:
1229:
1224:on March 8, 2012
1223:
1212:
1203:
1197:
1196:
1194:
1188:. Archived from
1183:
1175:
1169:
1168:
1153:
1068:-based CPUs and
1063:
1059:
1005:feature on some
963:
931:, Athlon 64 FX,
792:Max. link width
778:
679:nForce chipsets
531:
527:
267:power management
174:double data rate
168:
92:architecture of
21:
2377:
2376:
2372:
2371:
2370:
2368:
2367:
2366:
2342:
2341:
2340:
2335:
2326:
2317:
2276:
2255:
2204:
2117:IEEE-488 (GPIB)
2040:
1936:
1915:Infinity Fabric
1745:Europe Card Bus
1688:
1622:
1603:
1566:
1564:
1553:
1537:
1525:
1517:
1515:
1504:
1501:
1496:
1486:
1484:
1475:
1474:
1470:
1460:
1458:
1449:
1448:
1444:
1431:
1430:
1426:
1416:
1414:
1405:
1404:
1400:
1390:
1388:
1374:
1373:
1369:
1359:
1357:
1347:
1346:
1342:
1332:
1330:
1329:on July 8, 2012
1316:
1315:
1311:
1301:
1299:
1295:
1284:
1279:
1278:
1274:
1264:
1262:
1258:
1247:
1242:
1241:
1237:
1227:
1225:
1221:
1210:
1205:
1204:
1200:
1192:
1181:
1177:
1176:
1172:
1155:
1154:
1150:
1146:
1099:
1061:
1057:
1042:Infinity Fabric
1039:
1037:Infinity Fabric
1003:Hyper-Threading
979:
961:
800:bi-directional
782:
776:
649:ht_tunnel from
568:AMD-8000 series
550:
548:Implementations
542:
529:
525:
474:
439:
414:
394:Infinity Fabric
378:cache coherency
367:
285:
280:
263:
228:
226:Packet-oriented
166:
163:
161:Links and rates
158:
35:
32:Hyper-Threading
28:
23:
22:
18:Infinity Fabric
15:
12:
11:
5:
2375:
2373:
2365:
2364:
2359:
2354:
2352:Computer buses
2344:
2343:
2337:
2336:
2322:
2319:
2318:
2316:
2315:
2310:
2305:
2295:
2290:
2284:
2282:
2278:
2277:
2275:
2274:
2269:
2263:
2261:
2257:
2256:
2254:
2253:
2248:
2243:
2238:
2233:
2228:
2226:Intel HD Audio
2223:
2218:
2216:ADAT Lightpipe
2212:
2210:
2206:
2205:
2203:
2202:
2197:
2192:
2187:
2182:
2177:
2172:
2167:
2162:
2157:
2139:
2134:
2129:
2124:
2119:
2114:
2109:
2104:
2099:
2094:
2089:
2084:
2079:
2074:
2069:
2064:
2059:
2054:
2048:
2046:
2042:
2041:
2039:
2038:
2027:
2022:
2017:
2012:
2007:
2006:
2005:
2000:
1990:
1985:
1980:
1975:
1970:
1965:
1960:
1955:
1950:
1944:
1942:
1938:
1937:
1935:
1934:
1929:
1924:
1919:
1918:
1917:
1910:HyperTransport
1907:
1902:
1897:
1892:
1887:
1882:
1877:
1872:
1867:
1862:
1857:
1852:
1847:
1842:
1837:
1832:
1827:
1822:
1817:
1812:
1807:
1802:
1797:
1792:
1787:
1782:
1777:
1772:
1767:
1762:
1757:
1752:
1747:
1742:
1737:
1732:
1727:
1722:
1717:
1712:
1707:
1702:
1696:
1694:
1690:
1689:
1687:
1686:
1681:
1676:
1671:
1666:
1664:Bus contention
1661:
1656:
1651:
1646:
1641:
1639:Front-side bus
1636:
1630:
1628:
1624:
1623:
1620:computer buses
1604:
1602:
1601:
1594:
1587:
1579:
1573:
1572:
1551:
1543:HyperTransport
1535:
1531:HyperTransport
1523:
1500:
1499:External links
1497:
1495:
1494:
1468:
1442:
1424:
1412:Tom's Hardware
1398:
1367:
1340:
1309:
1272:
1235:
1198:
1170:
1147:
1145:
1142:
1141:
1140:
1135:
1130:
1125:
1120:
1115:
1113:Front-side bus
1110:
1105:
1098:
1095:
1038:
1035:
978:
975:
923:
922:
919:
916:
913:
910:
907:
904:
900:
899:
896:
893:
890:
887:
884:
881:
877:
876:
873:
870:
867:
864:
861:
858:
854:
853:
850:
847:
844:
841:
838:
835:
831:
830:
827:
824:
821:
818:
815:
812:
808:
807:
804:
801:
797:
796:
793:
790:
787:
784:
781:HyperTransport
775:
772:
771:
770:
764:
758:
748:
742:
737:
727:
726:
725:
720:
715:
710:
705:
699:
693:
690:
674:
664:
654:
647:
641:
640:
639:
636:
623:
622:
621:
614:
601:
600:
599:
597:AMD 900 series
594:
592:AMD 800 series
589:
587:AMD 700 series
584:
582:AMD 690 series
579:
577:AMD 580 series
574:
572:AMD 480 series
569:
560:
549:
546:
541:
538:
509:to the system
473:
470:
438:
435:
413:
410:
396:used with the
374:multiprocessor
366:
363:
327:front-side bus
289:front-side bus
284:
281:
279:
276:
262:
259:
227:
224:
162:
159:
157:
154:
150:front-side bus
48:HyperTransport
26:
24:
14:
13:
10:
9:
6:
4:
3:
2:
2374:
2363:
2360:
2358:
2355:
2353:
2350:
2349:
2347:
2334:
2320:
2314:
2311:
2309:
2306:
2303:
2299:
2296:
2294:
2291:
2289:
2288:Multidrop bus
2286:
2285:
2283:
2279:
2273:
2270:
2268:
2265:
2264:
2262:
2258:
2252:
2249:
2247:
2244:
2242:
2239:
2237:
2234:
2232:
2229:
2227:
2224:
2222:
2219:
2217:
2214:
2213:
2211:
2207:
2201:
2198:
2196:
2195:External PCIe
2193:
2191:
2188:
2186:
2183:
2181:
2178:
2176:
2175:Parallel SCSI
2173:
2171:
2168:
2166:
2163:
2161:
2158:
2155:
2151:
2147:
2143:
2140:
2138:
2135:
2133:
2130:
2128:
2125:
2123:
2120:
2118:
2115:
2113:
2110:
2108:
2105:
2103:
2100:
2098:
2095:
2093:
2090:
2088:
2085:
2083:
2080:
2078:
2075:
2073:
2070:
2068:
2067:Commodore bus
2065:
2063:
2060:
2058:
2055:
2053:
2050:
2049:
2047:
2043:
2036:
2032:
2028:
2026:
2023:
2021:
2018:
2016:
2015:Fibre Channel
2013:
2011:
2008:
2004:
2001:
1999:
1996:
1995:
1994:
1991:
1989:
1986:
1984:
1981:
1979:
1976:
1974:
1971:
1969:
1966:
1964:
1961:
1959:
1956:
1954:
1951:
1949:
1946:
1945:
1943:
1939:
1933:
1930:
1928:
1925:
1923:
1920:
1916:
1913:
1912:
1911:
1908:
1906:
1903:
1901:
1898:
1896:
1893:
1891:
1888:
1886:
1883:
1881:
1878:
1876:
1873:
1871:
1868:
1866:
1863:
1861:
1858:
1856:
1853:
1851:
1848:
1846:
1843:
1841:
1838:
1836:
1833:
1831:
1828:
1826:
1823:
1821:
1818:
1816:
1813:
1811:
1808:
1806:
1803:
1801:
1798:
1796:
1793:
1791:
1788:
1786:
1783:
1781:
1778:
1776:
1773:
1771:
1768:
1766:
1763:
1761:
1758:
1756:
1753:
1751:
1748:
1746:
1743:
1741:
1738:
1736:
1733:
1731:
1728:
1726:
1723:
1721:
1718:
1716:
1713:
1711:
1708:
1706:
1703:
1701:
1698:
1697:
1695:
1691:
1685:
1682:
1680:
1679:Plug and play
1677:
1675:
1672:
1670:
1669:Bus mastering
1667:
1665:
1662:
1660:
1657:
1655:
1652:
1650:
1647:
1645:
1644:Back-side bus
1642:
1640:
1637:
1635:
1632:
1631:
1629:
1625:
1621:
1618:
1614:
1612:
1607:
1600:
1595:
1593:
1588:
1586:
1581:
1580:
1577:
1562:
1558:
1557:
1552:
1548:
1544:
1540:
1536:
1532:
1528:
1524:
1513:
1509:
1508:
1503:
1502:
1498:
1483:
1479:
1472:
1469:
1457:
1453:
1446:
1443:
1438:
1434:
1428:
1425:
1413:
1409:
1402:
1399:
1386:
1382:
1378:
1371:
1368:
1355:
1351:
1344:
1341:
1328:
1324:
1320:
1313:
1310:
1294:
1290:
1283:
1276:
1273:
1257:
1253:
1246:
1239:
1236:
1220:
1216:
1209:
1202:
1199:
1191:
1187:
1180:
1174:
1171:
1166:
1162:
1158:
1152:
1149:
1143:
1139:
1136:
1134:
1131:
1129:
1126:
1124:
1121:
1119:
1116:
1114:
1111:
1109:
1108:Fibre Channel
1106:
1104:
1101:
1100:
1096:
1094:
1092:
1087:
1083:
1078:
1073:
1071:
1067:
1055:
1051:
1047:
1043:
1036:
1034:
1032:
1031:HT Technology
1028:
1024:
1020:
1016:
1012:
1008:
1004:
1000:
996:
992:
988:
985:referring to
984:
976:
974:
972:
968:
958:
954:
950:
946:
942:
938:
935:, Athlon X2,
934:
930:
920:
917:
914:
911:
909:3.2 GHz
908:
905:
902:
901:
897:
894:
891:
888:
886:2.6 GHz
885:
882:
879:
878:
874:
871:
868:
865:
863:1.4 GHz
862:
859:
856:
855:
851:
848:
845:
842:
840:800 MHz
839:
836:
833:
832:
828:
825:
822:
819:
817:800 MHz
816:
813:
810:
809:
805:
802:
799:
798:
779:
773:
768:
765:
762:
759:
757:
753:
749:
746:
743:
741:
738:
735:
731:
728:
724:
721:
719:
716:
714:
711:
709:
706:
703:
700:
697:
694:
691:
688:
684:
681:
680:
678:
675:
672:
668:
665:
662:
658:
655:
652:
648:
645:
642:
637:
634:
633:
631:
627:
624:
619:
615:
612:
608:
607:
605:
602:
598:
595:
593:
590:
588:
585:
583:
580:
578:
575:
573:
570:
567:
566:
564:
561:
558:
555:
552:
551:
547:
545:
539:
537:
533:
522:
520:
516:
512:
508:
504:
500:
496:
492:
488:
478:
471:
469:
467:
463:
458:
456:
452:
448:
444:
436:
434:
431:
427:
423:
419:
411:
409:
407:
403:
399:
395:
391:
387:
383:
379:
375:
372:
364:
362:
360:
356:
352:
348:
344:
340:
336:
332:
328:
324:
320:
316:
314:
313:
308:
307:
302:
298:
294:
290:
282:
277:
275:
272:
268:
261:Power-managed
260:
258:
255:
251:
246:
240:
237:
233:
225:
223:
221:
217:
212:
209:
205:
201:
197:
192:
190:
186:
181:
179:
175:
171:
160:
155:
153:
151:
147:
144:
140:
137:
133:
128:
126:
122:
118:
114:
110:
106:
102:
98:
95:
91:
86:
84:
80:
77:
73:
69:
65:
61:
57:
53:
49:
41:
37:
33:
19:
2362:Serial buses
1909:
1820:TURBOchannel
1610:
1567:September 4,
1565:, retrieved
1561:the original
1555:
1547:the original
1542:
1530:
1527:"Technology"
1516:, retrieved
1512:the original
1506:
1485:. Retrieved
1481:
1471:
1461:November 12,
1459:. Retrieved
1455:
1445:
1436:
1427:
1417:November 12,
1415:. Retrieved
1411:
1401:
1389:. Retrieved
1385:the original
1380:
1370:
1358:. Retrieved
1354:the original
1343:
1331:. Retrieved
1327:the original
1322:
1312:
1302:November 12,
1300:. Retrieved
1293:the original
1288:
1275:
1263:. Retrieved
1256:the original
1251:
1238:
1226:. Retrieved
1219:the original
1214:
1201:
1190:the original
1185:
1173:
1165:the original
1160:
1151:
1074:
1053:
1045:
1041:
1040:
1030:
1026:
1022:
1018:
1014:
997:to refer to
994:
990:
986:
982:
980:
933:Athlon 64 X2
926:
740:Power Mac G5
543:
534:
528:bits and 800
523:
498:
494:
490:
486:
483:
466:coprocessors
459:
440:
415:
386:Athlon 64 FX
368:
321:
317:
310:
304:
286:
278:Applications
264:
241:
229:
213:
193:
182:
178:clock signal
164:
129:
121:Power Mac G5
99:(CPUs) from
87:
55:
51:
47:
46:
36:
2293:CoreConnect
2272:ExpressCard
2200:Thunderbolt
2190:Camera Link
1973:Bus and Tag
1659:Address bus
1654:Control bus
1649:Daisy chain
1518:November 2,
1482:HotHardware
1391:January 17,
1333:October 16,
1228:January 30,
1128:PCI Express
1075:On Zen and
1060:GB/s to 512
1025:echnology (
630:ServerWorks
503:PCI Express
312:southbridge
306:northbridge
297:PCI Express
252:traffic or
208:peripherals
109:motherboard
2346:Categories
2146:ACCESS.bus
2045:Peripheral
1845:InfiniBand
1840:HP GSC bus
1634:System bus
1265:August 17,
1179:"Overview"
1144:References
1011:Intel Core
939:, Phenom,
754:CPUs from
730:PMC-Sierra
663:) chipsets
493:ransport e
343:Sempron 64
220:deemphasis
146:ULLtraDIMM
90:system bus
60:processors
2107:Lightning
2057:Atari SIO
1932:SpaceWire
1765:Zorro III
1705:S-100 bus
1700:SS-50 bus
1693:Standards
1613:standards
1606:Technical
1456:AnandTech
1021:hreading
1007:Pentium 4
941:Phenom II
937:Athlon II
929:Athlon 64
761:Transmeta
732:RM9000X2
673:processor
651:OpenCores
606:chipsets
565:chipsets
497:pansion (
355:Phenom II
347:Turion 64
339:Athlon II
335:Athlon 64
329:in their
143:PCIe SSDs
127:systems.
101:Athlon 64
72:bandwidth
2333:Category
2308:Wishbone
2281:Embedded
2260:Portable
2180:Profibus
2112:DMX512-A
1998:Parallel
1850:Ethernet
1760:Zorro II
1710:Multibus
1611:de facto
1487:April 4,
1437:WikiChip
1381:EE Times
1097:See also
783:version
756:Broadcom
702:nForce 4
696:nForce 3
667:Loongson
626:Broadcom
462:Torrenza
455:IP Cores
430:Ethernet
422:switches
156:Overview
119:for the
103:through
68:parallel
2313:SLIMbus
2267:PC Card
2251:TOSLINK
1941:Storage
1895:RapidIO
1775:FASTBUS
1730:STD Bus
1627:General
1360:May 24,
1323:YouTube
1133:RapidIO
967:nForce3
957:Opteron
945:Sempron
912:32-bit
889:32-bit
866:32-bit
843:32-bit
820:32-bit
750:SiByte
687:nForce2
638:HT-2100
635:HT-2000
540:Testing
418:routers
406:Newisys
382:Opteron
331:Opteron
293:Pentium
76:latency
2246:S/PDIF
2137:1-Wire
2102:RS-485
2097:RS-423
2092:RS-422
2087:RS-232
1948:ST-506
1905:NVLink
1755:STEbus
1715:Unibus
1062:
1058:
962:
949:Turion
927:* AMD
704:series
698:series
683:nForce
677:Nvidia
628:(then
530:
526:
515:QLogic
451:Xilinx
447:Altera
351:Phenom
236:32-bit
232:packet
196:16-bit
185:32-bit
167:
105:AMD FX
74:, low-
64:serial
2241:McASP
2209:Audio
2154:SMBus
2150:PMBus
2132:UNI/O
2072:HP-IL
2025:SATAe
2010:ESCON
1983:HIPPI
1815:NuBus
1770:CAMAC
1740:Q-Bus
1735:SMBus
1720:VAXBI
1617:wired
1348:AMD.
1296:(PDF)
1285:(PDF)
1259:(PDF)
1248:(PDF)
1222:(PDF)
1211:(PDF)
1193:(PDF)
1182:(PDF)
1138:AGESA
1091:Zen 4
1086:Zen 3
1082:Zen 2
1029:) or
1017:yper-
999:Intel
921:25.6
918:12.8
915:51.2
906:2008
898:20.8
895:10.4
892:41.6
883:2006
875:11.2
869:22.4
860:2004
846:12.8
837:2002
823:12.8
814:2001
786:Year
644:Cisco
557:AMD64
532:MHz.
443:FPGAs
404:from
200:8-bit
117:Apple
70:high-
2298:AMBA
2236:MADI
2221:AES3
2082:MIDI
2035:NVMe
2031:AHCI
1993:SCSI
1978:DSSI
1953:ESDI
1830:SBus
1790:EISA
1725:MBus
1615:for
1608:and
1569:2008
1520:2002
1489:2024
1463:2022
1419:2022
1393:2017
1362:2017
1335:2009
1304:2022
1267:2008
1230:2008
1084:and
1077:Zen+
1070:Vega
989:yper
977:Name
953:1207
903:3.1
880:3.0
872:5.6
857:2.0
852:6.4
849:3.2
834:1.1
829:6.4
826:3.2
811:1.0
752:MIPS
745:Raza
734:MIPS
685:and
671:MIPS
616:ATI
609:ATI
489:yper
449:and
426:Mbit
420:and
398:EPYC
384:and
371:NUMA
357:and
309:and
204:CPUs
136:DDR4
125:MIPS
115:and
2302:AXI
2231:I²S
2185:USB
2170:D²B
2165:SPI
2160:I3C
2142:I²C
2077:HIL
2062:DCB
2033:or
2020:SSA
2003:SAS
1963:SMD
1958:IPI
1880:AGP
1870:PXI
1860:PCI
1855:UPA
1835:VLB
1825:MCA
1810:VPX
1805:VXS
1800:VXI
1795:VME
1780:LPC
1750:ISA
1066:Zen
1027:HTT
1001:'s
971:ULi
960:2.0
955:),
767:VIA
736:CPU
669:-3
657:IBM
604:ATI
563:AMD
554:AMD
511:RAM
507:DMA
499:HTX
428:/s
323:AMD
301:AGP
245:I/O
170:MHz
113:IBM
94:AMD
2348::
2152:,
2148:,
1541:,
1529:,
1480:.
1454:.
1435:.
1410:.
1379:.
1321:.
1287:.
1250:.
1213:.
1184:.
1159:.
1046:IF
995:HT
983:HT
947:,
943:,
519:HP
359:FX
353:,
349:,
345:,
341:,
337:,
333:,
315:.
189:GB
132:MT
52:HT
2304:)
2300:(
2156:)
2144:(
1598:e
1591:t
1584:v
1534:.
1491:.
1465:.
1439:.
1421:.
1395:.
1364:.
1337:.
1306:.
1269:.
1232:.
1044:(
1023:T
1019:T
1015:H
991:T
987:H
495:X
491:T
487:H
388:(
66:/
50:(
20:)
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