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Processor register

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and it contains thirty-two 32-bit general-purpose registers for integer computation and thirty-two 128-bit SIMD registers for storing SIMD instructions, streaming data value and some integer calculation value, and one accumulator register for connecting general floating-point computation to the vector register file on the co-processor. The coprocessor is built via a 32-entry 128-bit vector register file (can only store vector values that pass from the accumulator in the CPU) and no integer registers are built in. Both the vector co-processor (VPU 0/1) and the Emotion Engine's entire main processor module (VU0 + VU1 + VPU0 + VPU1) are built based on a modified MIPS instructions set. The accumulator in this case is not general-purpose but control status.
31: 1503:) memory locations 0–15; a hardware option called "fast memory" implemented the registers as separate ICs, and references to memory locations 0–15 referred to the IC registers. Later models implemented the registers as "fast memory" and continued to make memory locations 0–15 refer to them. Movement instructions take 795:
The A register is an accumulator to which all arithmetic is done; the register pairs B+C, D+E, and H+L can be used as address registers in some instructions; all registers can be used as operands in load/store/move/increment/decrement instructions and as the other operand in arithmetic instructions.
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r15 is the program counter, and not usable as a general purpose register; r13 is the stack pointer; r8–r13 can be switched out for others (banked) on a processor mode switch. Older versions had 26-bit addressing, and used upper bits of the program counter (r15) for status flags, making that register
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8 'A' registers, A0–A7, hold 18-bit addresses; 8 'B' registers, B0–B7, hold 18-bit integer values (with B0 permanently set to zero); 8 'X' registers, X0–X7, hold 60 bits of integer or floating-point data. Seven of the eight 18-bit A registers were coupled to their corresponding X registers: setting
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The Emotion Engine's main core (VU0) is a heavily modified DSP general core intended for general background tasks and it contains one 64-bit accumulator, two general data registers, and one 32-bit program counter. A modified MIPS III executable core (VU1) is for game data and protocol control,
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All of the registers may be used generally (integer, float, stack pointer, jump, indexing, etc.). Every 36-bit memory (or register) word can also be manipulated as a half-word, which can be considered an (18-bit) address. Other word interpretations are used by certain instructions. In the original
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An eight-core 8/16-bit sliced stack machine controller with a simple logic circuit inside, it has 8 cog counters (cores), each containing three 8/16 bit special control registers with 32 bit x 512 stack RAM. However, it does not contain any general register for integer purposes. Unlike most shadow
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any of the A1–A5 registers to a value caused a memory load of the contents of that address into the corresponding X register. Likewise, setting an address into registers A6 or A7 caused a memory store into that location in memory from X6 or X7. (Registers A0 and X0 were not coupled like this).
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A 16-bit wide, 32-bit address space stack machine processor from the Taiwanese company Sunplus Technology, it can be found on Vtech's V.Smile line for educational purposes and video game consoles such as the Wireless 60, Mattel HyperScan, and XaviXPORT. It lacks any general-purpose register or
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The A register is an accumulator to which all arithmetic is done; the H and L registers can be used in combination as an address register; all registers can be used as operands in load/store/move/increment/decrement instructions and as the other operand in arithmetic instructions. There is no
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and specialized for multimedia. It can be found on the company's own Nuon DVD player console line and the Game Wave Family Entertainment System from ZaPit games. The design was heavily influenced by Intel's MMX technology; it contained a 128-byte unified stack cache for both vector and scalar
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65c816 is the 16-bit successor of the 6502. X, Y, and D (Direct Page register) are condition registers and SP register are specific index only. Main accumulator extended to 16-bit (C) while keeping 8-bit (A) for compatibility and main registers can now address up to 24-bit (16-bit wide data
643:, this is also done for the floating-point register file. As a result of this, register files are commonly quoted as having one register more than how many of them are actually usable; for example, 32 registers are quoted when only 31 of them fit within the above definition of a register. 1018:
from AMD. The native processor only contains 1 data and 1 address register for all purposes and it is translated into 4 paths of 32-bit naming registers r1 (base), r2 (data), r3 (back pointer), and r4 (stack pointer) within scratchpad SRAM for integer operations.
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of data) can be loaded and operated upon at the same time. Typically it is implemented by adding extra registers that map their memory into a larger register. Processors that have the ability to execute single instructions on multiple data are called
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co-processor for floating-point operations, support an 80-bit wide, 8 deep register stack with some instructions able to use registers relative to the top of the stack as operands; without a co-processor, no floating-point registers are supported.
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FP was optional in System/360, and always present in S/370 and later. In processors with the Vector Facility, there are 16 vector registers containing a machine-dependent number of 32-bit elements. Some registers are assigned a fixed purpose by
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systems, all of the stack RAM in cog can be accessed in instruction level, which allows all of these cogs to act as a single general-purpose core if necessary. Floating-point unit is external and it contains two 80-bit vector registers.
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The general purpose registers are used for floating-point values as well. Three of the registers have special uses: R12 (Argument Pointer), R13 (Frame Pointer), and R14 (Stack Pointer), while R15 refers to the Program Counter.
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for floating-point operations, later processors had built-in floating-point, with both having an 80-bit wide, 8 deep register stack with some instructions able to use registers relative to the top of the stack as operands. The
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6502's content A (Accumulator) register for main purpose data store and memory address (8-bit data/16-bit address), X and Y are indirect and direct index registers (respectively) and the SP registers are specific index only.
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with a modded 8080 instruction set. Only the A, B, C, and D registers are available through all modes (8/16/32-bit). It is incompatible with x86; however, it contains an 80-bit floating-point unit that is x87-compatible.
510:) store data and settings related to the processor itself. Because their meanings are attached to the design of a specific processor, they are not expected to remain standard between processor generations. 1818:
Each instruction controls whether registers are interpreted as integers or single precision floating point. Architecture is scalable to 4096 cores with 16 and 64 core implementations currently available.
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instructions. The unified cache can be divided as eight 128-bit vector registers or thirty-two 32-bit SIMD scalar registers through bank renaming; there is no integer register in this architecture.
496:(PSW) register. The aforementioned stack pointer is sometimes also included in this group. Embedded microprocessors can also have registers corresponding to specialized hardware elements. 659:) is counted as an integer register, even though there are a limited number of instructions that may be used to operate on its contents. Similar caveats apply to most architectures. 3517: 210:, the registers can operate in various modes, breaking down their storage memory into smaller parts (32-bit into four 8-bit ones, for instance) to which multiple data (vector, or 119:, and provide the fastest way to access data. The term normally refers only to the group of registers that are directly encoded as part of an instruction, as defined by the 1469:
Also included are a stack pointer and a frame pointer. Additional registers are used to implement zero-overhead loops and circular buffer DAGs (data address generators).
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A processor often contains several kinds of registers, which can be classified according to the types of values they can store or the instructions that operate on them:
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Address register 8 (a7) is the stack pointer. 68000, 68010, 68012, 68020, and 68030 require an FPU for floating-point; 68040 had FPU built in. FP registers are 80-bit.
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internal register for naming/renaming, but its floating-point unit has an 80-bit 6-stage stack and four 128-bit VLIW SIMD registers on a vertex shader co-processor.
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can be read or written by machine instructions. The most common division of user-accessible registers is a division into data registers and address registers.
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Nios II is based on the MIPS IV instruction set and has 31 32-bit GPRs, with register 0 being hardwired to zero, and eight 64-bit floating-point registers
2833: 3482: 97:. Manipulated items are then often stored back to main memory, either by the same instruction or by a subsequent one. Modern processors use either 3554: 2239:
Jia, Zhe; Maggioni, Marco; Staiger, Benjamin; Scarpazza, Daniele P. (2018). "Dissecting the NVIDIA Volta GPU Architecture via Microbenchmarking".
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The number of registers available on a processor and the operations that can be performed using those registers has a significant impact on the
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Instructions can directly reference the first 16 scratchpad registers and can access all scratchpad registers indirectly through the ISAR
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whose value is added as an offset from some address); others allow registers to hold either kind of quantity. A wide variety of possible
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Scalar data registers can be integer or floating-point; also 64 scalar scratch-pad T registers and 64 address scratch-pad B registers
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Integer register 0 is hardwired to 0. The RV32E variant, intended for systems with very limited resources, has 15 integer registers.
123:. However, modern high-performance CPUs often have duplicates of these "architectural registers" in order to improve performance via 4425: 3569: 3397: 3370: 2749: 465: 2720: 2050: 4664: 4384: 3947: 2840: 2806: 2801: 2685: 4359: 4256: 3657: 3564: 3365: 2608: 2586: 2475: 1193: 438: 639:
in that it is hardwired to always return zero when read (mostly to simplify indexing modes), and it cannot be overwritten. In
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are the registers visible to software and are defined by an architecture. They may not correspond to the physical hardware if
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ABIs, register 15 is used as a stack pointer. The S/390 G5 processor increased the number of floating-point registers to 16.
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Some instructions only use H+L; another instruction swaps H+L and D+E. Floating-point processors intended for the 8080 were
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All data manipulation instructions work solely within registers, and data must be moved into a register before processing.
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A 32/40-bit stack machine-based network processor with a modified MIPS instruction set and a 128-bit floating-point unit.
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numbers and 64-bit pointers therefore require two registers. It additionally has up to 8 predicate registers per thread.
1192:). The more registers are configured per thread, the fewer threads can run at the same time. Registers are 32 bits wide; 4418: 3996: 3841: 3836: 3758: 3234: 3195: 2850: 2845: 2779: 2591: 2217: 1928: 207: 102: 2715: 3623: 3320: 3018: 98: 2106: 4659: 4273: 3920: 3337: 2828: 2796: 2566: 2554: 2534: 948: 515: 369: 254: 175: 4529: 4364: 4327: 4317: 2705: 2430: 1540:
R7 is the program counter. Any register can be a stack pointer but R6 is used for hardware interrupts and traps.
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Although all of the below-listed architectures are different, almost all are in a basic arrangement known as the
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s) can store both data and addresses, i.e., they are combined data/address registers; in some architectures, the
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description of a 8-bit register with detailed implementation, showing how 8 bits of data can be stored by using
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The following table shows the number of registers in several mainstream CPU architectures. Note that in
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of an expression tree gives the minimum number of registers required to evaluate that expression tree.
4342: 4278: 3864: 3586: 3476: 3423: 2955: 2668: 2524: 2506: 1500: 554: 545: 105: 86: 4389: 3991: 1980: 4523: 4374: 4194: 4045: 4027: 3979: 3633: 3580: 3385: 3380: 3357: 3273: 3155: 3010: 2905: 2764: 1861: 1835: 1654: 1584: 1311: 773: 493: 167: 94: 58:, although some registers have specific hardware functions, and may be read-only or write-only. In 1963: 4246: 4238: 4065: 3869: 3744: 3268: 3209: 3089: 2821: 2549: 2240: 1333: 1255: 1890: 805: 801: 797: 4535: 4453: 4199: 4166: 4082: 4014: 3915: 3905: 3895: 3826: 3821: 3816: 3739: 3668: 3574: 3534: 3167: 3117: 3067: 3043: 2925: 2865: 2860: 2742: 2658: 2354: 1766: 626: 614: 606: 461: 179: 124: 90: 4369: 4302: 4143: 4050: 4004: 3811: 3806: 3801: 3796: 3791: 3781: 3651: 3618: 3529: 3524: 3433: 3285: 3280: 3263: 3251: 3190: 2754: 2732: 2618: 2596: 2514: 1856: 1743: 1720: 1696: 1420:
Also included are a link register, a count register, and a multiply quotient (MQ) register.
670: 216: 159: 116: 55: 166:. Holding frequently used values in registers can be critical to a program's performance. 4613: 4541: 4468: 4283: 4268: 4216: 4120: 4095: 3932: 3925: 3776: 3771: 3766: 3705: 3613: 3603: 3325: 3160: 3112: 2875: 2759: 2727: 2628: 2623: 2544: 1839: 1395: 1201: 995: 489: 485: 407: 350: 120: 75: 2086:"Intel Architecture Instruction Set Extensions and Future Features Programming Reference" 1482:
128 general purpose registers, which can hold integer, address, or floating-point values
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or not, load items of data from a larger memory into registers where they are used for
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And 64 1-bit predicate registers and 8 branch registers. The FP registers are 82-bit.
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FP registers are 128-bit XMM registers, later extended to 256-bit YMM registers with
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are not accessible by instructions and are used internally for processor operations.
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Also included are a link register and a count register. Processors supporting the
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often used to determine whether some instruction should or should not be executed.
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Register r31 is the stack pointer or hardwired to 0, depending on the context.
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1 accumulator, 64 scratchpad registers, 1 indirect scratchpad register (ISAR)
4596: 4161: 4158: 3900: 2970: 2948: 2261:"IBM Enterprise Systems Architecture/370 and System/370 - Vector Operations" 2064: 1851: 1675: 1562: 1429: 1258:; for example, register 14 is used for subroutine return addresses and, for 1011: 640: 557:, a collection of storage registers located on separate chips from the CPU: 266: 109: 1738:
Version 1 of Thumb, which only supported access to registers r0 through r7
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Quickly accessible working storage available as part of a digital processor
2065:"AMD64 Architecture Programmer's Manual Volume 1: Application Programming" 4176: 3048: 2995: 2467: 2170: 1810: 1474: 1455: 991: 976: 171: 1579:
Registers R31 (integer) and F31 (floating-point) are hardwired to zero.
1166:+ 2 Ă— 32 Vector (dedicated vector co-processor located nearby its GPU) 2985: 2943: 1645: 1545: 1447: 1425: 1361: 1287: 1073: 1064: 1024: 952: 817: 306: 274: 270: 4410: 4608: 4288: 3000: 2965: 2930: 2338:"Synergistic Processor Unit Instruction Set Architecture Version 1.2" 2132: 1915:"A Survey of Techniques for Designing and Managing CPU Register File" 1788: 1604: 1135: 1015: 999: 930: 720: 294: 203: 199: 152: 71: 30: 2245: 337:
Some processors contain registers that may only be used to hold an
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design acquired these techniques around 1995 with the releases of
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PDP-10 processors, these 16 GPRs also corresponded to main (i.e.
492:; the program counter and status register might be combined in a 108:
as main memory, with the latter usually accessed via one or more
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Earlier generations allowed up to 127/63 registers per thread (
4633: 2910: 2900: 2071: 836: 809: 652: 191: 136: 2051:"Intel 64 and IA-32 Architectures Software Developer Manuals" 1644:
Media-embedded processor was a 32-bit processor developed by
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is the emulation of 486/Pentium compatible processor made by
353:, used to specify the effective address of an operand, exist. 62:, registers are typically addressed by mechanisms other than 445: 50:
is a quickly accessible location available to a computer's
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so that the GPRs can store floating-point numbers as well.
2431:"Procedure Call Standard for the ARM 64-bit Architecture" 1981:"8008 8 Bit Parallel Central Processor Unit Users Manual" 269:
and other data. In some older architectures, such as the
93:, and other operations, and are manipulated or tested by 2302: 673:. It is also noteworthy that the number of registers on 679: 2193:"Motorola M68000 Family Programmer's Reference Manual" 1895:
Educative: Interactive Courses for Software Developers
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s) store floating-point numbers in many architectures.
54:. Registers usually consist of a small amount of fast 330:
and are used by instructions that indirectly access
4557: 4497: 4446: 4352: 4301: 4237: 4175: 4129: 4081: 4036: 3956: 3883: 3852: 3757: 3678: 3642: 3596: 3496: 3422: 3356: 3306: 3217: 3208: 3181: 3136: 3103: 3075: 3066: 2886: 2789: 2778: 2649: 2505: 2045: 2043: 1512: 1508: 1249:16 in G5 and later S/390 models and z/Architecture 115:Processor registers are normally at the top of the 2380:"Procedure Call Standard for the ARM Architecture" 1929:"Cray-1 Computer System Hardware Reference Manual" 372:are addressed by dedicated address registers (see 162:accesses the same data repeatedly, this is called 468:instructions (Single Instruction, Multiple Data). 190:Registers are normally measured by the number of 2006:"Intel 8080 Microcomputer Systems User's Manual" 2031:"80286 and 80287 Programmer's Reference Manual" 553:Registers related to fetching information from 550:holds the instruction currently being executed. 488:, also called the instruction pointer, and the 1063:A 32-bit stack machine processor developed by 609:is being performed by the underlying hardware. 4426: 2483: 2114:. Fairchild MOS Microcomputer Division. 1977. 629:), the first or last register in the integer 8: 1282:in the late 1990s for pedagogical purposes. 444:hold read-only values such as zero, one, or 3488:Computer performance by orders of magnitude 2126:"Nios II Classic Processor Reference Guide" 666:, first proposed by the Hungarian-American 655:-compatible processors, the stack pointer ( 4433: 4419: 4411: 3953: 3593: 3214: 3072: 2786: 2490: 2476: 2468: 1394:Global register 0 is hardwired to 0. Uses 2244: 808:. They were also readily usable with the 2147:"Nios II Gen2 Processor Reference Guide" 1351:register files in modern processors and 786:1 accumulator, 1 stack pointer, 6 others 29: 1964:"MCS-4 Micro Computer Set Users Manual" 1882: 1450:also have 32 128-bit vector registers. 925:with additional 128-bit XMM registers. 313:is used implicitly for many operations. 309:, a special data register known as the 1783:Integer register 0 is hardwired to 0. 951:and 512-bit ZMM0–ZMM31 registers with 66:, but may in some cases be assigned a 2409:"2.6.2. The Thumb-state register set" 618:are similar, but occur outside CPUs. 7: 3459:Floating-point operations per second 2164:"M6800 Programming Reference Manual" 1622:instruction/24-bit memory address). 2413:ARM7TDMI Technical Reference Manual 1181:configurable, up to 255 per thread 677:is much higher than that on CPUs. 25: 2456:"Epiphany Architecture Reference" 1118:8 data (d0–d7), 8 address (a0–a7) 206:register", or even more. In some 4385:Semiconductor device fabrication 1460:8 data, 2 accumulator, 6 address 194:they can hold, for example, an " 4360:History of general-purpose CPUs 2587:Nondeterministic Turing machine 1945:from the original on 2021-11-07 1891:"What is a processor register?" 1278:An instruction set designed by 1194:double-precision floating-point 621:In some architectures (such as 4474:Low-level programming language 2540:Deterministic finite automaton 2359:Super Famicom Development Wiki 81:Almost all computers, whether 1: 3331:Simultaneous and heterogenous 2286:"IBM S/390 G5 Microprocessor" 1699:32-bit (ARM/A32, Thumb-2/T32) 480:s) hold some elements of the 36:register-transfer level (RTL) 4015:Integrated memory controller 3997:Translation lookaside buffer 3196:Memory dependence prediction 2639:Random-access stored program 2592:Probabilistic Turing machine 1164:32 SIMD (integrated in UV1) 902:stack of 8 (if FP present), 257:and, in some architectures, 3471:Synaptic updates per second 2436:. ARM Holdings. 22 May 2013 873:processors, if provided an 687:GPRs/data+address registers 516:Memory type range registers 484:; they usually include the 4681: 3875:Heterogeneous architecture 2797:Orthogonal instruction set 2567:Alternating Turing machine 2555:Quantum cellular automaton 2218:"CUDA C Programming Guide" 1511:is register-register, and 508:machine-specific registers 345:(in some cases used as an 4530:Microsoft Macro Assembler 4365:Microprocessor chronology 4328:Dynamic frequency scaling 3483:Cache performance metrics 2355:"Learning 65816 Assembly" 2053:. Intel. 4 December 2019. 1814: 1549: 1491: 1478: 1180: 473:Special-purpose registers 383:General-purpose registers 233:User-accessible registers 178:phase, or manually by an 170:is performed either by a 4459:Comparison of assemblers 4380:Hardware security module 3723:Digital signal processor 3700:Graphics processing unit 3512:Graphics processing unit 2343:. IBM. January 27, 2007. 2152:. Altera. April 2, 2015. 1100:2 data, 1 index, 1 stack 812:and similar processors. 744:1 accumulator, 16 others 725:8 scalar data, 8 address 664:von Neumann architecture 502:Model-specific registers 4665:Central processing unit 4333:Dynamic voltage scaling 4116:Memory address register 4010:Branch target predictor 3974:Address generation unit 3717:Physics processing unit 3506:Central processing unit 3465:Transactions per second 3453:Instructions per second 3376:Array processing (SIMT) 2520:Stored-program computer 2317:"Series 32000 Databook" 2108:F8 Guide to Programming 2011:. Intel. September 1975 1969:. Intel. February 1973. 1515:is memory-to-register. 943:(if AVX-512 available) 904:8 (if SSE/MMX present) 762:1 accumulator, 6 others 602:Architectural registers 585:Memory address register 423:Floating-point register 83:load/store architecture 4139:Hardwired control unit 4021:Memory management unit 3986:Memory management unit 3735:Secure cryptoprocessor 3729:Tensor Processing Unit 3711:Vision processing unit 3445:Cycles per instruction 3439:Instructions per cycle 3386:Associative processing 3077:Instruction pipelining 2499:Processor technologies 2324:National Semiconductor 1986:. Intel. November 1973 1008:National Semiconductor 912:processor requires an 563:Memory buffer register 364:is used to manage the 259:floating-point numbers 43: 4655:Computer architecture 4548:Open Watcom Assembler 4489:x86 assembly language 4222:Sum-addressed decoder 3968:Arithmetic logic unit 3095:Classic RISC pipeline 3049:Epiphany architecture 2896:Motorola 68000 series 1834:of code generated by 212:one-dimensional array 164:locality of reference 133:speculative execution 87:arithmetic operations 60:computer architecture 33: 4629:Instruction listings 4343:Performance per watt 3921:replacement policies 3587:Package on a package 3477:Performance per watt 3381:Pipelined processing 3151:Tomasulo's algorithm 2956:Clipper architecture 2812:Application-specific 2525:Finite-state machine 1836:optimizing compilers 573:memory data register 546:instruction register 277:and successors, the 95:machine instructions 4624:Calling conventions 4524:High Level Assembly 4441:x86 assembly topics 4375:Digital electronics 4028:Instruction decoder 3980:Floating-point unit 3634:Soft microprocessor 3581:System in a package 3156:Reservation station 2686:Transport-triggered 1862:Register allocation 1676:AVR microcontroller 1655:PIC microcontroller 1256:calling conventions 1247:4 (if FP present); 774:floating-point unit 728:8 scalar, 8 vector 494:program status word 251:numeric data values 168:Register allocation 18:Processor registers 4619:Processor register 4247:Integrated circuit 4091:Processor register 3745:Baseband processor 3090:Operand forwarding 2550:Cellular automaton 2389:. 30 November 2013 2266:. IBM. SA22-7125-3 1505:(register, memory) 1334:Parallax Propeller 921:and later had the 615:Hardware registers 91:bitwise operations 48:processor register 44: 4660:Digital registers 4642: 4641: 4536:Netwide Assembler 4454:Assembly language 4408: 4407: 4297: 4296: 3916:Instruction cache 3906:Scratchpad memory 3753: 3752: 3740:Network processor 3669:Network on a chip 3624:Ultra-low-voltage 3575:Multi-chip module 3418: 3417: 3204: 3203: 3191:Branch prediction 3168:Register renaming 3062: 3061: 3044:VISC architecture 2866:Quantum computing 2861:VISC architecture 2743:Secondary storage 2659:Microarchitecture 2619:Register machines 1938:. November 1977. 1823: 1822: 1536:(if FPP present) 981:1 data, 1 address 776:(FPU) available. 607:register renaming 571:), also known as 533:Internal register 462:vector processing 217:vector processors 180:assembly language 125:register renaming 16:(Redirected from 4672: 4435: 4428: 4421: 4412: 4370:Processor design 4262:Power management 4144:Instruction unit 4005:Branch predictor 3954: 3652:System on a chip 3594: 3434:Transistor count 3358:Flynn's taxonomy 3215: 3073: 2876:Addressing modes 2787: 2733:Memory hierarchy 2597:Hypercomputation 2515:Abstract machine 2492: 2485: 2478: 2469: 2463: 2462: 2460: 2452: 2446: 2445: 2443: 2441: 2435: 2427: 2421: 2420: 2405: 2399: 2398: 2396: 2394: 2384: 2376: 2370: 2369: 2367: 2365: 2351: 2345: 2344: 2342: 2334: 2328: 2327: 2321: 2313: 2307: 2306: 2303:"MMIX Home Page" 2299: 2293: 2292: 2290: 2282: 2276: 2275: 2273: 2271: 2265: 2257: 2251: 2250: 2248: 2236: 2230: 2229: 2227: 2225: 2214: 2208: 2207: 2205: 2203: 2198:. Motorola. 1992 2197: 2189: 2183: 2182: 2180: 2178: 2168: 2160: 2154: 2153: 2151: 2143: 2137: 2136: 2135:. April 2, 2015. 2130: 2122: 2116: 2115: 2113: 2103: 2097: 2096: 2090: 2082: 2076: 2075: 2069: 2061: 2055: 2054: 2047: 2038: 2037: 2035: 2027: 2021: 2020: 2018: 2016: 2010: 2002: 1996: 1995: 1993: 1991: 1985: 1977: 1971: 1970: 1968: 1960: 1954: 1953: 1951: 1950: 1944: 1933: 1925: 1919: 1918: 1911: 1905: 1904: 1902: 1901: 1887: 1857:Quantum register 1801: 1795: 1779: 1773: 1757: 1751: 1734: 1728: 1704: 1688: 1682: 1667: 1661: 1640: 1634: 1617: 1611: 1594: 1575: 1569: 1552: 1533: 1527: 1514: 1510: 1494: 1465: 1442: 1436: 1416: 1410: 1396:register windows 1390: 1384: 1346: 1340: 1324: 1318: 1303:(if FP present) 1300: 1294: 1243: 1214: 1208: 1148: 1142: 1126:(if FP present) 1123: 1105: 1086: 1080: 1059: 1053: 1037: 1036:6 stack + 4 SIMD 1031: 986: 937: 898: 849:(if FP present) 843: 824: 791: 767: 749: 708: 693: 688: 680: 671:John von Neumann 658: 535: 534: 457: 456: 455:Vector registers 425: 424: 408:Status registers 392: 391: 368:. Rarely, other 351:addressing modes 341:or only to hold 322: 321: 320:Address register 245: 244: 208:instruction sets 160:computer program 117:memory hierarchy 21: 4680: 4679: 4675: 4674: 4673: 4671: 4670: 4669: 4645: 4644: 4643: 4638: 4614:Program counter 4559: 4553: 4542:Turbo Assembler 4493: 4469:Instruction set 4442: 4439: 4409: 4404: 4390:Tick–tock model 4348: 4304: 4293: 4233: 4217:Address decoder 4171: 4125: 4121:Program counter 4096:Status register 4077: 4032: 3992:Load–store unit 3959: 3952: 3879: 3848: 3749: 3706:Image processor 3681: 3674: 3644: 3638: 3614:Microcontroller 3604:Embedded system 3592: 3492: 3425: 3414: 3352: 3302: 3200: 3177: 3161:Re-order buffer 3132: 3113:Data dependency 3099: 3058: 2888: 2882: 2781: 2780:Instruction set 2774: 2760:Multiprocessing 2728:Cache hierarchy 2721:Register/memory 2645: 2545:Queue automaton 2501: 2496: 2466: 2458: 2454: 2453: 2449: 2439: 2437: 2433: 2429: 2428: 2424: 2407: 2406: 2402: 2392: 2390: 2382: 2378: 2377: 2373: 2363: 2361: 2353: 2352: 2348: 2340: 2336: 2335: 2331: 2319: 2315: 2314: 2310: 2301: 2300: 2296: 2288: 2284: 2283: 2279: 2269: 2267: 2263: 2259: 2258: 2254: 2238: 2237: 2233: 2223: 2221: 2216: 2215: 2211: 2201: 2199: 2195: 2191: 2190: 2186: 2176: 2174: 2173:. November 1976 2166: 2162: 2161: 2157: 2149: 2145: 2144: 2140: 2128: 2124: 2123: 2119: 2111: 2105: 2104: 2100: 2095:. January 2018. 2088: 2084: 2083: 2079: 2074:. October 2013. 2067: 2063: 2062: 2058: 2049: 2048: 2041: 2033: 2029: 2028: 2024: 2014: 2012: 2008: 2004: 2003: 1999: 1989: 1987: 1983: 1979: 1978: 1974: 1966: 1962: 1961: 1957: 1948: 1946: 1942: 1931: 1927: 1926: 1922: 1913: 1912: 1908: 1899: 1897: 1889: 1888: 1884: 1880: 1848: 1840:Strahler number 1828: 1799: 1793: 1777: 1771: 1755: 1749: 1732: 1726: 1702: 1686: 1680: 1665: 1659: 1638: 1632: 1615: 1609: 1592: 1589:1 data, 2 index 1573: 1567: 1550: 1531: 1525: 1492: 1463: 1448:Vector facility 1440: 1434: 1414: 1408: 1388: 1382: 1344: 1338: 1322: 1316: 1298: 1292: 1241: 1212: 1206: 1202:CDC 6000 series 1161:3(VU0)+ 32(VU1) 1146: 1140: 1121: 1103: 1084: 1078: 1057: 1051: 1035: 1029: 984: 935: 896: 841: 822: 789: 765: 747: 706: 702:AT&T Hobbit 691: 686: 656: 649: 636:pseudo-register 532: 531: 490:status register 486:program counter 454: 453: 422: 421: 389: 388: 319: 318: 242: 241: 225: 188: 176:code generation 121:instruction set 28: 23: 22: 15: 12: 11: 5: 4678: 4676: 4668: 4667: 4662: 4657: 4647: 4646: 4640: 4639: 4637: 4636: 4631: 4626: 4621: 4616: 4611: 4606: 4604:Memory address 4601: 4600: 4599: 4594: 4589: 4587:Interrupt flag 4584: 4582:Direction flag 4579: 4569: 4563: 4561: 4555: 4554: 4552: 4551: 4545: 4539: 4533: 4527: 4521: 4515: 4512:Flat Assembler 4509: 4503: 4501: 4495: 4494: 4492: 4491: 4486: 4484:Microassembler 4481: 4476: 4471: 4466: 4461: 4456: 4450: 4448: 4444: 4443: 4440: 4438: 4437: 4430: 4423: 4415: 4406: 4405: 4403: 4402: 4397: 4395:Pin grid array 4392: 4387: 4382: 4377: 4372: 4367: 4362: 4356: 4354: 4350: 4349: 4347: 4346: 4340: 4335: 4330: 4325: 4320: 4315: 4309: 4307: 4299: 4298: 4295: 4294: 4292: 4291: 4286: 4281: 4276: 4271: 4266: 4265: 4264: 4259: 4254: 4243: 4241: 4235: 4234: 4232: 4231: 4229:Barrel shifter 4226: 4225: 4224: 4219: 4212:Binary decoder 4209: 4208: 4207: 4197: 4192: 4187: 4181: 4179: 4173: 4172: 4170: 4169: 4164: 4156: 4151: 4146: 4141: 4135: 4133: 4127: 4126: 4124: 4123: 4118: 4113: 4108: 4103: 4101:Stack register 4098: 4093: 4087: 4085: 4079: 4078: 4076: 4075: 4074: 4073: 4068: 4058: 4053: 4048: 4042: 4040: 4034: 4033: 4031: 4030: 4025: 4024: 4023: 4012: 4007: 4002: 4001: 4000: 3994: 3983: 3977: 3971: 3964: 3962: 3951: 3950: 3945: 3940: 3935: 3930: 3929: 3928: 3923: 3918: 3913: 3908: 3903: 3893: 3887: 3885: 3881: 3880: 3878: 3877: 3872: 3867: 3862: 3856: 3854: 3850: 3849: 3847: 3846: 3845: 3844: 3834: 3829: 3824: 3819: 3814: 3809: 3804: 3799: 3794: 3789: 3784: 3779: 3774: 3769: 3763: 3761: 3755: 3754: 3751: 3750: 3748: 3747: 3742: 3737: 3732: 3726: 3720: 3714: 3708: 3703: 3697: 3695:AI accelerator 3692: 3686: 3684: 3676: 3675: 3673: 3672: 3666: 3661: 3658:Multiprocessor 3655: 3648: 3646: 3640: 3639: 3637: 3636: 3631: 3626: 3621: 3616: 3611: 3609:Microprocessor 3606: 3600: 3598: 3597:By application 3591: 3590: 3584: 3578: 3572: 3567: 3562: 3557: 3552: 3547: 3542: 3540:Tile processor 3537: 3532: 3527: 3522: 3521: 3520: 3509: 3502: 3500: 3494: 3493: 3491: 3490: 3485: 3480: 3474: 3468: 3462: 3456: 3450: 3449: 3448: 3436: 3430: 3428: 3420: 3419: 3416: 3415: 3413: 3412: 3411: 3410: 3400: 3395: 3394: 3393: 3388: 3383: 3378: 3368: 3362: 3360: 3354: 3353: 3351: 3350: 3345: 3340: 3335: 3334: 3333: 3328: 3326:Hyperthreading 3318: 3312: 3310: 3308:Multithreading 3304: 3303: 3301: 3300: 3295: 3290: 3289: 3288: 3278: 3277: 3276: 3271: 3261: 3260: 3259: 3254: 3244: 3239: 3238: 3237: 3232: 3221: 3219: 3212: 3206: 3205: 3202: 3201: 3199: 3198: 3193: 3187: 3185: 3179: 3178: 3176: 3175: 3170: 3165: 3164: 3163: 3158: 3148: 3142: 3140: 3134: 3133: 3131: 3130: 3125: 3120: 3115: 3109: 3107: 3101: 3100: 3098: 3097: 3092: 3087: 3085:Pipeline stall 3081: 3079: 3070: 3064: 3063: 3060: 3059: 3057: 3056: 3051: 3046: 3041: 3038: 3037: 3036: 3034:z/Architecture 3031: 3026: 3021: 3013: 3008: 3003: 2998: 2993: 2988: 2983: 2978: 2973: 2968: 2963: 2958: 2953: 2952: 2951: 2946: 2941: 2933: 2928: 2923: 2918: 2913: 2908: 2903: 2898: 2892: 2890: 2884: 2883: 2881: 2880: 2879: 2878: 2868: 2863: 2858: 2853: 2848: 2843: 2838: 2837: 2836: 2826: 2825: 2824: 2814: 2809: 2804: 2799: 2793: 2791: 2784: 2776: 2775: 2773: 2772: 2767: 2762: 2757: 2752: 2747: 2746: 2745: 2740: 2738:Virtual memory 2730: 2725: 2724: 2723: 2718: 2713: 2708: 2698: 2693: 2688: 2683: 2678: 2677: 2676: 2666: 2661: 2655: 2653: 2647: 2646: 2644: 2643: 2642: 2641: 2636: 2631: 2626: 2616: 2611: 2606: 2605: 2604: 2599: 2594: 2589: 2584: 2579: 2574: 2569: 2562:Turing machine 2559: 2558: 2557: 2552: 2547: 2542: 2537: 2532: 2522: 2517: 2511: 2509: 2503: 2502: 2497: 2495: 2494: 2487: 2480: 2472: 2465: 2464: 2447: 2422: 2400: 2371: 2346: 2329: 2308: 2294: 2277: 2252: 2231: 2220:. Nvidia. 2019 2209: 2184: 2155: 2138: 2117: 2098: 2077: 2056: 2039: 2036:. Intel. 1987. 2022: 1997: 1972: 1955: 1920: 1906: 1881: 1879: 1876: 1875: 1874: 1872:Shift register 1869: 1864: 1859: 1854: 1847: 1844: 1827: 1824: 1821: 1820: 1816: 1813: 1807: 1806: 1803: 1797: 1791: 1785: 1784: 1781: 1775: 1769: 1763: 1762: 1759: 1753: 1747: 1740: 1739: 1736: 1730: 1724: 1723:32-bit (Thumb) 1717: 1716: 1712: 1706: 1700: 1693: 1692: 1690: 1684: 1678: 1672: 1671: 1669: 1663: 1657: 1651: 1650: 1642: 1636: 1630: 1624: 1623: 1619: 1613: 1607: 1601: 1600: 1596: 1590: 1587: 1581: 1580: 1577: 1571: 1565: 1559: 1558: 1554: 1548: 1542: 1541: 1538: 1529: 1523: 1517: 1516: 1496: 1490: 1484: 1483: 1480: 1477: 1471: 1470: 1467: 1461: 1458: 1452: 1451: 1444: 1438: 1432: 1422: 1421: 1418: 1412: 1406: 1400: 1399: 1392: 1386: 1380: 1374: 1373: 1370: 1367: 1364: 1358: 1357: 1348: 1342: 1336: 1330: 1329: 1326: 1320: 1314: 1308: 1307: 1305: 1296: 1290: 1284: 1283: 1276: 1273: 1270: 1264: 1263: 1251: 1245: 1239: 1237:z/Architecture 1221: 1220: 1216: 1210: 1204: 1198: 1197: 1182: 1179: 1173: 1172: 1168: 1162: 1159: 1157:Emotion Engine 1153: 1152: 1150: 1144: 1138: 1132: 1131: 1128: 1119: 1116: 1110: 1109: 1107: 1101: 1098: 1092: 1091: 1088: 1082: 1076: 1070: 1069: 1061: 1055: 1049: 1043: 1042: 1038: 1033: 1027: 1021: 1020: 988: 982: 979: 973: 972: 969: 966: 963: 957: 956: 945: 939: 933: 927: 926: 906: 900: 894: 888: 887: 851: 845: 839: 833: 832: 831:Stack machine 829: 826: 820: 814: 813: 793: 787: 784: 778: 777: 769: 763: 760: 754: 753: 751: 745: 742: 736: 735: 732: 730:(64 elements) 726: 723: 717: 716: 713: 710: 704: 698: 697: 694: 689: 684: 648: 645: 611: 610: 598: 597: 596: 595: 594: 580: 551: 527: 526: 525: 511: 497: 469: 460:hold data for 449: 434: 417: 403: 379: 378: 377: 366:run-time stack 354: 347:index register 343:numeric values 332:primary memory 314: 224: 221: 187: 184: 68:memory address 26: 24: 14: 13: 10: 9: 6: 4: 3: 2: 4677: 4666: 4663: 4661: 4658: 4656: 4653: 4652: 4650: 4635: 4632: 4630: 4627: 4625: 4622: 4620: 4617: 4615: 4612: 4610: 4607: 4605: 4602: 4598: 4595: 4593: 4592:Overflow flag 4590: 4588: 4585: 4583: 4580: 4578: 4575: 4574: 4573: 4570: 4568: 4565: 4564: 4562: 4556: 4549: 4546: 4543: 4540: 4537: 4534: 4531: 4528: 4525: 4522: 4519: 4518:GNU Assembler 4516: 4513: 4510: 4508: 4505: 4504: 4502: 4500: 4496: 4490: 4487: 4485: 4482: 4480: 4477: 4475: 4472: 4470: 4467: 4465: 4462: 4460: 4457: 4455: 4452: 4451: 4449: 4445: 4436: 4431: 4429: 4424: 4422: 4417: 4416: 4413: 4401: 4398: 4396: 4393: 4391: 4388: 4386: 4383: 4381: 4378: 4376: 4373: 4371: 4368: 4366: 4363: 4361: 4358: 4357: 4355: 4351: 4344: 4341: 4339: 4336: 4334: 4331: 4329: 4326: 4324: 4321: 4319: 4316: 4314: 4311: 4310: 4308: 4306: 4300: 4290: 4287: 4285: 4282: 4280: 4277: 4275: 4272: 4270: 4267: 4263: 4260: 4258: 4255: 4253: 4250: 4249: 4248: 4245: 4244: 4242: 4240: 4236: 4230: 4227: 4223: 4220: 4218: 4215: 4214: 4213: 4210: 4206: 4203: 4202: 4201: 4198: 4196: 4193: 4191: 4190:Demultiplexer 4188: 4186: 4183: 4182: 4180: 4178: 4174: 4168: 4165: 4163: 4160: 4157: 4155: 4152: 4150: 4147: 4145: 4142: 4140: 4137: 4136: 4134: 4132: 4128: 4122: 4119: 4117: 4114: 4112: 4111:Memory buffer 4109: 4107: 4106:Register file 4104: 4102: 4099: 4097: 4094: 4092: 4089: 4088: 4086: 4084: 4080: 4072: 4069: 4067: 4064: 4063: 4062: 4059: 4057: 4054: 4052: 4049: 4047: 4046:Combinational 4044: 4043: 4041: 4039: 4035: 4029: 4026: 4022: 4019: 4018: 4016: 4013: 4011: 4008: 4006: 4003: 3998: 3995: 3993: 3990: 3989: 3987: 3984: 3981: 3978: 3975: 3972: 3969: 3966: 3965: 3963: 3961: 3955: 3949: 3946: 3944: 3941: 3939: 3936: 3934: 3931: 3927: 3924: 3922: 3919: 3917: 3914: 3912: 3909: 3907: 3904: 3902: 3899: 3898: 3897: 3894: 3892: 3889: 3888: 3886: 3882: 3876: 3873: 3871: 3868: 3866: 3863: 3861: 3858: 3857: 3855: 3851: 3843: 3840: 3839: 3838: 3835: 3833: 3830: 3828: 3825: 3823: 3820: 3818: 3815: 3813: 3810: 3808: 3805: 3803: 3800: 3798: 3795: 3793: 3790: 3788: 3785: 3783: 3780: 3778: 3775: 3773: 3770: 3768: 3765: 3764: 3762: 3760: 3756: 3746: 3743: 3741: 3738: 3736: 3733: 3730: 3727: 3724: 3721: 3718: 3715: 3712: 3709: 3707: 3704: 3701: 3698: 3696: 3693: 3691: 3688: 3687: 3685: 3683: 3677: 3670: 3667: 3665: 3662: 3659: 3656: 3653: 3650: 3649: 3647: 3641: 3635: 3632: 3630: 3627: 3625: 3622: 3620: 3617: 3615: 3612: 3610: 3607: 3605: 3602: 3601: 3599: 3595: 3588: 3585: 3582: 3579: 3576: 3573: 3571: 3568: 3566: 3563: 3561: 3558: 3556: 3553: 3551: 3548: 3546: 3543: 3541: 3538: 3536: 3533: 3531: 3528: 3526: 3523: 3519: 3516: 3515: 3513: 3510: 3507: 3504: 3503: 3501: 3499: 3495: 3489: 3486: 3484: 3481: 3478: 3475: 3472: 3469: 3466: 3463: 3460: 3457: 3454: 3451: 3446: 3443: 3442: 3440: 3437: 3435: 3432: 3431: 3429: 3427: 3421: 3409: 3406: 3405: 3404: 3401: 3399: 3396: 3392: 3389: 3387: 3384: 3382: 3379: 3377: 3374: 3373: 3372: 3369: 3367: 3364: 3363: 3361: 3359: 3355: 3349: 3346: 3344: 3341: 3339: 3336: 3332: 3329: 3327: 3324: 3323: 3322: 3319: 3317: 3314: 3313: 3311: 3309: 3305: 3299: 3296: 3294: 3291: 3287: 3284: 3283: 3282: 3279: 3275: 3272: 3270: 3267: 3266: 3265: 3262: 3258: 3255: 3253: 3250: 3249: 3248: 3245: 3243: 3240: 3236: 3233: 3231: 3228: 3227: 3226: 3223: 3222: 3220: 3216: 3213: 3211: 3207: 3197: 3194: 3192: 3189: 3188: 3186: 3184: 3180: 3174: 3171: 3169: 3166: 3162: 3159: 3157: 3154: 3153: 3152: 3149: 3147: 3146:Scoreboarding 3144: 3143: 3141: 3139: 3135: 3129: 3128:False sharing 3126: 3124: 3121: 3119: 3116: 3114: 3111: 3110: 3108: 3106: 3102: 3096: 3093: 3091: 3088: 3086: 3083: 3082: 3080: 3078: 3074: 3071: 3069: 3065: 3055: 3052: 3050: 3047: 3045: 3042: 3039: 3035: 3032: 3030: 3027: 3025: 3022: 3020: 3017: 3016: 3014: 3012: 3009: 3007: 3004: 3002: 2999: 2997: 2994: 2992: 2989: 2987: 2984: 2982: 2979: 2977: 2974: 2972: 2969: 2967: 2964: 2962: 2959: 2957: 2954: 2950: 2947: 2945: 2942: 2940: 2937: 2936: 2934: 2932: 2929: 2927: 2924: 2922: 2921:Stanford MIPS 2919: 2917: 2914: 2912: 2909: 2907: 2904: 2902: 2899: 2897: 2894: 2893: 2891: 2885: 2877: 2874: 2873: 2872: 2869: 2867: 2864: 2862: 2859: 2857: 2854: 2852: 2849: 2847: 2844: 2842: 2839: 2835: 2832: 2831: 2830: 2827: 2823: 2820: 2819: 2818: 2815: 2813: 2810: 2808: 2805: 2803: 2800: 2798: 2795: 2794: 2792: 2788: 2785: 2783: 2782:architectures 2777: 2771: 2768: 2766: 2763: 2761: 2758: 2756: 2753: 2751: 2750:Heterogeneous 2748: 2744: 2741: 2739: 2736: 2735: 2734: 2731: 2729: 2726: 2722: 2719: 2717: 2714: 2712: 2709: 2707: 2704: 2703: 2702: 2701:Memory access 2699: 2697: 2694: 2692: 2689: 2687: 2684: 2682: 2679: 2675: 2672: 2671: 2670: 2667: 2665: 2662: 2660: 2657: 2656: 2654: 2652: 2648: 2640: 2637: 2635: 2634:Random-access 2632: 2630: 2627: 2625: 2622: 2621: 2620: 2617: 2615: 2614:Stack machine 2612: 2610: 2607: 2603: 2600: 2598: 2595: 2593: 2590: 2588: 2585: 2583: 2580: 2578: 2575: 2573: 2570: 2568: 2565: 2564: 2563: 2560: 2556: 2553: 2551: 2548: 2546: 2543: 2541: 2538: 2536: 2533: 2531: 2530:with datapath 2528: 2527: 2526: 2523: 2521: 2518: 2516: 2513: 2512: 2510: 2508: 2504: 2500: 2493: 2488: 2486: 2481: 2479: 2474: 2473: 2470: 2457: 2451: 2448: 2432: 2426: 2423: 2418: 2414: 2410: 2404: 2401: 2388: 2381: 2375: 2372: 2360: 2356: 2350: 2347: 2339: 2333: 2330: 2325: 2318: 2312: 2309: 2304: 2298: 2295: 2287: 2281: 2278: 2262: 2256: 2253: 2247: 2242: 2235: 2232: 2219: 2213: 2210: 2194: 2188: 2185: 2172: 2165: 2159: 2156: 2148: 2142: 2139: 2134: 2127: 2121: 2118: 2110: 2109: 2102: 2099: 2094: 2087: 2081: 2078: 2073: 2066: 2060: 2057: 2052: 2046: 2044: 2040: 2032: 2026: 2023: 2007: 2001: 1998: 1982: 1976: 1973: 1965: 1959: 1956: 1941: 1937: 1936:Cray Research 1930: 1924: 1921: 1916: 1910: 1907: 1896: 1892: 1886: 1883: 1877: 1873: 1870: 1868: 1867:Register file 1865: 1863: 1860: 1858: 1855: 1853: 1850: 1849: 1845: 1843: 1841: 1837: 1833: 1825: 1817: 1815:64 (per core) 1812: 1809: 1808: 1804: 1798: 1792: 1790: 1787: 1786: 1782: 1776: 1770: 1768: 1765: 1764: 1760: 1754: 1748: 1745: 1742: 1741: 1737: 1731: 1725: 1722: 1719: 1718: 1713: 1711: 1707: 1701: 1698: 1695: 1694: 1691: 1685: 1679: 1677: 1674: 1673: 1670: 1664: 1658: 1656: 1653: 1652: 1647: 1643: 1637: 1631: 1629: 1626: 1625: 1620: 1614: 1608: 1606: 1603: 1602: 1597: 1591: 1588: 1586: 1583: 1582: 1578: 1572: 1566: 1564: 1561: 1560: 1555: 1547: 1544: 1543: 1539: 1537: 1530: 1524: 1522: 1519: 1518: 1506: 1502: 1497: 1489: 1486: 1485: 1481: 1476: 1473: 1472: 1468: 1462: 1459: 1457: 1454: 1453: 1449: 1445: 1439: 1433: 1431: 1427: 1424: 1423: 1419: 1413: 1407: 1405: 1402: 1401: 1397: 1393: 1387: 1381: 1379: 1376: 1375: 1371: 1368: 1365: 1363: 1360: 1359: 1354: 1349: 1343: 1337: 1335: 1332: 1331: 1327: 1321: 1315: 1313: 1312:Xelerated X10 1310: 1309: 1306: 1304: 1297: 1291: 1289: 1286: 1285: 1281: 1277: 1274: 1271: 1269: 1266: 1265: 1261: 1257: 1252: 1250: 1246: 1240: 1238: 1234: 1230: 1226: 1223: 1222: 1217: 1211: 1205: 1203: 1200: 1199: 1195: 1191: 1187: 1183: 1178: 1175: 1174: 1169: 1167: 1163: 1160: 1158: 1155: 1154: 1151: 1145: 1139: 1137: 1134: 1133: 1129: 1127: 1120: 1117: 1115: 1112: 1111: 1108: 1102: 1099: 1097: 1096:Motorola 6800 1094: 1093: 1089: 1083: 1077: 1075: 1072: 1071: 1066: 1062: 1056: 1050: 1048: 1045: 1044: 1039: 1034: 1028: 1026: 1023: 1022: 1017: 1013: 1009: 1005: 1001: 997: 993: 989: 983: 980: 978: 975: 974: 970: 967: 964: 962: 959: 958: 954: 950: 946: 944: 940: 934: 932: 929: 928: 924: 920: 915: 911: 907: 905: 901: 895: 893: 890: 889: 884: 880: 876: 872: 868: 864: 860: 856: 852: 850: 846: 840: 838: 835: 834: 830: 827: 821: 819: 816: 815: 811: 807: 803: 799: 794: 788: 785: 783: 780: 779: 775: 770: 764: 761: 759: 756: 755: 752: 746: 743: 741: 738: 737: 733: 731: 727: 724: 722: 719: 718: 714: 711: 705: 703: 700: 699: 695: 690: 685: 683:Architecture 682: 681: 678: 676: 672: 669: 668:mathematician 665: 660: 654: 646: 644: 642: 638: 637: 632: 631:register file 628: 624: 619: 617: 616: 608: 604: 603: 599: 592: 588: 587: 586: 581: 578: 574: 570: 566: 565: 564: 559: 558: 556: 552: 549: 548: 547: 541: 540: 538: 537: 528: 523: 519: 518: 517: 512: 509: 506:(also called 505: 504: 503: 498: 495: 491: 487: 483: 482:program state 479: 475: 474: 470: 467: 463: 459: 458: 450: 447: 443: 442: 440: 435: 432: 428: 427: 418: 415: 411: 410: 409: 404: 401: 397: 396:register file 393: 385: 384: 380: 375: 374:stack machine 371: 367: 363: 362: 361: 360:stack pointer 355: 352: 348: 344: 340: 336: 335: 333: 329: 325: 324: 315: 312: 308: 304: 300: 296: 292: 288: 284: 280: 276: 272: 268: 264: 261:, as well as 260: 256: 252: 248: 247: 243:Data register 238: 237: 235: 234: 230: 229: 228: 222: 220: 218: 213: 209: 205: 201: 197: 193: 185: 183: 181: 177: 173: 169: 165: 161: 156: 154: 150: 146: 142: 138: 134: 130: 126: 122: 118: 113: 111: 107: 104: 100: 96: 92: 88: 84: 79: 77: 73: 69: 65: 61: 57: 53: 49: 41: 37: 32: 19: 4618: 4479:Machine code 4464:Disassembler 4400:Chip carrier 4338:Clock gating 4257:Mixed-signal 4154:Write buffer 4131:Control unit 4090: 3943:Clock signal 3682:accelerators 3664:Cypress PSoC 3321:Simultaneous 3138:Out-of-order 2770:Neuromorphic 2651:Architecture 2609:Belt machine 2602:Zeno machine 2535:Hierarchical 2450: 2438:. Retrieved 2425: 2417:ARM Holdings 2412: 2403: 2391:. Retrieved 2387:ARM Holdings 2374: 2362:. Retrieved 2358: 2349: 2332: 2311: 2297: 2280: 2268:. Retrieved 2255: 2234: 2222:. Retrieved 2212: 2200:. Retrieved 2187: 2175:. Retrieved 2158: 2141: 2120: 2107: 2101: 2080: 2059: 2025: 2013:. Retrieved 2000: 1988:. Retrieved 1975: 1958: 1947:. Retrieved 1923: 1909: 1898:. Retrieved 1894: 1885: 1829: 1746:64-bit (A64) 1709: 1535: 1504: 1475:IBM Cell SPE 1302: 1280:Donald Knuth 1248: 1165: 1125: 1114:Motorola 68k 1047:VM Labs Nuon 961:Fairchild F8 942: 903: 848: 729: 692:FP registers 661: 650: 634: 620: 613: 612: 601: 600: 590: 583: 582: 576: 572: 568: 561: 560: 544: 543: 530: 529: 521: 514: 513: 507: 500: 499: 477: 472: 471: 452: 451: 437: 436: 430: 420: 419: 414:truth values 406: 405: 399: 387: 382: 381: 358: 357: 342: 338: 317: 316: 240: 239: 232: 231: 226: 202:register", " 198:register", " 189: 182:programmer. 157: 114: 110:cache levels 80: 47: 45: 4558:Programming 4185:Multiplexer 4149:Data buffer 3860:Single-core 3832:bit slicing 3690:Coprocessor 3545:Coprocessor 3426:performance 3348:Cooperative 3338:Speculative 3298:Distributed 3257:Superscalar 3242:Instruction 3210:Parallelism 3183:Speculative 3015:System/3x0 2887:Instruction 2664:Von Neumann 2577:Post–Turing 2364:14 November 2015:January 23, 1990:January 23, 1710:(up to 32) 1513:MOVE 1,1000 1025:Sunplus SPG 919:Pentium III 847:stack of 8 370:data stacks 311:accumulator 141:Pentium Pro 127:, allowing 64:main memory 4649:Categories 4577:Carry flag 4567:Call stack 4499:Assemblers 4305:management 4200:Multiplier 4061:Logic gate 4051:Sequential 3958:Functional 3938:Clock rate 3911:Data cache 3884:Components 3865:Multi-core 3853:Core count 3343:Preemptive 3247:Pipelining 3230:Bit-serial 3173:Wide-issue 3118:Structural 3040:Tilera ISA 3006:MicroBlaze 2976:ETRAX CRIS 2871:Comparison 2716:Load–store 2696:Endianness 2246:1804.06826 1949:2022-12-23 1900:2022-08-12 1878:References 1832:efficiency 1507:operands: 1353:multi-core 1233:System/390 1229:System/370 1225:System/360 837:16-bit x86 828:stack of 6 806:Intel 8232 802:AMD Am9511 798:Intel 8231 712:stack of 7 305:, and the 267:bit arrays 263:characters 145:Cyrix 6x86 40:Flip-flops 4634:Registers 4597:Zero flag 4239:Circuitry 4159:Microcode 4083:Registers 3926:coherence 3901:CPU cache 3759:Word size 3424:Processor 3068:Execution 2971:DEC Alpha 2949:Power ISA 2765:Cognitive 2572:Universal 1852:CPU cache 1430:Power ISA 1404:IBM POWER 1136:SH 16-bit 1012:Transmeta 990:Geode GX/ 941:16 or 32 441:registers 328:addresses 249:can hold 135:. Modern 70:e.g. DEC 52:processor 4507:A86/A386 4177:Datapath 3870:Manycore 3842:variable 3680:Hardware 3316:Temporal 2996:OpenRISC 2691:Cellular 2681:Dataflow 2674:modified 2202:June 13, 2171:Motorola 1940:Archived 1846:See also 1811:Epiphany 1715:32-bit. 1605:W65C816S 1509:MOVE 1,2 1456:Blackfin 992:Media GX 977:Geode GX 949:AVX/AVX2 647:Examples 464:done by 439:Constant 265:, small 255:integers 253:such as 172:compiler 129:parallel 76:ICT 1900 4353:Related 4284:Quantum 4274:Digital 4269:Boolean 4167:Counter 4066:Quantum 3827:512-bit 3822:256-bit 3817:128-bit 3660:(MPSoC) 3645:on chip 3643:Systems 3461:(FLOPS) 3274:Process 3123:Control 3105:Hazards 2991:Itanium 2986:Unicore 2944:PowerPC 2669:Harvard 2629:Pointer 2624:Counter 2582:Quantum 2270:May 11, 2177:May 18, 1708:Varies 1646:Toshiba 1426:PowerPC 1362:Itanium 1288:NS320xx 1074:Nios II 1065:VM Labs 1010:. Like 953:AVX-512 818:iAPX432 400:unified 339:address 307:HP 2100 275:IBM 709 271:IBM 704 174:in the 158:When a 103:dynamic 56:storage 4609:Opcode 4560:issues 4550:(WASM) 4544:(TASM) 4538:(NASM) 4532:(MASM) 4514:(FASM) 4447:Topics 4289:Switch 4279:Analog 4017:(IMC) 3988:(MMU) 3837:others 3812:64-bit 3807:48-bit 3802:32-bit 3797:24-bit 3792:16-bit 3787:15-bit 3782:12-bit 3619:Mobile 3535:Stream 3530:Barrel 3525:Vector 3514:(GPU) 3473:(SUPS) 3441:(IPC) 3293:Memory 3286:Vector 3269:Thread 3252:Scalar 3054:Others 3001:RISC-V 2966:SuperH 2935:Power 2931:MIPS-X 2906:PDP-11 2755:Fabric 2507:Models 2440:27 May 2393:27 May 2224:Jan 9, 2133:Altera 1838:. The 1789:RISC-V 1521:PDP-11 1488:PDP-10 1016:3DNow! 931:x86-64 869:, and 804:, and 721:Cray-1 696:Notes 297:, the 295:PDP-15 281:, the 273:, the 204:64-bit 200:32-bit 153:AMD K5 151:, and 99:static 72:PDP-10 4572:Flags 4526:(HLA) 4520:(GAS) 4345:(PPW) 4303:Power 4195:Adder 4071:Array 4038:Logic 3999:(TLB) 3982:(FPU) 3976:(AGU) 3970:(ALU) 3960:units 3896:Cache 3777:8-bit 3772:4-bit 3767:1-bit 3731:(TPU) 3725:(DSP) 3719:(PPU) 3713:(VPU) 3702:(GPU) 3671:(NoC) 3654:(SoC) 3589:(PoP) 3583:(SiP) 3577:(MCM) 3518:GPGPU 3508:(CPU) 3498:Types 3479:(PPW) 3467:(TPS) 3455:(IPS) 3447:(CPI) 3218:Level 3029:S/390 3024:S/370 3019:S/360 2961:SPARC 2939:POWER 2822:TRIPS 2790:Types 2459:(PDF) 2434:(PDF) 2383:(PDF) 2341:(PDF) 2320:(PDF) 2289:(PDF) 2264:(PDF) 2241:arXiv 2196:(PDF) 2167:(PDF) 2150:(PDF) 2129:(PDF) 2112:(PDF) 2093:Intel 2089:(PDF) 2068:(PDF) 2034:(PDF) 2009:(PDF) 1984:(PDF) 1967:(PDF) 1943:(PDF) 1932:(PDF) 1826:Usage 1563:Alpha 1378:SPARC 1190:Fermi 1186:Tesla 1004:Cyrix 914:80387 910:80386 892:IA-32 883:80287 879:80187 871:80286 867:80188 863:80186 641:Alpha 633:is a 623:SPARC 412:hold 326:hold 303:PDP-8 299:PDP-5 291:PDP-9 287:PDP-7 283:PDP-4 279:PDP-1 223:Types 196:8-bit 149:Nx586 4323:ACPI 4056:Glue 3948:FIFO 3891:Core 3629:ASIP 3570:CPLD 3565:FPOA 3560:FPGA 3555:ASIC 3408:SPMD 3403:MIMD 3398:MISD 3391:SWAR 3371:SIMD 3366:SISD 3281:Data 3264:Task 3235:Word 2981:M32R 2926:MIPS 2889:sets 2856:ZISC 2851:NISC 2846:OISC 2841:MISC 2834:EPIC 2829:VLIW 2817:EDGE 2807:RISC 2802:CISC 2711:HUMA 2706:NUMA 2442:2013 2395:2013 2366:2019 2272:2020 2226:2020 2204:2015 2179:2015 2017:2014 1992:2014 1767:MIPS 1585:6502 1501:core 1268:MMIX 1177:CUDA 1000:5x86 996:4x86 908:The 875:8087 859:8088 855:8086 853:The 782:8080 758:8008 740:4004 675:GPUs 627:MIPS 625:and 542:The 522:MTRR 466:SIMD 356:The 192:bits 186:Size 131:and 4318:APM 4313:PMU 4205:CPU 4162:ROM 3933:Bus 3550:PAL 3225:Bit 3011:LMC 2916:ARM 2911:x86 2901:VAX 2072:AMD 1744:ARM 1721:ARM 1697:ARM 1628:MeP 1546:VAX 1479:128 1369:128 1366:128 1275:256 1272:256 1260:ELF 923:SSE 881:or 810:Z80 657:ESP 653:x86 591:MAR 577:MDR 569:MBR 555:RAM 478:SPR 431:FPR 398:is 390:GPR 137:x86 106:RAM 101:or 4651:: 4252:3D 2415:. 2411:. 2385:. 2357:. 2322:. 2169:. 2131:. 2091:. 2070:. 2042:^ 1934:. 1893:. 1802:32 1796:31 1780:32 1774:31 1758:32 1752:31 1735:16 1727:00 1705:14 1687:00 1683:32 1666:00 1660:00 1639:00 1633:00 1616:00 1610:00 1593:00 1576:31 1570:31 1553:16 1534:6 1532:00 1526:00 1495:16 1464:00 1443:32 1437:32 1417:32 1411:32 1398:. 1391:32 1385:31 1345:00 1339:00 1325:32 1317:00 1301:8 1299:00 1293:00 1244:16 1235:, 1231:, 1227:, 1213:00 1209:16 1147:00 1143:16 1141:00 1124:8 1122:00 1104:00 1085:00 1081:31 1058:00 1052:00 1030:00 985:00 955:. 938:16 897:00 877:, 861:, 842:00 823:00 800:, 790:00 766:00 748:00 707:00 524:s) 446:pi 376:). 334:. 219:. 155:. 147:, 143:, 112:. 89:, 78:. 74:, 46:A 34:A 4434:e 4427:t 4420:v 2491:e 2484:t 2477:v 2461:. 2444:. 2419:. 2397:. 2368:. 2326:. 2305:. 2291:. 2274:. 2249:. 2243:: 2228:. 2206:. 2181:. 2019:. 1994:. 1952:. 1917:. 1903:. 1800:0 1794:0 1778:0 1772:0 1756:0 1750:0 1733:0 1729:8 1703:0 1689:0 1681:0 1668:0 1662:1 1641:8 1635:4 1618:0 1612:1 1595:0 1574:0 1568:0 1551:0 1528:7 1493:0 1466:0 1441:0 1435:0 1428:/ 1415:0 1409:0 1389:0 1383:0 1347:2 1341:0 1323:0 1319:1 1295:8 1242:0 1215:8 1207:0 1188:/ 1149:6 1106:0 1087:8 1079:0 1060:1 1054:0 1032:0 1006:/ 998:/ 994:/ 987:8 968:— 936:0 899:8 865:/ 857:/ 844:8 825:0 792:0 768:0 750:0 709:0 593:) 589:( 579:) 575:( 567:( 536:s 520:( 476:( 448:. 429:( 426:s 386:( 323:s 301:/ 293:/ 289:/ 285:/ 246:s 42:. 20:)

Index

Processor registers

register-transfer level (RTL)
Flip-flops
processor
storage
computer architecture
main memory
memory address
PDP-10
ICT 1900
load/store architecture
arithmetic operations
bitwise operations
machine instructions
static
dynamic
RAM
cache levels
memory hierarchy
instruction set
register renaming
parallel
speculative execution
x86
Pentium Pro
Cyrix 6x86
Nx586
AMD K5
computer program

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