80:
545:) surrounded by programmable logic. These devices let designers concentrate on adding new features to designs without having to worry about making the microprocessor work. Also, the fixed-function microprocessor takes less space on the chip than a part of the programmable gate array implementing the same processor, leaving more space for the programmable gate array to contain the designer's specialized circuits.
478:
322:
38:
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logic device families from different manufacturers. Today's device programmers usually can program common PLDs (mostly PAL/GAL equivalents) from all existing manufacturers. Common file formats used to store the boolean logic pattern (fuses) are JEDEC, Altera POF (programmable object file), or Xilinx BITstream.
616:
memory cells, and can be erased and reprogrammed as required. This makes it useful in PLDs that may be reprogrammed frequently, such as PLDs used in prototypes. Flash memory is a kind of EEPROM that holds information using trapped electric charges similar to EPROM. Consequently, flash memory can hold
283:
or PAL. The architecture was simpler than that of
Signetics' FPLA because it omitted the programmable OR array. This made the parts faster, smaller and cheaper. They were available in 20-pin 300-mil DIP packages, while the FPLAs came in 28-pin 600-mil packages. The PAL Handbook demystified the design
202:
introduced a mask-programmable PLA device (DM7575) with 14 inputs and 8 outputs with no memory registers. This was more popular than the TI part but the cost of making the metal mask limited its use. The device is significant because it was the basis for the field programmable logic array produced by
111:
with fixed functions, the function of a PLD is undefined at the time of manufacture. Before the PLD can be used in a circuit it must be programmed to implement the desired function. Compared to fixed logic devices, programmable logic devices simplify the design of complex logic and may offer superior
377:
Some CPLDs are programmed using a PAL programmer, but this method becomes inconvenient for devices with hundreds of pins. A second method of programming is to solder the device to its printed circuit board, then feed it with a serial data stream from a personal computer. The CPLD contains a circuit
256:
A programmable logic array (PLA) has a programmable AND gate array, which links to a programmable OR gate array, which can then be conditionally complemented to produce an output. A PLA is similar to a ROM concept, however a PLA does not provide full decoding of a variable and does not generate all
694:
is used to transfer the boolean logic pattern into the programmable device. In the early days of programmable logic, every PLD manufacturer also produced a specialized device programmer for its family of logic devices. Later, universal device programmers came onto the market that supported several
620:
As of 2005, most CPLDs are electrically programmable and erasable, and non-volatile. This is because they are too small to justify the inconvenience of programming internal SRAM cells every time they start up, and EPROM cells are more expensive due to their ceramic package with a quartz window.
433:
FPGAs are usually programmed after being soldered down to the circuit board, in a manner similar to that of larger CPLDs. In most larger FPGAs, the configuration is volatile and must be re-loaded into the device whenever power is applied or different functionality is required. Configuration is
222:
or PALA. The MMI 5760 was completed in 1976 and could implement multilevel or sequential circuits of over 100 gates. The device was supported by a GE design environment where
Boolean equations would be converted to mask patterns for configuring the device. The part was never brought to market.
605:(metal-oxide semiconductor field-effect transistor, or MOS transistor) that can be switched on by trapping an electric charge permanently on its gate electrode. This is done by a PAL programmer. The charge remains for many years and can only be removed by exposing the chip to strong
593:
Silicon antifuses are connections that are made by applying a voltage across a modified area of silicon inside the chip. They are called antifuses because they work in the opposite way to normal fuses, which begin life as connections until they are broken by an electric current.
597:
SRAM, or static RAM, is a volatile type of memory, meaning that its contents are lost each time the power is switched off. SRAM-based PLDs therefore have to be programmed every time the circuit is switched on. This is usually done automatically by another part of the circuit.
275:
PAL devices have arrays of transistor cells arranged in a "fixed-OR, programmable-AND" plane used to implement "sum-of-products" binary logic equations for each of the outputs in terms of the inputs and either synchronous or asynchronous feedback from the outputs.
348:
and electrically erasable (E) floating gate technology for a high-speed, low-power logic device. A similar device called a PEEL (programmable electrically erasable logic) was introduced by the
International CMOS Technology (ICT) corporation.
83:
A simplified PAL device. The programmable elements (shown as a fuse) connect both the true and complemented inputs to the AND gates. These AND gates, also known as product terms, are ORed together to form a sum-of-products logic
670:
are popular higher-level description languages for more complex devices. The more limited ABEL is often used for historical reasons, but for new designs VHDL is more popular, even for low-complexity designs.
557:
device. The memory is used to store the pattern that was given to the chip during programming. Most of the methods for storing data in an integrated circuit have been adapted for use in PLDs. These include:
416:(FPGA). Early examples of FPGAs are the 82S100 array, and 82S105 sequencer, by Signetics, introduced in the late 1970s. The 82S100 was an array of AND terms. The 82S105 also had flip-flop functions.
526:) is an integrated circuit that comprises an array of PLDs that do not come pre-connected; the connections are programmed electrically by the user. Most GAL and FPGA devices are examples of EPLDs.
245:
read-only associative memory or ROAM. This device, the TMS2000, was programmed by altering the metal layer during the production of the IC. The TMS2000 had up to 17 inputs and 18 outputs with 8
166:
read-only associative memory or ROAM. This device, the TMS2000, was programmed by altering the metal layer during the production of the IC. The TMS2000 had up to 17 inputs and 18 outputs with 8
538:
and other functions that can be altered by code running on the processor. Designing self-altering systems requires that engineers learn new methods, and that new software tools be developed.
1112:
430:
means the device is programmed by the customer, not the manufacturer. FPGAs and gate arrays are similar but gate arrays can only be configured at the factory during fabrication.
284:
process. The PALASM design software (PAL assembler) converted the engineers' Boolean equations into the fuse pattern required to program the part. The PAL devices were soon
902:
Press release on
Intersil IM5200 field programmable logic array. Fourteen inputs pins and 48 product terms. Avalanched-induced-migration programming. Unit price was $ 37.50
333:
in 1985. This device has the same logical properties as the PAL but can be erased and reprogrammed. The GAL is very useful in the prototyping stage of a design, when any
337:
in the logic can be corrected by reprogramming. GALs are programmed and reprogrammed using a PAL programmer, or, in the case of chips that support it, by using the
922:
Press release on
Signetics 82S100 and 82S101 field programmable logic arrays. Fourteen inputs pins, 8 output pins and 48 product terms. NiCr fuse link programming.
770:
1723:
1165:
408:
While PALs were being developed into GALs and CPLDs (all discussed above), a separate stream of development was happening. This type of device is based on
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1993:
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1998:
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59:
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187:(PROM) technology. This experimental device improved on IBM's ROAM by allowing multilevel logic. Intel had just introduced the floating-gate
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352:
Sometimes GAL chips are referred as simple programmable logic device (SPLD), analogous to complex programmable logic device (CPLD) below.
1943:
1842:
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PALs and GALs are available only in small sizes, equivalent to a few hundred logic gates. For bigger logic circuits, complex PLDs or
1877:
1716:
1210:
941:
704:
482:
457:). CPLDs are meant for simpler designs while FPGAs are meant for more complex designs. In general, CPLDs are a good choice for wide
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120:
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so the researcher at GE incorporated that technology. The GE device was the first erasable PLD ever developed, predating the
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2015:
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that decodes the data stream and configures the CPLD to perform its specified logic function. Some manufacturers, such as
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2005:
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can be used. These contain the equivalent of several PALs linked by programmable interconnections, all in one
2010:
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51:
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Flash memory is non-volatile, retaining its contents even when the power is switched off. It is stored on
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218:(MMI) to develop a mask-programmable logic device incorporating the GE innovations. The device was named
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PAL with additional features. After buying out MMI (1987), AMD spun off a consolidated operation as
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offered the XC157, a mask-programmed gate array with 12 gates and 30 uncommitted input/output pins.
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1975:
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426:, and once stored, the data doesn't change, similar to that of an ordinary gate array. The term
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Many PAL programming devices accept input in a standard file format, commonly referred to as '
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s have a quartz window in the package that allows them to be erased on exposure to UV light.
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PLDs are being sold now that contain a microprocessor with a fixed function (the so-called
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1983:
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419:(Remark: 82S100 and similar ICs from Signetics have PLA structure, AND-plane + OR-plane.)
113:
1038:
960:
Electronics, Power
Electronics, Optoelectronics, Microwaves, Electromagnetics, and Radar
195:
EPLD by over a decade. GE obtained several early patents on programmable logic devices.
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An improvement on the PAL was the generic array logic device, or GAL, invented by
116:, programming a PLD changes the connections made between the gates in the device.
17:
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882:. Assignee: General Electric, Filed: July 18, 1973, Granted: November 19, 1974
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863:
847:
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or flash memory. EEPROM versions may be in-system programmable (typically via
423:
409:
374:. CPLDs can replace thousands, or even hundreds of thousands, of logic gates.
108:
449:
The difference between FPGAs and CPLDs is that FPGAs are internally based on
2094:
1763:
1665:
1660:
1643:
1605:
1412:
1290:
204:
866:. Assignee: General Electric, Filed: April 28, 1972, Granted: June 11, 1974
850:. Assignee: General Electric, Filed: April 28, 1972, Granted: June 18, 1974
834:
Report introduces the TMS2000 and TMS2200 series of mask programmable PLAs.
37:
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Company (GE) was developing a programmable logic device based on the new
152:
119:
PLDs can broadly be categorised into, in increasing order of complexity,
1615:
1505:
1467:
1331:
1285:
663:
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453:(LUTs), whereas CPLDs form the logic functions with sea-of-gates (e.g.
1701:
1677:
1536:
1361:
1245:
1143:
1045:
830:
A Texas
Instruments Application Report: MOS programmable logic arrays
651:
602:
579:
508:
439:
379:
300:
211:
actually beat
Signetics to market but poor yield doomed their part.)
192:
674:
For modern PLD programming languages, design flows, and tools, see
1447:
1427:
1386:
987:
Embedded System Design: A Unified
Hardware / Software Introduction
630:
575:
497:
476:
383:
320:
1069:"Digital Electronics 2: Sequential and Arithmetic Logic Circuits"
325:
Lattice GAL 16V8 and 20V8. These are 35 nanosecond devices.
1590:
1302:
675:
667:
617:
information for years, but possibly not as many years as EPROM.
443:
387:
367:
345:
1705:
1147:
1422:
292:
242:
163:
31:
920:(13). Boston, MA: Cahners Publishing: 61. July 20, 1975.
900:(13). Boston, MA: Cahners Publishing: 66. July 20, 1975.
461:
applications, whereas FPGAs are more suitable for large
1113:"PLD Tools Creating SVF, JAM, STAPL and other formats"
740:
738:
662:
are frequently used for low-complexity devices, while
288:
by
National Semiconductor, Texas Instruments and AMD.
534:
These are microprocessor circuits that contain some
2125:
2058:
1974:
1911:
1739:
1624:
1571:
1560:
1519:
1493:
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1405:
1276:
1181:
984:Vahid, Frank; Givargis, Tony D. (17 October 2001).
279:MMI introduced a breakthrough device in 1978, the
107:. Unlike digital logic constructed using discrete
812:Motorola Semiconductor Data Book, Fourth Edition
553:A PLD is a combination of a logic device and a
291:After MMI succeeded with the 20-pin PAL parts,
241:developed a mask-programmable IC based on the
162:developed a mask-programmable IC based on the
1717:
1159:
1063:
1061:
823:
821:
747:Horowitz P., Hill W. - The Art of Electronics
8:
1079:
1077:
1724:
1710:
1702:
1568:
1490:
1166:
1152:
1144:
769:: CS1 maint: location missing publisher (
609:light in a device called an EPROM eraser.
214:In 1974 GE entered into an agreement with
137:complex programmable logic devices (CPLDs)
934:Practical Design Using Programmable Logic
861:Multiple Level Associative Logic Circuits
121:simple programmable logic devices (SPLDs)
932:Pellerin, David; Michael Holley (1991).
845:Electrically Programmable Logic Circuits
78:
62:of all important aspects of the article.
1896:Application-specific integrated circuit
1039:"Using Flash Memory to Configure FPGAs"
892:"Semiconductors and IC's : FPLA".
745:Horowitz, Paul; Hill, Winfield (2015).
734:
1119:. Corelis. Dec 1, 2010. Archived from
762:
141:field-programmable gate arrays (FPGAs)
58:Please consider expanding the lead to
27:Reconfigurable digital circuit element
1085:"The Design Warrior's Guide to FPGAs"
832:. Texas Instruments. Bulletin CA-158.
784:Holdsworth, B.; Woods, R. C. (2003).
7:
1831:Three-dimensional integrated circuit
877:Segmented Associative Logic Circuits
814:. Motorola Inc. 1969. p. IC-73.
434:typically stored in a configuration
303:, and that business was acquired by
220:programmable associative logic array
957:Dorf, Richard C. (3 October 2018).
549:How PLDs retain their configuration
1843:Erasable programmable logic device
912:"FPLA's give quick custom logic".
520:erasable programmable logic device
25:
1878:Complex programmable logic device
705:Complex programmable logic device
390:to program CPLDs in-circuit from
362:Complex programmable logic device
1011:Chen, Wai-Kai (3 October 2018).
36:
1890:Field-programmable object array
1826:Mixed-signal integrated circuit
644:for logic compilers are called
249:for memory. TI coined the term
170:for memory. TI coined the term
50:may be too short to adequately
646:hardware description languages
633:files'. They are analogous to
60:provide an accessible overview
1:
2016:Hardware description language
1884:Field-programmable gate array
936:. Prentice-Hall. p. 15.
828:Andres, Kent (October 1970).
711:Field-programmable gate array
507:Using the same technology as
496:Using the same technology as
414:field-programmable gate array
412:technology and is called the
404:Field-programmable gate array
185:programmable read-only memory
515:can be erased electrically.
2028:Formal equivalence checking
2175:
2048:Hierarchical state machine
2006:Transaction-level modeling
1215:
790:(4th ed.). Elsevier.
601:An EPROM memory cell is a
401:
359:
314:
268:
230:
1949:Digital signal processing
1934:Logic in computer science
1860:Programmable logic device
1820:Hybrid integrated circuit
990:. John Wiley & Sons.
749:. New York. p. 764.
625:PLD programming languages
90:programmable logic device
1961:Switching circuit theory
1866:Programmable Array Logic
1854:Programmable logic array
1258:Circuit underutilization
1241:Reconfigurable computing
1139:. Lattice Semiconductor.
722:Programmable array logic
680:reconfigurable computing
640:. The languages used as
281:programmable array logic
271:Programmable array logic
251:programmable logic array
233:Programmable logic array
173:programmable logic array
129:programmable logic array
125:programmable array logic
112:performance. Unlike for
100:component used to build
2011:Register-transfer level
686:PLD programming devices
176:(PLA) for this device.
1902:Tensor Processing Unit
1067:Tertulien Ndjountche.
493:
339:in-circuit programming
326:
295:introduced the 24-pin
207:in 1975, the 82S100. (
200:National Semiconductor
85:
2117:Electronic literature
2071:Hardware acceleration
1939:Computer architecture
1837:Emitter-coupled logic
1774:Printed circuit board
1268:Hardware acceleration
480:
384:Atmel (now Microchip)
344:Lattice GALs combine
331:Lattice Semiconductor
324:
305:Lattice Semiconductor
82:
2043:Finite-state machine
2021:High-level synthesis
1956:Circuit minimization
1458:Microchip Technology
1263:High-level synthesis
1117:JTAG / boundary-scan
787:Digital Logic Design
614:floating-gate MOSFET
422:FPGAs use a grid of
2090:Digital photography
1872:Generic Array Logic
1794:Combinational logic
1769:Printed electronics
1733:Digital electronics
1527:Intel Quartus Prime
1253:Soft microprocessor
880:US Patent 3,849,638
864:US Patent 3,816,725
848:US Patent 3,818,452
459:combinational logic
317:Generic array logic
216:Monolithic Memories
133:generic array logic
2038:Asynchronous logic
1814:Integrated circuit
1779:Electronic circuit
1175:Programmable logic
494:
428:field-programmable
372:integrated circuit
327:
86:
18:Programmable logic
2146:
2145:
2095:Digital telephone
2066:Computer hardware
2033:Synchronous logic
1699:
1698:
1695:
1694:
1691:
1690:
1478:Texas Instruments
1137:"FPGAs and CPLDs"
1123:on March 18, 2012
1024:978-1-4200-0596-7
1014:The VLSI Handbook
997:978-0-471-38678-0
970:978-1-4200-0315-4
797:978-0-7506-4582-9
756:978-0-521-80926-9
692:device programmer
253:for this device.
239:Texas Instruments
160:Texas Instruments
77:
76:
16:(Redirected from
2166:
1799:Sequential logic
1726:
1719:
1712:
1703:
1569:
1491:
1168:
1161:
1154:
1145:
1140:
1132:
1130:
1128:
1099:
1097:PLD File Formats
1094:
1088:
1083:Clive Maxfield.
1081:
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1035:
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954:
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947:
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901:
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883:
875:Greer, David L.
873:
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859:Greer, David L.
857:
851:
843:Greer, David L.
841:
835:
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181:General Electric
105:digital circuits
72:
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40:
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21:
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2164:
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2149:
2148:
2147:
2142:
2121:
2054:
1989:Place and route
1984:Logic synthesis
1970:
1966:Gate equivalent
1929:Logic synthesis
1924:Boolean algebra
1907:
1849:Macrocell array
1809:Boolean circuit
1735:
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1700:
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1071:. 2016. p. 224.
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717:Macrocell array
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536:fixed functions
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467:microprocessors
455:sum of products
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114:microprocessors
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45:This article's
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2105:cinematography
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463:state machines
451:look-up tables
402:Main article:
399:
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360:Main article:
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315:Main article:
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286:second-sourced
269:Main article:
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54:the key points
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261:as in a ROM.
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2059:Applications
1859:
1596:LatticeMico8
1586:ARM Cortex-M
1562:Intellectual
1174:
1125:. Retrieved
1121:the original
1116:
1092:
1049:. Retrieved
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588:Flash memory
583:memory cells
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87:
68:January 2013
65:
49:
47:lead section
29:
2159:Gate arrays
1789:Memory cell
1626:Open-source
1573:Proprietary
1382:Flow to HDL
1204:Logic block
648:, or HDLs.
642:source code
607:ultraviolet
424:logic gates
341:technique.
109:logic gates
2138:Runt pulse
2110:television
1804:Logic gate
1749:Transistor
1741:Components
1601:MicroBlaze
1552:Simulators
1532:Xilinx ISE
1051:2024-08-21
729:References
410:gate array
98:electronic
1994:Placement
1784:Flip-flop
1764:Capacitor
1671:Microwatt
1666:Libre-SOC
1661:Power ISA
1644:OpenCores
1606:PicoBlaze
1413:Accellera
1406:Companies
1278:Languages
765:cite book
638:compilers
566:antifuses
307:in 1999.
237:In 1970,
205:Signetics
179:In 1971,
158:In 1970,
151:In 1969,
52:summarize
2153:Category
1759:Inductor
1754:Resistor
1649:OpenRISC
1564:property
1542:ModelSim
1520:Software
1494:Hardware
1487:Products
1473:Synopsys
1443:Infineon
1418:Achronix
1377:C to HDL
1342:Handel-C
1182:Concepts
1127:July 18,
699:See also
635:software
465:such as
259:minterms
209:Intersil
198:In 1973
189:UV EPROM
153:Motorola
96:) is an
1999:Routing
1833:(3D IC)
1616:Nios II
1506:Stratix
1468:Siemens
1453:Lattice
1438:Cadence
1332:SystemC
1286:Verilog
664:Verilog
563:Silicon
509:EEPROMs
491:package
483:Cypress
394:files.
147:History
1976:Design
1912:Theory
1898:(ASIC)
1892:(FPOA)
1886:(FPGA)
1880:(CPLD)
1845:(EPLD)
1678:RISC-V
1537:Vivado
1511:Virtex
1397:Chisel
1362:PALASM
1246:Xputer
1046:Altera
1021:
994:
967:
940:
794:
753:
713:(FPGA)
707:(CPLD)
652:PALASM
603:MOSFET
580:EEPROM
555:memory
513:EEPLDs
498:EPROMs
440:EEPROM
386:, use
380:Altera
301:Vantis
193:Altera
139:; and
84:array.
2083:radio
1904:(TPU)
1874:(GAL)
1868:(PAL)
1862:(PLD)
1856:(PLA)
1839:(ECL)
1822:(HIC)
1448:Intel
1428:Aldec
1387:MyHDL
1313:VITAL
1042:(PDF)
724:(PAL)
631:JEDEC
576:EPROM
485:in a
473:EPLDs
398:FPGAs
368:CPLDs
356:CPLDs
297:22V10
1816:(IC)
1654:1200
1611:Nios
1591:LEON
1392:ELLA
1372:CUPL
1367:ABEL
1347:Lola
1337:AHDL
1303:VHDL
1236:PSoC
1216:EPLD
1211:CPLD
1199:FPGA
1189:ASIC
1129:2011
1019:ISBN
992:ISBN
965:ISBN
938:ISBN
792:ISBN
771:link
751:ISBN
678:and
676:FPGA
668:VHDL
666:and
660:CUPL
658:and
656:ABEL
571:SRAM
543:core
524:EPLD
502:EPLD
487:PLCC
444:JTAG
436:PROM
392:.JAM
388:JTAG
382:and
346:CMOS
335:bugs
311:GALs
257:the
131:and
1683:Zet
1634:JOP
1581:ARC
1547:VTR
1501:iCE
1463:NXP
1433:Arm
1423:AMD
1357:UPF
1352:PSL
1325:DPI
1308:AMS
1296:AMS
1231:GAL
1226:PAL
1221:PLA
1194:SoC
914:EDN
894:EDN
578:or
518:An
446:).
293:AMD
265:PAL
243:IBM
227:PLA
164:IBM
94:PLD
2155::
1115:.
1076:^
1060:^
1044:.
918:20
916:.
898:20
896:.
820:^
767:}}
763:{{
737:^
690:A
682:.
654:,
511:,
500:,
469:.
438:,
143:.
135:;
127:,
88:A
1725:e
1718:t
1711:v
1291:A
1167:e
1160:t
1153:v
1131:.
1054:.
1027:.
1000:.
973:.
946:.
800:.
773:)
759:.
522:(
489:-
92:(
70:)
66:(
56:.
20:)
Text is available under the Creative Commons Attribution-ShareAlike License. Additional terms may apply.
