39:
160:. It performs 64-bit shifts in two cycles, stalling the pipeline as a result. This design was chosen to save die area. The multiplier and divider are not pipelined and have significant latencies: multiplies have a 10- or 20-cycle latency for 32-bit or 64-bit integers, respectively; whereas divides have a 69- or 133-cycle latency for 32-bit or 64-bit integers, respectively. Most instructions have a single cycle latency. The ALU adder is also used for calculating virtual addresses for loads, stores and branches.
325:
317:
179:(FPU), referred to as the R4010. The FPU is a coprocessor designated CP1 (the MIPS ISA defined four coprocessors, designated CP0 to CP3). The FPU can operate in two modes, 32- or 64-bit which are selected by setting a bit, the FR bit, in the CPU status register. In 32-bit mode, the 32 floating-point registers become 32 bits wide when used to hold single-precision floating-point numbers. When used to hold double-precision numbers, there are 16 floating-point registers (the registers are paired).
31:
337:
51:
348:
is a further development of the R4000. It was announced in early
November 1992. Samples of the microprocessor had been shipped to selected customers before then, with general availability in January 1993. The R4400 operates at clock frequencies of 100, 133, 150, 200, and 250 MHz. The only major
139:
is read. The MIPS III defines two register files, one for the integer unit and the other for floating-point. Each register file is 64 bits wide and contained 32 entries. The integer register file has two read ports and one write port, while the floating-point register file has two read ports and two
379:
NEC marketed their version as the VR4400. The first version, a 150 MHz part, was announced in
November 1992. Early versions were fabricated in a 0.6 μm process. In mid-1995, a 250 MHz part began sampling. It was fabricated in a 0.35 μm four-layer-metal process. NEC also produced
234:
The R4000 (SC and MC configurations only) supports an external secondary cache with a capacity of 128 KB to 4 MB. The cache is accessed via a dedicated 128-bit data bus. The secondary cache can be configured either as a unified cache or as a split instruction and data cache. In the latter
182:
The FPU can operate in parallel with the ALU unless there is a data or resource dependency, which causes it to stall. It contains three sub-units: an adder, a multiplier and a divider. The multiplier and divider can execute an instruction in parallel with the adder, but they use the adder in their
251:
The R4000 uses a 64-bit system bus called the SysAD bus. The SysAD bus was an address and data multiplexed bus, that is, it used the same set of wires to transfer data and addresses. While this reduces bandwidth, it is also less expensive than providing a separate address bus, which requires more
104:
There are three configurations of the R4000: the R4000PC, an entry-level model with no support for a secondary cache; the R4000SC, a model with secondary cache but no multiprocessor capability; and the R4000MC, a model with secondary cache and support for the cache coherency protocols required by
519:
The R4000 and R4400 microprocessors were interfaced to the system by custom ASICs or by commercially available chipsets. System vendors such as SGI developed their own ASICs for their systems. Commercial chipsets were developed, fabricated and marketed by companies such as
Toshiba with their the
384:(MCM) that contained a VR4400SC with ten 1 Mbit SRAM chips that implemented a 1 MB secondary cache. The MCM was pin-compatible with the R4x00PC. The first version, a 150 MHz part, was announced in 1994. In 1995, a 200 MHz part was announced.
183:
final stages of execution, thus imposing limits to overlapping execution. Thus, under certain conditions, it can execute up to three instructions at any time, one in each unit. The FPU is capable of retiring one instruction per cycle.
252:
pins and increases the complexity of the system. The SysAD bus can be configured to operate at half, a third or a quarter of the internal clock frequency. The SysAD bus generates its clock signal by dividing the operating frequency.
387:
Toshiba marketed their version as the TC86R4400. A 200 MHz part containing 2.3 million transistors and measuring 134 mm fabricated in a 0.3 μm process was introduced in mid-1994. The R4400PC was priced at
124:(TLB) begins the translation of the address to a physical address. In the second stage (IS), translation is completed and the instruction is fetched from an internal 8 KB instruction cache. The instruction cache is
140:
write ports. Execution begins at stage four (EX) for both integer and floating-point instructions; and is written back to the register files when completed in stage eight (WB). Results may be bypassed if possible.
190:
to achieve the high clock frequency. Division has a 23- or 36-cycle latency for single- or double-precision operations and square-root has a 54- or 112-cycle latency. Division and square-root uses the
276:
The R4000 generates the various clock signals from a master clock signal generated externally. For the operating frequency, the R4000 multiplies the master clock signal by two by use of an on-die
186:
The adder and multiplier are pipelined. The multiplier has a four-stage multiplier pipeline. It is clocked at twice the clock frequency of the microprocessor for adequate performance and uses
372:. IDT, NEC, Siemens and Toshiba fabricated and marketed the microprocessor. LSI Logic used the R4400 in custom products. Performance Semiconductor sold their logic division to
712:
349:
improvement from the R4000 is larger primary caches, which were doubled in capacity to 16 KB each from 8 KB each. It contained 2.3 million transistors.
80:(ISA). Officially announced on 1 October 1991, it was one of the first 64-bit microprocessors and the first MIPS III implementation. In the early 1990s, when
671:
120:
microprocessor with an eight-stage integer pipeline. During the first stage (IF), a virtual address for an instruction is generated and the instruction
296:(SPGA). The pin out of the R4000MC is different from the R4000SC, with some pins which are unused on the R4000SC used for signals to implement
1780:
740:
464:
187:
705:
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and has a programmable line size of 128, 256, 512 or 1,024 bytes. The cache controller is on-die. The cache is built from standard
1765:
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152:(ALU), a shifter, multiplier and divider and load aligner for executing integer instructions. The ALU consists of a 64-bit
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company, the R4000 was fabricated by partners in their own processes, which had a 0.8 μm minimum feature size.
38:
507:
1785:
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microprocessors. This characteristic enables a properly designed system to use any of the three microprocessors.
1090:
293:
163:
Load and store instructions are executed by the integer pipeline, and access the on-chip 8 KB data cache.
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425:
203:
1414:
1201:
827:
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92:(ACE), an industry standard that intended to define a common RISC platform. ACE ultimately failed for a
324:
1426:
1372:
1319:
1254:
950:
947:
1342:
214:. The R4000 uses a 64-bit virtual address, but only implements 40 of the 64 bits, allowing 1 TB of
176:
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configuration, each cache can have a capacity of 128 KB to 2 MB. The secondary cache is
472:
458:
191:
153:
1739:
1732:
1568:
1058:
843:
730:
381:
277:
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The R4000 contains 1.2 million transistors. It was designed for a 1.0 μm two-layer metal
70:
1228:
1111:
1035:
503:
477:
429:
219:
114:
218:; the remaining bits are checked to ensure that they contain zero. The R4000 uses a 36-bit
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449:
297:
223:
211:
132:. It has a 16- or 32-byte line size. Architecturally, it could be expanded to 32 KB.
1435:
289:
215:
157:
117:
66:
30:
1759:
1449:
1432:
497:
172:
136:
835:
639:"NEC Goes After The Business Market With Its Latest Line Of RISC UNIX Workstations"
300:
on the R4000MC. The pin-out of the R4000PC is similar to that of the PGA-packaged
1420:
857:
850:
84:
microprocessors were expected to replace CISC microprocessors such as the Intel
682:
680:
Sunil
Mirapuri, Michael Woodacre, Nader Vasseghi, "The Mips R4000 Processor,"
485:
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413:
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357:
336:
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236:
129:
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50:
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55:
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967:
690:
369:
265:
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1711:
1706:
1701:
1696:
1691:
1686:
1681:
1676:
1382:
1329:
1185:
1161:
1069:
96:, but the R4000 found success in the workstation and server markets.
17:
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1666:
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1641:
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1629:
1599:
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877:
335:
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292:(CPGA). The R4000SC and R4000MC are packaged in a 447-pin ceramic
49:
37:
29:
648:"Pyramid Technology Aims To Crash The Mainframe With Nile Series"
630:"MIPS R-Based Windows NT Personal Computers From Deskstation..."
552:
Heinrich, "MIPS R4000 Microprocessor User's Manual", p. 248
521:
468:
261:
135:
During the third stage (RF), the instruction is decoded and the
85:
81:
694:
445:
361:
594:"NEC Ready With 250MHz Version Of The 64-Bit MIPS R4400 RISC"
320:
An example of a R4400MC microprocessor fabricated by
Toshiba
452:
workstations, RISCserver servers, and Cenju-3 supercomputer
156:
and a logic unit and is pipelined. The shifter is a 32-bit
376:
where the MIPS microprocessor products were discontinued.
621:"Concurrent Multiprocessors Feature New Bus Architecture"
88:, the R4000 was selected to be the microprocessor of the
541:
MIPS R4000 Microprocessor User's Manual, Second
Edition
455:
NeTPower in their
Windows NT workstations and servers
256:
Transistor count, die dimensions and process details
1722:
1657:
1608:
1590:
1567:
1558:
1525:
1502:
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1021:
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940:
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818:
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758:
749:
686:, vol. 12. no. 2, pp. 10–22, March/April 1992
585:"NEC VR4400 Clock-Doubling RISC Has 2m Transistors"
262:
complementary metal–oxide–semiconductor
657:"Toshiba Samples 80486-Bus Chip Set For R-Series".
243:(SRAM). The data and tag buses are ECC-protected.
422:in their real-time multiprocessor Maxion systems
706:
461:used the R4400MC in their Nile Series servers
288:The R4000PC is packaged in a 179-pin ceramic
8:
428:in their Windows NT personal computers and
1564:
1499:
1454:
1404:
1025:
937:
815:
755:
713:
699:
691:
222:, thus is able to address 64 GB of
673:MIPS R4000 Microprocessor User's Manual
533:
520:Tiger Shark chipset, which provided a
237:physically indexed, physically tagged
7:
741:List of MIPS architecture processors
574:Mirapuri, "The Mips R4000 Processor"
562:Mirapuri, "The Mips R4000 Processor"
130:virtually indexed, physically tagged
465:Siemens Nixdorf Informationssysteme
416:personal computers and workstations
25:
781:LS3A4000/LS3A4000-I(LS3A4000-i)
778:LS3A3000/LS3A3000-I(LS3A3000-i)
772:LS3A1000/LS3A1000-I(LS3A1000-i)
612:"...And From Carrera Computers"
603:"Toshiba Has 200MHz MIPS R4400"
573:
561:
442:5000/260 workstation and server
420:Concurrent Computer Corporation
264:(CMOS) process. As MIPS was a
90:Advanced Computing Environment
34:A Toshiba R4000 microprocessor
1:
436:Digital Equipment Corporation
364:, Performance Semiconductor,
736:MIPS architecture processors
354:Integrated Device Technology
208:translation lookaside buffer
122:translation lookaside buffer
78:instruction set architecture
1781:Superscalar microprocessors
496:workstations; and in their
412:Carrera Computers in their
241:static random access memory
1807:
1622:
352:The R4400 was licensed by
726:
467:(SNI) in their RM-series
400:in quantities of 10,000.
869:Velocity Micro T301 Cruz
866:Velocity Micro T103 Cruz
294:staggered pin grid array
171:The R4000 has an on-die
167:Floating-point execution
105:multiprocessor systems.
1766:Advanced RISC Computing
1791:64-bit microprocessors
1467:Loongson-based systems
1417:MIPS R3000A-compatible
1339:Alchemy Semiconductor
510:fault-tolerant servers
426:DeskStation Technology
408:The R4400 is used by:
380:the MR4401, a ceramic
341:
333:
321:
206:(MMU) uses a 48-entry
204:memory management unit
58:
47:
35:
1095:88E6318 "Link Street"
396:, and the R4400MC at
374:Cypress Semiconductor
340:NEC VR4400MC die shot
339:
327:
319:
150:arithmetic logic unit
71:MIPS Computer Systems
53:
41:
33:
1776:MIPS microprocessors
1771:MIPS implementations
1427:PlayStation Portable
948:Microchip Technology
721:MIPS microprocessors
332:R4400 microprocessor
73:that implements the
46:R4000 microprocessor
878:Ainol Novo7 Paladin
775:LS3A2000/LS3A1500-I
471:servers and SR2000
177:floating-point unit
27:MIPS microprocessor
459:Pyramid Technology
342:
334:
322:
154:carry-select adder
59:
48:
36:
1753:
1752:
1749:
1748:
1554:
1553:
1535:Loongson 1 Series
1516:LS1E0300/LS1E1000
1512:Loongson 1 Series
1491:
1490:
1444:
1443:
1396:
1395:
1061:/Infineon/Lantiq
1059:Texas Instruments
1017:
1016:
986:Loongson 1 Series
966:ATI/AMD/Broadcom
934:(embedded device)
925:
924:
916:LS2K1000/LS2K2000
909:Loongson 2 Series
844:Skytone Alpha-400
805:
804:
768:Loongson 3 Series
731:MIPS architecture
676:, Second Edition.
524:-compatible bus.
392:, the R4400SC at
382:multi-chip module
278:phase-locked loop
212:virtual addresses
198:Memory management
148:The R4000 has an
144:Integer execution
94:number of reasons
16:(Redirected from
1798:
1786:64-bit computers
1565:
1500:
1455:
1405:
1229:Qualcomm Atheros
1112:Qualcomm Atheros
1036:Qualcomm Atheros
1026:
938:
931:Microcontrollers
816:
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508:NonStop Himalaya
504:Tandem Computers
478:Silicon Graphics
430:DeskStation Tyne
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220:physical address
21:
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1542:LS1F04/LS1F0300
1527:
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1504:
1487:
1459:
1440:
1392:
1365:
1359:
1350:RMI Corporation
1312:
1306:
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1264:
1217:
1212:Fusiv Vx185/183
1206:Fusiv Vx175/173
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670:Heinrich, Joe.
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446:NEC Corporation
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298:cache coherency
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230:Secondary cache
224:physical memory
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113:The R4000 is a
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1436:Emotion Engine
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216:virtual memory
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158:barrel shifter
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118:superpipelined
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67:microprocessor
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1471:LS2F/LS2F1000
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1450:Supercomputer
1447:
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1433:PlayStation 2
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1415:PlayStation 1
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210:to translate
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188:dynamic logic
184:
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173:IEEE 754-1985
166:
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137:register file
133:
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126:direct-mapped
123:
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83:
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69:developed by
68:
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52:
45:
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32:
19:
1740:H2 "Capitan"
1738:
1731:
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836:Ben NanoNote
681:
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576:, p. 21
569:
564:, p. 10
557:
548:
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407:
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351:
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287:
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259:
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233:
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185:
181:
170:
162:
147:
134:
112:
103:
62:
60:
1429:R4000-based
1421:Nintendo 64
1209:Fusiv Vx180
858:Game Gadget
851:Dingoo A320
810:Application
450:RISCstation
432:workstation
194:algorithm.
175:-compliant
109:Description
54:MIPS R4000
1760:Categories
1733:H1 "Beast"
1561:processors
1528:compatible
1505:compatible
1460:compatible
1423:NEC VR4300
1366:compatible
1313:compatible
1105:24Kc/24KEc
1022:Networking
979:compatible
902:compatible
821:compatible
812:processors
761:compatible
752:processors
683:IEEE Micro
665:References
440:DECstation
414:Windows NT
366:Siemens AG
247:System bus
1496:Aerospace
506:in their
498:Challenge
480:in their
473:mainframe
448:in their
438:in their
358:LSI Logic
330:LSI Logic
284:Packaging
1610:MIPS III
1483:SiCortex
1477:LS3B1000
1474:LS3A1000
1373:Broadcom
1320:Broadcom
1301:RTL8198C
1276:MediaTek
1255:Broadcom
1242:MediaTek
1131:MediaTek
1049:MediaTek
1029:4Kc/4KEc
990:LS1A0300
960:4Kc/4KEc
885:GCW-Zero
882:NEOGEO-X
856:JZ4750 (
849:JZ4740 (
842:JZ4730 (
796:LS3B4000
793:LS3B3000
790:LS3B2000
787:LS3B1500
784:LS3B1000
515:Chipsets
272:Clocking
75:MIPS III
56:die shot
1707:R16000A
1697:R14000A
1687:R12000A
1659:MIPS IV
1592:MIPS II
1559:Classic
1408:various
1377:various
1343:Alchemy
1334:various
1324:various
1297:Realtek
1259:BCM4706
1236:QCA9558
1091:Marvell
999:LS1C101
996:LS1C300
968:Xilleon
951:PIC32MX
874:JZ4770
863:JZ4760
832:JZ4720
750:General
490:Indigo2
398:$ 2,150
394:$ 1,950
390:$ 1,600
370:Toshiba
356:(IDT),
280:(PLL).
266:fabless
1724:MIPS V
1712:R18000
1702:R16000
1692:R14000
1682:R12000
1677:R10000
1635:R4300i
1569:MIPS I
1539:LS1E04
1526:MIPS32
1503:MIPS64
1458:MIPS64
1401:Gaming
1387:Octeon
1383:Cavium
1364:MIPS64
1330:Cavium
1311:MIPS32
1290:1074Kc
1280:MT7621
1269:1004Kc
1249:RT3883
1246:RT3662
1233:AR9344
1202:Ikanos
1196:GRX388
1193:VRX288
1186:Lantiq
1166:DANUBE
1162:Lantiq
1156:MT7688
1153:MT7628
1150:MT7620
1147:RT6856
1144:RT5350
1141:RT3350
1138:RT3052
1135:RT3050
1125:AR9331
1122:AR9132
1119:AR7161
1116:AR7240
1074:AMAZON
1070:Lantiq
1053:RT2880
1043:AR2318
1040:AR2313
977:MIPS32
900:MIPS64
890:JZ4780
819:MIPS32
759:MIPS64
500:server
492:, and
486:Indigo
115:scalar
100:Models
1672:R8000
1667:R5000
1647:R4700
1642:R4600
1630:R4200
1623:R4400
1618:R4000
1600:R6000
1582:R3000
1577:R2000
1190:AR188
1169:VINAX
528:Notes
404:Usage
346:R4400
312:R4400
306:R4600
302:R4200
65:is a
63:R4000
18:R4400
1545:LS1J
1222:74Kc
1179:34Kc
1008:LS1H
1005:LS1G
1002:LS1D
993:LS1B
913:LS2H
522:i486
494:Indy
482:Onyx
469:UNIX
368:and
344:The
304:and
202:The
128:and
86:i486
82:RISC
61:The
1354:XLR
1084:5Kc
1064:AR7
941:M4K
362:NEC
192:SRT
44:IDT
1762::
488:,
484:,
360:,
328:A
226:.
42:A
860:)
853:)
846:)
714:e
707:t
700:v
20:)
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