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have greater stability and are fast when the state has only advanced slightly from the previous time step. When the kernel de-queues a time-advancing event from the event queue, the simulation time is advanced. The analogue part of the simulator maintains a time quantum beyond which the nodal equations need to be re-computed. This quantum is dynamically adjusted depending on the behaviour of the equations. If the equations are `bendy', meaning that linear extrapolation using Euler's method over the quantum will lead to too much error, the time step is reduced, otherwise it can be gradually enlarged at each step. Overall, two forms of iteration are needed: the first is iteration at a time step to solve the nodal equations to a sufficient accuracy. The second is between time steps. In a simple implementation, once simulation time has advanced beyond the Euler quantum, the analogue sub-system is re-solved. If the extrapolation errors are too great, the simulator must go back to the last time step and simulate forward again using a smaller analogue quantum. This mechanism is also the basis for SPICE simulations. Each analogue variable that is the argument to a `cross', or other analogue sensitivity, is then examined to see if new digital domain work has been triggered. If so, new events are injected on the discrete event queue for the current simulation time.
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that has just a few state variables, such as the car transmission system because there are orders of magnitude difference in time constants (e.g. 100 MHz clock versus 1~ms shortest inertial time constant). Simulating the analogue subsystem inside the RTL simulator then makes sense. Moreover, most plant control situations use closed-loop negative feedback with the controller being just as good at managing a slightly errored plant model as the real model.
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model defines a method called `processing()' that is invoked at the appropriate rate as simulation time advances. A so-called cluster of models share a static schedule of when they should communicate. This sets the relative ordering of the calls to the processing() methods of each TDF instance in the cluster. The periodic behaviour of TDF allows it to operate independently of the main SystemC event-driven kernel used for digital logic.
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a standard operator library is that `reflection' is possible: other code can analyse the structure and perform analytic differentiation, summation, integration and other forms of analysis, such as sensitivity analysis to determine a good time step. This would not be possible for an implementation using ad-hoc coding. In general programming, reflection refers to a program being able to read its own source code.
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Under the ELN formalism, the SystemC initialisation and simulation cycles are extended to support solving nodal flow equations. Nodal equation solving is generally solved iteratively rather than using direct methods such as
Gaussian Elimination or based on matrix inverses. Iterative methods tend to
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The error in Euler's method decreases quadratically with smaller time steps, but an overly-small time step results in a slow simulation for a complex finite-element simulation. But this is not a problem in many situations where part of a complex SoC or plant controller is run alongside a plant model
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The SystemC linear signal flow (LSF) library provides a set of primitive analogue operators, such as adders and differentiators that enable all basic structures found in differential equations to be constructed in a self-documenting and executable form. The advantage of constructing the system from
59:
In the timed data flow (TDF) model, components exchange analogue values with each other on a periodic basis at a chosen sampling rate, such as every 10 microseconds. By the sampling theorem, this would be sufficient to convey signals of up to 50 MHz bandwidth without aliasing artefacts. A TDF
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Systems
Initiative, resulting in the AMS 1.0 standard in 2010. After the release of the Accellera SystemC AMS 2.0 standard in 2013, the standard was transferred to the IEEE Standards Association in 2014 for further industry adoption and maintenance. The SystemC AMS standard was released April 6,
72:
Current flowing in ELN networks of resistors can be solved with a suitable simultaneous equation solver. These are called the nodal equations. Where time-varying components, such as capacitors and inductors are included, Euler's method is typically implemented to model them. Euler's method is a
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SystemC AMS study group was founded in 2002 to develop and maintain analog and mixed-signal extensions to SystemC, and to initiate an OSCI (Open SystemC initiative) SystemC-AMS working group. The study group has made initial investigations and specified and implemented a SystemC extension to
73:
simple approach to solving finite-difference time-domain (FDTD) problems. For instance, to simulate the capacitor charge problem on the left below, a timestep delta\_t is selected that is typically about one percent of the time constant and the iteration on the bottom right is executed.
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The SystemC electrical linear networks (ELN) library provides a set of standard electrical components that enable SPICE-like simulations to be run. The three basic components, resistors, capacitors and inductors are, of course, available. Further voltage-controlled variants, such as a
51:(MoC) is a set of rules defining the behavior and interaction between SystemC AMS primitive modules. SystemC AMS defines the following models of computation: timed data flow (TDF), linear signal flow (LSF) and electrical linear networks (ELN).
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demonstrate feasibility of the approach. In 2006, a SystemC AMS working group has been funded which continued the work of the study group inside OSCI, and now goes on to work on SystemC AMS within the
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transconductance amplifier (voltage-controlled current generator) enable most FET and other semiconductor models to be readily created.
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for analog, mixed-signal and RF functionality. The SystemC AMS 2.0 standard was released on April 6, 2016 as IEEE Std 1666.1-2016.
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provides with COSIDE the first commercially available design environment based on SystemC AMS standard.
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282:// introduced for convenience: sca_core::sca_time() → sca_time()
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1280:"SystemC-AMS and Design of Embedded Mixed-Signal Systems"
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119:<PortType> // DE → TDF inport sca_tdf::
1311:Keywords: Phase Locked Loop, PLL, SystemC-AMS
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1320:Keywords: Filter, ADC, SystemC-AMS
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814:// time domain implementation
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1316:SystemC AMS examples
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892:// sca eln terminals
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747:// AC implementation
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378:// cut-off frequency
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1284:www.systemc-ams.org
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1301:External links
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1232:"SystemC AMS"
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1263:. Retrieved
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1239:. Retrieved
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1226:
1191:
1183:
934:sca_node_ref
916:sca_terminal
901:sca_terminal
871:
808:
741:
547:
429:tdf_low_pass
315:// TDF ports
306:tdf_low_pass
243:
235:Example code
146:sca_node_ref
145:
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131:sca_terminal
130:
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17:SystemC AMS
1329:Categories
1289:2016-08-01
1265:2016-08-01
1241:2016-08-01
1218:References
531:sca_ltf_nd
504:sca_vector
483:sca_vector
462:sca_vector
411:processing
387:initialize
381:// methods
1195:Accellera
877:SC_MODULE
598:∗
595:π
592:∗
288:namespace
273:namespace
258:namespace
190:sca_trace
140:sca_eln::
129:sca_eln::
115:sca_tdf::
101:sca_tdf::
423:SCA_CTOR
276:sca_core
261:sca_util
249:#include
142:sca_node
1188:History
976:SC_CTOR
961:sca_eln
946:sca_eln
928:sca_eln
910:sca_eln
895:sca_eln
525:sca_tdf
456:private
348:sca_out
342:sca_tdf
318:sca_tdf
160:Tracing
152:Cluster
107:sca_out
21:SystemC
832:ltf_nd
792:sca_ac
759:sca_ac
534:ltf_nd
510:double
489:double
468:double
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211:SIGNAL
121:sc_out
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1090:value
1024:value
967:sca_c
952:sca_r
850:state
516:state
444:1.0e3
285:using
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255:using
136:Nodes
117:sc_in
94:Ports
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1072:bind
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826:outp
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375:;
363:;
339:;
312:{
309:)
303:(
294:;
279:;
264:;
223:,
214:|
208:|
199:,
193:(
181:(
175:=
169:*
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