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Template:Intel processor roadmap

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rows, as derived from the graphic illustration worked up by the Commons Graphics Lab in a vertical format. The vertical format is used because the existing horizontal format is starting to require scrolling to display. This template version includes the complete P6 evolution (from its origin as the
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However, updates to the existing template will require a bit more care, since tables are built row-by-row instead of column-by-column. <td rowspan=N> tags are used to expand cells beyond a single row, although that will require the editor to keep track of which cells and how many.
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development. Columns 9–13 are not anticipated to require any further updating unless Intel adds another parallel/stub branch of microarchitectures. Hence many of the row definitions end with a spacer such as <td
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processor name. Because the dual-core NetBurst processor physically consisted of two dies on the same package, the graphical illustration displays this as a horizontal evolution.
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is the process/node range label (increasingly differing from actual feature size), and formatted as "<th rowspan="2">]</th>", for instance.
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Pentium Pro microarchitecture) because of the added space afforded by the switch to vertical format.
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is a spacer column with arrows to show the derivation of hyperthreading NetBurst processors
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is a spacer column with arrows to show the derivation of Prescott
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is the desktop/laptop processor codename ("x86 TICK")
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It is reserved to insert the 31: 8: 959:is the Atom processor codename ("Atom TICK") 1135:Editors can experiment in this template's 38: 24: 16: 406:L3-cache introduced, 256KB L2-cache/core 57: 973:desktop/laptop family microarchitecture 105: 185: 83: 7: 1120:Template:Intel processor roadmap/doc 870:indicates cancelled processors 426:Introduced GPU on same package and 936:This is a table with 13 columns × 487:Fully integrated voltage regulator 14: 895: 524:introduced on mainstream desktop 354:4 cores on mainstream desktop, 817:Low power mobile only (9-30W) 604:10 cores on mainstream desktop 1: 996:development in parallel with 954:Atom family microarchitecture 594:8 cores on mainstream desktop 553:6 cores on mainstream desktop 444:On-die ring bus, no more non- 46:Intel CPU core roadmaps from 1182:Computer hardware templates 1001:colspan="5"></td>. 876:are microarchitectures 1198: 1109: 81: 70: 65: 1166:Subpages of this template 860: 831: 816: 806: 791: 786: 772: 745: 730: 715: 708: 703: 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226: 222: 219: 214: 211: 209: 205: 202: 199: 197: 194: 192: 189: 188: 183: 180: 178: 175: 174: 171: 168: 166: 162: 159: 156: 155: 152:(166–200 MHz) 150: 147: 145: 141: 136: 133: 131: 128: 127: 122: 119: 117: 116: 110: 107: 104: 100: 98: 95: 92: 90: 87: 86: 79: 75: 63: 59: 54: 49: 41: 36: 34: 29: 27: 22: 21: 18: 1104:}} 1098:{{ 1093:}} 1087:{{ 1082:}} 1076:{{ 1071:}} 1065:{{ 1060:}} 1054:{{ 1049:}} 1045: 1043:{{ 1038:}} 1032:{{ 1018: 1008: 997: 993: 989: 985: 975:("x86 TOCK") 972: 953: 947: 943: 937: 935: 924:Table format 880:Italic names 879: 873: 867: 856:Panther Lake 854: 849: 841: 836: 825: 807: 787: 782:architecture 764:Redwood Cove 763: 750: 716: 699: 661: 644: 629: 615:Cypress Cove 609: 579:Whiskey Lake 568: 529: 511: 477: 453: 448:motherboards 440:Sandy Bridge 435:Sandy Bridge 434: 387: 363: 344: 320: 301: 285: 237:NetBurst(HT) 224: 113: 23: 1116:transcluded 915:] [ 911:] [ 907:] [ 850:Cougar Cove 773:Mobile-only 769:Meteor Lake 741:Raptor Lake 737:Raptor Cove 722:Golden Cove 717:Golden Cove 682:Willow Cove 656:Mobile-only 651:Cannon Lake 649:Palm Cove ( 619:Rocket Lake 589:Coffee Lake 583:Mobile-only 563:Mobile-only 549:Coffee Lake 271:Prescott‑2M 149:Pentium Pro 135:Pentium Pro 121:Pentium Pro 1110:The above 874:Bold names 827:Arrow Lake 813:Lunar Lake 726:Alder Lake 713:(10nm ESF) 686:Tiger Lake 667:Sunny Cove 662:Sunny Cove 610:Sunny Cove 600:Comet Lake 559:Amber Lake 469:Ivy Bridge 459:Silvermont 454:Silvermont 358:introduced 330:Cedar Mill 279:Smithfield 201:Willamette 196:Coppermine 97:Microarch. 89:Microarch. 62:Atom (ULV) 1164:subpage. 808:Lion Cove 755:Crestmont 751:Crestmont 705:Gracemont 700:Gracemont 540:Kaby Lake 503:Broadwell 243:NetBurst( 225:Pentium M 218:Northwood 170:Deschutes 138:(150 MHz) 124:(133 MHz) 68:Node name 1176:Category 1026:See also 1019:NetBurst 1009:NetBurst 994:NetBurst 990:NetBurst 986:NetBurst 842:Darkmont 837:Darkmont 822:? (TSMC) 671:Ice Lake 535:Goldmont 530:Goldmont 422:Westmere 412:Saltwell 263:Prescott 213:Tualatin 182:NetBurst 1144:| 1137:sandbox 1130:history 1128:| 971:is the 952:is the 913:history 793:Skymont 788:Skymont 780:chiplet 759:Intel 4 710:Intel 7 645:Skylake 635:Tremont 630:Tremont 591:Refresh 517:Skylake 512:Skylake 493:Airmont 483:Haswell 478:Haswell 393:Nehalem 388:Nehalem 369:Bonnell 364:Bonnell 338:Presler 158:Klamath 74:Pentium 1158:pages. 1154:create 428:AES-NI 379:Penryn 258:Dothan 230:Banias 208:130 nm 191:180 nm 177:Katmai 165:250 nm 144:350 nm 130:500 nm 109:600 nm 1118:from 919:] 917:purge 903:[ 640:10 nm 498:14 nm 464:22 nm 417:32 nm 404:, PCH 374:45 nm 350:Merom 316:Yonah 311:65 nm 287:Tejas 253:90 nm 1162:/doc 1146:diff 1142:edit 1126:edit 909:edit 905:view 802:TSMC 522:DDR4 446:UEFI 356:DDR3 345:Core 101:Step 93:Step 78:Core 1114:is 846:18A 798:N3B 776:NPU 1178:: 1122:. 998:P6 778:, 402:MC 398:HT 245:×2 115:P6 48:P6 1168:. 1156:) 1152:( 1148:) 1140:( 1132:) 1124:( 938:n 804:) 800:( 743:) 739:( 728:) 724:( 692:X 688:) 684:( 673:) 669:( 653:) 621:) 617:( 334:⇨ 298:→ 295:⇩ 292:→ 275:⇨ 267:⇨ 247:) 76:/ 39:e 32:t 25:v

Index

v
t
e
P6
Atom (ULV)
Pentium
Core
Microarch.
Microarch.
600 nm
P6
Pentium Pro
500 nm
Pentium Pro
350 nm
Pentium Pro
Klamath
250 nm
Deschutes
Katmai
NetBurst
180 nm
Coppermine
Willamette
130 nm
Tualatin
Northwood
Banias
NetBurst(HT)
×2

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