Knowledge (XXG)

Three-state logic

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When all the devices on the bus have "released" the communication lines, the only influence on the circuit is the pull-up resistors, which pull the lines high. When a device wants to communicate, it comes out of the Hi-Z state and drives the line low. Devices communicating using this protocol either let the line float high, or drive it low – thus preventing any bus contention situation where one device drives a line high and another low.
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transmit data on the bus at a time, each device is equipped with a tri-state buffer. When a device wants to transmit data, it activates its tri-state buffer, which connects its output to the bus and allows it to transmit data. When the transmission is complete, the device deactivates its tri-state buffer, which disconnects its output from the bus and allows another device to access the bus.
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The difference lies in the time needed to output the signal. When chip select is deasserted, the chip does not operate internally, and there will be a significant delay between providing an address and receiving the data. (An advantage of course, is that the chip consumes minimal power in this case.)
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The basic concept of the third state, high impedance (Hi-Z), is to effectively remove the device's influence from the rest of the circuit. If more than one device is electrically connected to another device, putting an output into the Hi-Z state is often used to prevent short circuits, or one device
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When chip select is asserted, the chip internally performs the access, and only the final output drivers are disabled by deasserting output enable. This can be done while the bus is in use for other purposes, and when output enable is finally asserted, the data will appear with minimal delay. A ROM
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Tri-state buffers are commonly used in bus-based systems, where multiple devices are connected to the same bus and need to share it. For example, in a computer system, multiple devices such as the CPU, memory, and peripherals may be connected to the same data bus. To ensure that only one device can
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bus protocol (a bi-directional communication bus protocol often used between devices) specifies the use of pull-up resistors on the two communication lines. When devices are inactive, they "release" the communication lines and tri-state their outputs, thus removing their influence on the circuit.
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state. In the high-impedance state, the output of the buffer is disconnected from the output bus, allowing other devices to drive the bus without interference from the tri-state buffer. This can be useful in situations where multiple devices are connected to the same bus and need to take turns
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Tri-state buffers can be implemented using gates, flip-flops, or other digital logic circuits. They are useful for reducing crosstalk and noise on a bus, and for allowing multiple devices to share the same bus without interference.
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When outputs are tri-stated (in the Hi-Z state) their influence on the rest of the circuit is removed, and the circuit node will be "floating" if no other circuit element determines its state. Circuit designers will often use
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or static RAM chip with an output enable line will typically list two access times: one from chip select asserted and address valid, and a second, shorter time beginning when output enable is asserted.
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provides pull-up resistors, but they would require several clock cycles to pull a signal high given the bus's large distributed
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buffer is a type of digital buffer that has three stable states: a high output state, a low output state, and a
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Usage of three-state logic is not recommended for on-chip connections but rather for inter-chip connections.
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Three-state logic can reduce the number of wires needed to drive a set of LEDs (tri-state multiplexing or
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Many memory devices designed to connect to a bus (such as RAM and ROM chips) have both
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often have some pins that can only act as an input, other pins that can only act as a
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Intel refers to this convention as "sustained tri-state", and also uses it in the
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accessing it. Systems implementing three-state logic on their bus are known as a
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Three-state buffers, when used to enable multiple devices to communicate on a
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input/output is a popular alternative to three-state logic. For example, the
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driving high (logical 1) against another device driving low (logical 0).
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pins that can be programmed to act as any of those kinds of pins.
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Three-state buffers are essential to the operation of a shared
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is on, the switch is closed. If B is off, the switch is open.
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Three-state buffers can also be used to implement efficient
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A tristate buffer can be thought of as a switch. If
209:is not asserted, the outputs are high impedance. 171:, especially those with large numbers of inputs. 391:. Cambridge University Press. pp. 495–497. 8: 299:is typically used between chips on a single 280:, and a few pins that can only act as an 385:Hill, Winfield; Horowitz, Paul (1989). 377: 7: 317:, can be functionally replaced by a 450:Principle of Tristate Multiplexing 25: 256:Alternatives to a three-state bus 284:input/output. A typical modern 414:On-Chip Buses/Networks for SoC 228:pull-up or pull-down resistors 221:Use of pull-ups and pull-downs 1: 189:Output enable vs. chip select 27:Buffer in digital electronics 290:general-purpose input/output 486: 37:In digital electronics, a 29: 128: 109: 71: 366:Single pole, centre off 388:The Art of Electronics 155: 446:on All About Circuits 301:printed circuit board 288:has many three-state 149: 444:Special-output Gates 373:Notes and references 465:Digital electronics 121:Z (high impedance) 113:Z (high impedance) 428:"Tri State Buffer" 346:Three-valued logic 156: 470:Ternary computers 356:Nine-valued logic 351:Four-valued logic 144: 143: 16:(Redirected from 477: 432: 431: 424: 418: 409: 403: 402: 382: 331:Buffer amplifier 278:push–pull output 274:microcontrollers 208: 204: 196: 69: 21: 485: 484: 480: 479: 478: 476: 475: 474: 455: 454: 440: 435: 426: 425: 421: 410: 406: 399: 384: 383: 379: 375: 327: 297:three-state bus 286:microcontroller 258: 243:leakage current 223: 206: 202: 194: 191: 161: 101: 94: 87: 79: 74: 52:three-state bus 35: 28: 23: 22: 18:Tri-state logic 15: 12: 11: 5: 483: 481: 473: 472: 467: 457: 456: 453: 452: 447: 439: 438:External links 436: 434: 433: 419: 404: 397: 376: 374: 371: 370: 369: 363: 358: 353: 348: 343: 338: 333: 326: 323: 282:open collector 262:open collector 257: 254: 222: 219: 190: 187: 183:Charlieplexing 176:electronic bus 160: 157: 142: 141: 138: 134: 133: 130: 127: 123: 122: 119: 115: 114: 111: 108: 104: 103: 99: 96: 92: 89: 85: 81: 80: 77: 75: 72: 47:high-impedance 26: 24: 14: 13: 10: 9: 6: 4: 3: 2: 482: 471: 468: 466: 463: 462: 460: 451: 448: 445: 442: 441: 437: 429: 423: 420: 416: 415: 408: 405: 400: 398:0-521-37095-7 394: 390: 389: 381: 378: 372: 367: 364: 362: 359: 357: 354: 352: 349: 347: 344: 342: 341:Metastability 339: 337: 334: 332: 329: 328: 324: 322: 320: 316: 311: 308: 306: 302: 298: 293: 291: 287: 283: 279: 275: 270: 267: 263: 255: 253: 251: 250:Low Pin Count 246: 244: 240: 236: 235:PCI local bus 231: 229: 220: 218: 214: 210: 200: 188: 186: 184: 179: 177: 172: 170: 165: 158: 153: 148: 139: 136: 135: 131: 125: 124: 120: 117: 116: 112: 106: 105: 102: 97: 95: 90: 88: 83: 82: 76: 70: 67: 63: 59: 57: 56:tri-state bus 53: 48: 44: 40: 33: 19: 422: 413: 407: 387: 380: 312: 309: 294: 271: 259: 247: 232: 224: 215: 211: 192: 180: 173: 169:multiplexers 166: 162: 151: 98: 91: 84: 64: 60: 55: 51: 42: 38: 36: 336:Logic level 319:multiplexer 239:capacitance 199:chip select 43:three-state 459:Categories 361:Don't care 305:backplane 39:tri-state 325:See also 315:data bus 395:  368:(SPCO) 272:Early 201:) and 78:OUTPUT 32:3-mode 411:경종민, 252:bus. 73:INPUT 393:ISBN 260:The 233:The 159:Uses 266:I²C 185:). 54:or 41:or 461:: 307:. 295:A 245:. 207:CS 203:OE 195:CS 178:. 140:1 132:0 58:. 430:. 401:. 197:( 152:B 137:1 129:1 126:0 118:1 110:0 107:0 100:C 93:B 86:A 34:. 20:)

Index

Tri-state logic
3-mode
high-impedance

multiplexers
electronic bus
Charlieplexing
chip select
pull-up or pull-down resistors
PCI local bus
capacitance
leakage current
Low Pin Count
open collector
I²C
microcontrollers
push–pull output
open collector
microcontroller
general-purpose input/output
three-state bus
printed circuit board
backplane
data bus
multiplexer
Buffer amplifier
Logic level
Metastability
Three-valued logic
Four-valued logic

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