31:
76:(CSP) technology, since the resulting package is practically of the same size as the die. Wafer-level packaging allows integration of wafer fab, packaging, test, and burn-in at wafer level in order to streamline the manufacturing process undergone by a device from silicon start to customer shipment. As of 2009, there is no single industry-standard method of wafer-level packaging.
69:. In WLP, the top and bottom layers of the packaging and the solder bumps are attached to the integrated circuits while they are still in the wafer. This process differs from a conventional process, in which the wafer is sliced into individual circuits (dice) before the packaging components are attached.
129:
There are two kinds of wafer level packaging: fan-in and fan-out. Fan-in WLCSP packages have an interposer that is the same size as that of the die, where as fan-out WLCSP packages have an interposer that is larger than the die, similar to conventional BGA packages, the difference being that the
130:
interposer is built directly atop the die, instead of the die being attached to it and reflowed using the flip chip method. This is also true in fan-in WLSCP packages. In both cases, the die with its interposer may be covered in encapsulating material such as
102:
Wafer-level chip scale packaging (WL-CSP) is the smallest package currently available on the market and is produced by OSAT (Outsourced
Semiconductor Assembly and Test) companies, such as
198:
220:
403:
798:
158:
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pitch) to rearrange the pins or contacts on the die so that they can be big enough and have sufficient spacing so that they can be handled just like a
372:
149:
within the chip. Thus, careful consideration concerning exposure to extremely bright light will need to be given with wafer-level packaging.
710:
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30:
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95:
has seven. Functions provided WLPs in smartphones include sensors, power management, and wireless. The iPhone 7 was rumored to use
637:
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134:. Fan.out packages are used in cases where fan-in packages are not able to provide enough connections at a specified cost.
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It is relatively common to find packages that contain other components than their designated ones, such as diodes or
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642:
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126:(BGA) package. The RDL is often made out of a polyamide or polybenzoxazole with copper plated on its surface.
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Apple Wants a
Slimmer iPhone 7 and Will Reportedly Use Fan-Out Packaging Technology
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138:
839:
173:
66:
332:
234:
Report details new tech Apple is using to make the iPhone 7 thinner and lighter
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80:
365:
Wafer-Level Chip-Scale
Packaging: Analog and Power Semiconductor Applications
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142:
103:
92:
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17:
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287:"Improving Redistribution Layers for Fan-out Packages and SiPs"
195:"Wafer-level packaging of ICs for mobile systems of the future"
301:"Stats ChipPAC - Wafer Level CSP (WLCSP) - a FIWLP Technology"
145:(or any other bright flashes of longwave light), inducing the
137:
In
February 2015, it was discovered that a WL-CSP chip in the
119:
347:
Raspberry Pi 2 power crashes when exposed to xenon flash
99:
technology in order to achieve a thinner and lighter model.
197:. Semiconductor Manufacturing & Design Community.
34:
A wafer-level package attached to a printed-circuit board
83:
due to the size constraints. For example, the Apple
781:
729:
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661:
605:
589:
463:
419:
79:A major application area of WLPs is their use in
349:.” February 9, 2015. Retrieved February 5, 2016.
397:
249:.” November 23, 2015. Retrieved May 23, 2016.
245:By Mark LaPedus, Semiconductor Engineering. “
8:
236:.” March 31, 2016. Retrieved April 14, 2016.
106:. A WL-CSP or WLCSP package is just a bare
799:List of integrated circuit packaging types
404:
390:
382:
223:.” April 1, 2016. Retrieved April 8, 2016.
159:List of integrated circuit packaging types
319:"WLCSP Overview, Market and Applications"
260:"Wafer Level Chip Scale Package (WLCSP)"
104:Advanced Semiconductor Engineering (ASE)
87:has at least eleven different WLPs, the
27:Means of packaging an integrated circuit
456:(SOD-123 / SOD-323 / SOD-523 / SOD-923)
185:
65:– on which the IC is fabricated – is
7:
201:from the original on August 16, 2018
25:
47:integrated circuit manufacturing
438:(DO-7 / DO-26 / DO-35 / DO-41)
219:By Aaron Mamiit, Tech Times. “
193:Korczynski, Ed (May 5, 2014).
53:components are attached to an
1:
363:Shichun Qu; Yong Liu (2014).
247:Fan-Out Packaging Gains Steam
97:fan-out wafer-level packaging
828:in transistor packages, etc.
794:Integrated circuit packaging
872:
72:WLP is essentially a true
851:Electronics manufacturing
822:
345:By Leon Spencer, ZDNet. “
856:Semiconductor technology
809:Surface-mount technology
814:Through-hole technology
232:By Yoni Heisler, BGR. “
169:Wafer-scale integration
444:(MELF / SOD-80 / LL34)
413:Semiconductor packages
89:Samsung Galaxy S3
35:
804:Printed circuit board
91:has six WLPs and the
39:Wafer-level packaging
33:
789:Electronic packaging
333:"Fan-Out Wars Begin"
321:. November 11, 2018.
305:www.statschippac.com
289:. 15 September 2022.
147:photoelectric effect
112:redistribution layer
139:Raspberry Pi 2
45:) is a process in
826:voltage regulators
335:. 5 February 2018.
164:Chip-scale package
74:chip-scale package
55:integrated circuit
36:
833:
832:
582:(Super-247) (SMT)
576:(Super-220) (SMT)
450:(SMA / SMB / SMC)
374:978-1-4939-1556-9
16:(Redirected from
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357:Further reading
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782:Related topics
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648:TSSOP / HTSSOP
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93:HTC One X
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846:Chip carriers
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570:(D3PAK) (SMT)
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564:(D2PAK) (SMT)
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558:(I2PAK) (SMT)
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205:September 24,
200:
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174:Wafer bonding
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143:xenon flashes
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85:iPhone 5
82:
77:
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60:
56:
52:
48:
44:
40:
32:
19:
773:WL-CSP / WLP
772:
643:TSOP / HTSOP
552:(DPAK) (SMT)
546:(IPAK) (SMT)
540:(TH / Panel)
534:(TH / Panel)
528:(TH / Panel)
522:(TH / Panel)
510:(TH / Panel)
480:(TH / Panel)
367:. Springer.
364:
341:
327:
313:
304:
295:
281:
270:. Retrieved
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254:
241:
228:
215:
203:. Retrieved
188:
136:
128:
101:
78:
71:
58:
42:
38:
37:
691:QUIP / QUIL
267:www.nxp.com
81:smartphones
840:Categories
699:Grid array
638:SOP / SSOP
590:Single row
473:SOT / TSOT
272:2023-11-19
180:References
116:interposer
753:Flip Chip
672:QIP / QIL
633:SO / SOIC
623:Flat Pack
618:DIP / DIL
597:SIP / SIL
465:3...5-pin
51:packaging
662:Quad row
606:Dual row
199:Archived
153:See also
432:(DO-27)
420:Single
110:with a
580:TO-274
574:TO-273
568:TO-268
562:TO-263
556:TO-262
550:TO-252
544:TO-251
538:TO-247
532:TO-220
526:TO-202
520:TO-126
448:DO-214
442:DO-213
436:DO-204
430:DO-201
371:
114:(RDL,
59:before
49:where
18:WL-CSP
731:Wafer
514:TO-92
508:TO-66
502:TO-39
496:TO-18
422:diode
263:(PDF)
132:epoxy
67:diced
63:wafer
57:(IC)
768:UICC
711:eWLB
677:PLCC
628:MSOP
516:(TH)
504:(TH)
498:(TH)
492:(TH)
490:TO-8
486:(TH)
484:TO-5
478:TO-3
369:ISBN
207:2018
61:the
758:PoP
748:CSP
744:COG
741:COF
738:COB
721:PGA
716:LGA
706:BGA
687:QFP
682:QFN
668:LCC
653:ZIP
613:DFN
454:SOD
120:I/O
118:or
108:die
43:WLP
842::
763:QP
303:.
265:.
405:e
398:t
391:v
377:.
307:.
275:.
209:.
41:(
20:)
Text is available under the Creative Commons Attribution-ShareAlike License. Additional terms may apply.
