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WDC 65C02

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714: 1214:. This style of access makes accessing branch tables simpler as a single base address is used in conjunction with an 8-bit offset. The same could be achieved in the NMOS version using indexed indirect mode, but only if the table was in the zero page, a limited resource. Allowing these to be constructed outside zero page not only lessened the demand for this resource, but also allowed the tables to be constructed in ROM. 1071:
by performing a dummy read of the instruction opcode when indexing crosses a page boundary. However, this fix introduced a new bug that occurs when the base address is on an even page boundary (which means indexing will never cross into the next page). With the new bug, a dummy read is performed on the base address prior to indexing, such that
342:, a feature that allows Ø2 to be slowed down or fully stopped in either the high or low state with no loss of data. Typical microprocessors not implemented in CMOS have dynamic cores and will lose their internal register contents (and thus crash) if they are not continuously clocked at a rate between some minimum and maximum specified values. 1509:
Rockwell's changes added more bit manipulation instructions for directly setting and testing any bit, and combining the test, clear and branch into a single opcode. The new instructions were available from the start in Rockwell's R65C00 family, but was not part of the original 65C02 specification and
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RMB and SMB are used to clear (RMB) or set (SMB) individual bits in a bit field, each replacing a sequence of three instructions. As RMB and SMB are zero page addressing only, these instructions are limited in usefulness and are primarily of value in systems in which device registers are present in
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Both WDC and Rockwell contributed improvements to the bit testing and manipulation functions in the 65C02. WDC added new addressing modes to the BIT instruction that was present in the 6502, as well two new instructions for convenient manipulation of bit fields, a common activity in device drivers.
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When performing indexed addressing, if indexing crosses a page boundary all NMOS variants will read from an invalid address before accessing the correct address. As with a R-M-W instruction, this behavior can cause problems when accessing hardware registers via indexing. The 65C02 fixed this problem
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arithmetic, the NMOS 6502 will update the (N)egative, o(V)erflow and (Z)ero flags to reflect the result of underlying binary arithmetic, that is, the flags are reflecting a result computed prior to the processor performing decimal correction. In contrast, the 65C02 sets these flags according to the
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AC characteristics table lists operational characteristics at 5 V at 14 MHz, 3.3 V or 3 V at 8 MHz, 2.5 V at 4 MHz, and 1.8 V at 2 MHz. This information may be an artifact of an earlier data sheet, as a graph indicates that typical devices are capable of
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On the 6502, some of these leftover codes actually perform computation. Due to the way the 6502's instruction decoder works, simply setting certain bits in the opcode cause parts of the instruction processing to take place. Some of these opcodes immediately crash the processor, while other perform
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Although the 65C02 can mostly be thought of as a low-power 6502, it also fixes several bugs found in the original and adds new instructions, addressing modes and features that can assist the programmer in writing smaller and faster-executing programs. It is estimated that the average 6502 assembly
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The W65C02S support for arbitrary clock rates allows it to use a clock that runs at a rate ideal for some other part of the system, such as 13.5 MHz (digital SDTV luma sampling rate), 14.31818 MHz (NTSC colour carrier frequency × 4), 14.75 MHz (PAL square pixels), 14.7456 (baud rate
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The basic architecture of the 65C02 is identical to the original 6502, and can be considered a low-power implementation of that design. At 1 MHz, the most popular speed for the original 6502, the 65C02 requires only 20 mW, while the original uses 450 mW, a reduction of over twenty
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is a hardware register. This may occur if the hardware is watching for changes to the value in the register and then performs an action, in this case, it will perform two actions, one with the original value and then again with the new value. The 65C02 instead performs a double read of
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This had the added advantage of slightly improving performance. In the spinning case, the interrupt might arrive in the middle of one of the loop's instructions, and to allow it to restart after returning from the handler, the processor spends one cycle to save its location. With
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If an NMOS 6502 is fetching a BRK (software interrupt) opcode at the same time a hardware interrupt occurs, the BRK will be ignored as the processor reacts to the hardware interrupt. The 65C02 correctly handles this situation by servicing the interrupt and then executing BRK.
1710:, the processor enters the low-power state in a known location where all instructions are guaranteed to be complete, so when the interrupt arrives it cannot possibly interrupt an instruction and the processor can safely continue without spending a cycle saving state. 1668:, STop the Processor, halted all processing until a hardware reset was issued. This could be used to put a system to "sleep" and then rapidly wake it with a reset. Normally this would require some external system to maintain main memory, and it was not widely used. 1674:
t had a similar effect, entering low-power mode, but this instruction woke the processor up again on the reception of an interrupt. Previously, handling an interrupt generally involved running a loop to check if an interrupt has been received, sometimes known as
155:. It uses less power than the original 6502, fixes several problems, and adds new instructions. The power usage is on the order of 10 to 20 times less than the original 6502 running at the same speed; its reduced power consumption has made it useful in 1032:, as well as early in the reset code. The 65C02 automatically clears this flag after pushing the status register onto the stack in response any interrupt or in response to a hardware reset, thus placing the processor back into binary arithmetic mode. 190:. Rockwell's primary interest was in the embedded market and asked for several new commands to be added to aid in this role. These were later copied back into the baseline version, at which point WDC added two new commands of their own to create the 1205:
The 65C02 added the new "indexed absolute indirect" mode which eased the use of branch tables. This mode added the value of the X register to the absolute address and took the 16-bit address from the resulting location. For instance, to access the
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A downside of this model is that if indexing is not needed but the address is in the zero page, one of the index registers must still be set to zero and used in one of these instructions. The 65C02 added a non-indexed indirect addressing mode
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instruction had a unique (among 6502 instructions) addressing mode known as "absolute indirect" that read a 16-bit value from a given memory address and then jumped to the address in that 16-bit value. For instance, if memory location
1103:, adds the X register to the given page zero address before reading the 16-bit vector. In this example, if X is 5, it reads the 16-bit address from location $ 15/$ 16. This is useful when there is an array of pointers in page zero. 894:
of the possible 256 8-bit opcode patterns. The remaining 105 unused opcodes are undefined, with the set of codes with low-order 4-bits with 3, 7, B or F left entirely unused, the code with low-order 2 having only a single opcode.
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language program can be made 10 to 15 percent smaller on the 65C02 and see a similar improvement in performance, largely through avoided memory accesses through the use of fewer instructions to accomplish a given task.
1332:, push and pull the X and Y registers to/from the stack. Previously, only the accumulator and status register had push and pull instructions. X and Y could only be stacked by moving them to the accumulator first with 1904:
Wagner's June 1983 article mentions it being available for “several months”. Given typical publication delays at that point this may date it to as early as late 1982. Another source points to 1980, see talk
1458:, which location may be zero page or absolute. The Z flag in the status register is conditioned according to the result of the logical AND—no other status register flags are affected. Furthermore, bits in 1382:
in the 65C02 adds immediate mode, zero page indexed by X and absolute indexed by X addressing. Immediate mode addressing is particularly convenient in that it is completely non-destructive. For example:
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Some sources, including prior versions of this article, claim 1978. This was the date that Bill Mensch, the primary designer, formed WDC. In a 1984 article, Mensch specifically states 1981 as the start
1679:", checking the type when one is received, and then jumping to the processing code. This meant the processor was running during the entire process, even when no interrupts were occurring. 1645:, which has the advantage of allowing it to be replaced by a variable name or calculated number. As is the case with RMB and SMB, BBR and BBS replace a sequence of three instructions. 209:
Early versions used 40-pin DIP packaging, and were available in 1, 2 and 4 MHz versions, matching the speeds of the original nMOS versions. Later versions were produced in
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leaves the value in the accumulator unchanged, so subsequent code can make additional tests against the original value, avoiding having to re-load the value from memory.
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is affected by off-chip factors, such as the capacitive load on the microprocessor's pins. Minimizing load by using short signal tracks and fewest devices helps raise F
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especially hurt the performance of mantissa normalization in floating-point math routines. The vast majority of machines using the processor support this instruction.
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Development of the WDC 65C02 began in 1981 with samples released in early 1983. The 65C02 was officially released sometime shortly after. WDC licensed the design to
260:(X and Y), an 8-bit status register (P), and a 16-bit program counter (PC). In addition to the single accumulator, the first 256 bytes of RAM, the "zero page" ( 1510:
not found in versions made by WDC or its other licensees. These were later copied back into the baseline design, and were available in later WDC versions.
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operation at higher speeds than suggested by the AC characteristics table, and that reliable operation at 20 MHz should be readily attainable with V
1024:. This means programmers have to set the flag to a known value in order to avoid any bugs related to arithmetic operations. As a result, one finds a 304: 1505:
instruction with additional steps to save the computational changes, but in a way that reports the status of the affected value before it is changed.
1198:. If the driver is updated and the subroutine code moves in memory, any existing code will still work as long as the table of pointers remains at 296: 1362:
version 1 cycle longer (4 cycles). As the address is relative, it is also useful when writing relocatable code, a common task in the era before
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was encountered, processing stopped and the processor went into low-power mode. When the interrupt was received, it immediately processed the
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with no parameters now increment or decrement the accumulator. This was an odd oversight in the original instruction set, which only included
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Variable length instruction set, enabling code size optimization over fixed length instruction set processors, results in power savings
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The 65C02 adds new opcodes that use some of these previously undocumented instruction slots. For example, $ FF is used for the new
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lies in the next 256 bytes, page one ($ 0100 to $ 01FF), and cannot be moved or extended. The stack grows backwards with the
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but uses a 1-byte relative address like other branches, saving a byte. The speed is often the same as the 3 cycle absolute
2709: 2632: 1869: 861:. The PLCC and QFP packages have less pin-to-pin capacitance than the PDIP package, and are more economical in the use of 816: 339: 300: 1016:
More of an oversight than a bug, the state of the (D)ecimal flag in the NMOS 6502's status register is undefined after a
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The original 6502 has 56 instructions, which, when combined with different addressing modes, produce a total of 151
269: 1956: 268:), allow faster access through addressing modes that use an 8-bit memory address instead of a 16-bit address. The 1856: 1841: 2400: 1110:
adds the Y register to the 16-bit vector read from the given page zero address. For instance, if Y is 5, and
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systems that run faster than the official rating). The "S" designation indicates that the part has a fully
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times. The manually optimized core and low power use is intended to make the 65C02 well suited for low power
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to all instructions that used indexed indirect and indirect indexed modes, freeing up the index registers.
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The 6502 has two indirect addressing modes which dereference through 16-bit addresses stored in page zero:
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and doesn't require changing the value of the accumulator. As this task is common in most programs, using
187: 179: 931:(rotate left). This was a deliberate design choice by MOS Technology, as it was deemed that implementing 2570: 2495: 2468: 1961: 1830: 1417:
operation changes the value in the accumulator, so the original value loaded from $ 1234 is lost. Using
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was too costly in chip area for the benefits it provided. However, clients complained about the missing
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WDC has reported that FPGA realizations of the W65C02S have been successfully operated at 200 MHz.
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packages, as well as PDIP, and with much higher clock speed ratings. The current version from WDC, the
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In addition to the new addressing modes, the "base model" 65C02 also added a set of new instructions.
303:(FPGA). As is common in the semiconductor industry, WDC offers a development system, which includes a 1036: 593: 2028: 2652: 2608: 2553: 2547: 2542: 2537: 2532: 2526: 2425: 2418: 2320: 2216: 1804: 1756: 308: 203: 152: 121: 2344: 974:, which would then cause the processor to continue execution at the address stored in the vector. 334:
when operated at 5 volts, indicated by the –14 part number suffix (hobbyists have developed 65C02
1816: 1083:. Again, if indexing on hardware register addresses, this bug can result in undefined behavior. 657: 335: 234: 221:
has a fully static core and officially runs at speeds up to 14 MHz when powered at 5 volts.
1570:, which has the advantage of allowing it to be replaced by a variable name or calculated number. 946:
A bug that is present in all NMOS variants of the 6502 involves the jump instruction when using
1985: 713: 2440: 2275: 1058:
and then writing the modified value. This behavior can result in difficult-to-resolve bugs if
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result of decimal arithmetic, at the cost of an extra clock cycle per arithmetic instruction.
1029: 1017: 781: 751: 183: 156: 2449: 2488: 736: 285: 2387: 1501:
is changed. TRB and TSB thus replace a sequence of instructions, essentially combining the
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instruction is fetched from memory, the jump vector, rather than being an operand to the
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useful functions and were even given unofficial assembler mnemonics by some programmers.
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instruction, WDC added two instructions designed to conveniently manipulate bit fields:
2616: 2517: 2269: 1852: 673: 257: 137: 2703: 1167: 668: 580: 276:(S) starting at $ 01FF and decrementing as the stack grows. It has a variable-length 164: 1607:
The same zero-page addressing and limitations as RMB and SMB apply, but branches to
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is the third entry, zero indexed, and each address requires 16-bits, so to call
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component of the instruction is often written as part of the mnemonic, such as
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component of the instruction is often written as part of the mnemonic, such as
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packages. The maximum officially supported Ø2 (primary) clock speed is 14 
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hardware description model is available for designing the W65C02S core into an
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if bit 1 of the byte at zero-page address $ 12 is set. Some assemblers treat
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as well as any code needed to save the value of the accumulator, typically a
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and it was implemented in parts manufactured since June 1976. The absence of
1845: 1800: 1772: 1762: 1746: 1736: 1021: 806: 706: 603: 575: 1490:. In both cases, the Z flag in the status register indicates the result of 2126: 2057: 1810: 1776: 175: 2138:
N, V, and Z flags were incorrect after decimal operation (but C was ok).
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In contrast, in the 65C02, interrupt code could be written by having a
795: 292: 717:
Die photograph of a Sitronix ST2064B microcontroller showing embedded
2439:; 1st Ed; David Eyes and Ron Lichty; Prentice Hall; 636 pages; 1986; 891: 696: 242: 17: 1759:(2 MHz 65SC12 plus optional 4 MHz 65C102 second processor) 2368: 31:, a name used on two other variants of the original 6502 processor. 2480: 2434: 2100: 1781: 1558:
which sets bit 1 in zero-page address $ 12. Some assemblers treat
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s. 6502 programs using those opcodes will not work on the 65C02.
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When executing a read-modify-write (R-M-W) instruction, such as
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will fetch the most significant byte of the target address from
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instruction. Those which remain truly unused are equivalent to
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The W65C02S may be operated at any convenient supply voltage (V
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would get the least significant byte of the target address at
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The original 6502 had several errata when initially launched.
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is clear (BBR) or set (BBS). As with RMB and SMB above, the
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function from the table above, one would store 4 in X, then
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at 5 volts, assuming the supporting hardware will allow it.
1859:, Novag Super Constellation, Fidelity Elite (4–20 MHz) 1722:
02 is a variant of the WDC 65C02 without bit instructions.
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In addition to the new commands above, WDC also added the
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is the production version as of 2023, and is available in
1005:
and the most significant byte of the target address from
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applications, including medical-grade implanted devices.
2187: 2185: 2183: 2181: 2168: 2166: 2164: 1462:
are set (TSB) or cleared (TRB) according to the mask in
1340:, thereby changing the accumulator contents, then using 1939: 1937: 1935: 1933: 1931: 1929: 1927: 970:(most significant byte) and load those values into the 280:, varying between one and three bytes per instruction. 1784:
Modern Replica of the MOS/CBM KIM-1 by Briel Computing
927:(rotate right) instruction, even though they did have 1166:
that can be accessed using an index. For instance, a
950:. In this addressing mode, the target address of the 2676: 2641: 2625: 2603: 2569: 2516: 1707: 1699: 1695: 1691: 1687: 1683: 1671: 1665: 1502: 1483: 1475: 1471: 1467: 1425: 1418: 1414: 1379: 1304: 1300: 1207: 1191: 1187: 1179: 1175: 1171: 1158:One common use for indirect addressing is to build 1135: 117: 112: 98: 93: 77: 59: 54: 1965:. Vol. 3, no. 10. June 1983. p. 199 849:is sufficient to support the frequency. Designer 780:) instructions reduce power consumption, decrease 252:. The register set is small, with a single 8-bit 2419:List of books about 65xx microprocessor families 1482:, whereas TRB stores the results of the logical 1151:would read those two bytes, construct the value 977:The bug appears when the vector address ends in 2058:"The 6502/65C02/65C816 Instruction Set Decoded" 1028:instruction (CLear Decimal) in almost all 6502 784:and enable synchronization with external events 2127:"Differences between NMOS 6502 and CMOS 65c02" 2121: 2119: 1358:unless a page is crossed which would make the 1303:can reduce code size, both by eliminating the 1050:, all NMOS variants will do a double write on 163:systems. The 65C02 has also been used in some 2496: 2345:"LASER 128 / 128EX / 128EX2 Video Technology" 2001: 1819:handhelds (KS5360 (65SC02 core) @ 4 MHz) 1662:instructions for supporting low-power modes. 1054:, first rewriting the current value found at 8: 1634:as part of the instruction's operand, e.g., 1562:as part of the instruction's operand, e.g., 1445:, Test and Set Bits and Test and Reset Bits. 923:Early 1975 versions of the processor had no 2077:"Extra Instructions Of The 65XX Series CPU" 819:allows stopping the clock to conserve power 801:Current consumption (core) of 0.15 and 1.5 202:produced a further modified version as the 2503: 2489: 2481: 2148: 2146: 1611:if the selected bit of the zero page byte 1263:. Some assemblers use the alternate forms 1122:. This performs pointer-offset addressing. 962:would fetch the value in memory locations 646:(providing an address space of 64 KB) 40: 2475:6502/65C02/65C816 Instruction Set Decoded 2399:Taylor, Simon; Watford, Bob (July 1984). 1877:, a further enhanced version of the 65C02 311:(ICE) and a software development system. 229:The 65C02 is a low cost, general-purpose 2429:; Western Design Center; 32 pages; 2018. 1923: 1887: 1424:In addition to the enhancements of the 1079:prior to the value of X being added to 297:application-specific integrated circuit 198:later licensed the design as well, and 2250:. GTE Microcircuits. 1984. p. 1-3 2232: 2203: 2191: 2172: 1943: 344: 36: 34:CMOS microprocessor in the 6502 family 2015:"6502 CPU Projects in HDL (for FPGA)" 1837:home computer (65C02 @ 4.09 MHz) 1765:by Briel Computers, a replica of the 1474:and stores the result of the logical 832:) between 1.8 and 5 volts (±5%). The 7: 1626:which branches to the address label 1513:Rockwell-specific instructions are: 1454:) is logically ANDed with memory at 2550:(and 6510T, 6512, 6513, 6514, 6515) 1194:one would use something similar to 49:microprocessor in a PDIP-40 package 2477:– From Neil Parker's Apple II page 2437:- including the 6502, 65C02, 65802 1848:home computer (65C02 @ 3 MHz) 1749:by Apple Computer (1.023 MHz) 1536:. Set or Reset (clear) bit number 1155:, and then jump to that location. 1013:. The 65C02 corrected this issue. 25: 2101:"ROR" in Microsoft BASIC for 6502 1813:handhelds (6 MHz) by Timetop 1350:, branch always. Operates like a 993:of the original page rather than 886:Undocumented instructions removed 809:at 1.89 V and 5.25 V respectively 2112:File:MCS650x Instruction Set.jpg 1170:might list the entry points for 1984:Koehn, Philipp (2 March 2018). 1797:handheld (65SC02 @ ~4 MHz) 2075:Vardy, Adam (22 August 1995). 1769:hobbyist computer (1 MHz) 1755:home/educational computer, by 1067:, followed by a single write. 754:instruction is being processed 1: 2633:Interrupts in 65xx processors 2469:65xx/65Cxx/65SCxx Differences 1870:Interrupts in 65xx processors 1371:Bit manipulation instructions 1218:New and modified instructions 1162:, a list of entry points for 981:, which is the boundary of a 966:(least significant byte) and 872:Comparison with the NMOS 6502 798:specified at 1.71 V to 5.25 V 301:field-programmable gate array 2529:(and 6501, 6503, 6504, 6505) 2386:Wagner, Robert (June 1983). 1118:, This reads the value from 845:crystal), etc., as long as V 746:) output indicates to other 2321:"BBC Master Acorn Computer" 2247:GTE Microcircuits Date Book 2062:Neil Parker's Apple II page 1450:A mask in the accumulator ( 65:; 41 years ago 2731: 2416: 2369:"HuC6280 - Archaic Pixels" 2090:The 6502 Rotate Right Myth 2029:"W65C02DB Developer Board" 1686:followed immediately by a 1602:. Branch on Bit Set/Reset. 958:instruction. For example, 562: 547: 538: 462: 441: 26: 2002:Taylor & Watford 1984 1726:Notable uses of the 65C02 1702:and handled the request. 1694:to the handler. When the 1466:. TSB performs a logical 1398:may be used in place of: 571: 523: 488: 485: 474: 471: 451: 448: 225:Introduction and features 108:1 MHz to 14 MHz 39: 1075:will do a dummy read on 735:) output indicates when 27:Not to be confused with 2465:- Western Design Center 2405:Personal Computer World 1364:memory management units 1292:. Replaces the need to 1099:Indexed indirect, e.g. 997:of the new page. Hence 721:core in the upper right 144:version of the popular 2556:(and 7501, 8500, 8501) 2274:. Sybex. p. 348. 1497:before the content of 853:has pointed out that F 722: 631:General logic features 233:microprocessor (8-bit 188:Rockwell Semiconductor 2715:8-bit microprocessors 2571:Western Design Center 2349:www.old-computers.com 2325:www.old-computers.com 2268:Zaks, Rodnay (1983). 863:printed circuit board 716: 695:, implemented by 212 651:arithmetic logic unit 159:roles and industrial 131:Western Design Center 85:Western Design Center 2710:65xx microprocessors 2271:Programming the 6502 1743:(NCR 1.023 MHz) 1182:, etc in a table at 1114:contains the vector 1091:New addressing modes 2407:. pp. 174–175. 2394:. pp. 199–204. 2217:"W65C02S Datasheet" 2206:, pp. 200–201. 1803:aka TurboGrafx-16 ( 1789:Video game consoles 1757:Acorn Computers Ltd 948:indirect addressing 789:Electrical features 739:are being addressed 658:processor registers 347: 309:in-circuit emulator 153:MOS Technology 6502 122:MOS Technology 6502 78:Common manufacturer 55:General information 1962:Softalk Publishing 1833:cartridge for the 1817:Watara Supervision 1747:Enhanced Apple IIe 1540:in zero page byte 1470:after the logical 1030:interrupt handlers 877:Basic architecture 723: 345: 2697: 2696: 2452: 2296:"8-The Apple IIc" 1775:series clones of 1106:Indirect indexed 824:Clocking features 782:interrupt latency 752:read-modify-write 737:interrupt vectors 628: 627: 624: 623: 184:GTE Microcircuits 157:portable computer 127: 126: 16:(Redirected from 2722: 2505: 2498: 2491: 2482: 2448: 2433:Programming the 2408: 2395: 2388:"Assembly Lines" 2373: 2372: 2365: 2359: 2358: 2356: 2355: 2341: 2335: 2334: 2332: 2331: 2317: 2311: 2310: 2308: 2307: 2300:Apple II History 2292: 2286: 2285: 2265: 2259: 2258: 2256: 2255: 2242: 2236: 2230: 2224: 2223: 2221: 2213: 2207: 2201: 2195: 2189: 2176: 2170: 2159: 2158: 2150: 2141: 2140: 2135: 2133: 2123: 2114: 2109: 2103: 2098: 2092: 2087: 2081: 2080: 2072: 2066: 2065: 2053: 2047: 2046: 2039: 2033: 2032: 2025: 2019: 2018: 2011: 2005: 1999: 1993: 1992: 1990: 1981: 1975: 1974: 1972: 1970: 1953: 1947: 1941: 1906: 1902: 1896: 1892: 1842:second processor 1807:@ 7.16 MHz) 1709: 1701: 1697: 1693: 1689: 1685: 1673: 1667: 1661: 1657: 1644: 1625: 1601: 1587: 1569: 1557: 1535: 1525: 1504: 1496: 1485: 1477: 1473: 1469: 1465: 1453: 1444: 1437: 1427: 1420: 1416: 1409: 1404: 1394: 1389: 1381: 1361: 1357: 1353: 1349: 1343: 1339: 1335: 1331: 1327: 1323: 1319: 1313: 1310: 1306: 1302: 1298: 1288:, STore Zero in 1287: 1278: 1274: 1270: 1266: 1262: 1255: 1248: 1244: 1240: 1236: 1232: 1228: 1213: 1209: 1201: 1197: 1193: 1189: 1185: 1181: 1177: 1173: 1154: 1150: 1146: 1142: 1137: 1130: 1121: 1117: 1113: 1109: 1102: 1082: 1078: 1074: 1049: 1027: 1012: 1008: 1004: 1000: 996: 992: 988: 985:. In this case, 980: 969: 965: 961: 957: 953: 942: 938: 934: 930: 926: 911: 905: 817:static circuitry 779: 767: 745: 734: 703:addressing modes 352: 351: 348: 346:65C02 registers 267: 263: 167:, as well as in 73: 71: 66: 44: 37: 21: 2730: 2729: 2725: 2724: 2723: 2721: 2720: 2719: 2700: 2699: 2698: 2693: 2672: 2637: 2621: 2599: 2565: 2512: 2511:65xx-based CPUs 2509: 2459: 2426:65C02 Datasheet 2421: 2415: 2413:Further reading 2398: 2385: 2382: 2377: 2376: 2367: 2366: 2362: 2353: 2351: 2343: 2342: 2338: 2329: 2327: 2319: 2318: 2314: 2305: 2303: 2294: 2293: 2289: 2282: 2267: 2266: 2262: 2253: 2251: 2244: 2243: 2239: 2231: 2227: 2219: 2215: 2214: 2210: 2202: 2198: 2190: 2179: 2171: 2162: 2155:"65C02 Opcodes" 2152: 2151: 2144: 2131: 2129: 2125: 2124: 2117: 2110: 2106: 2099: 2095: 2088: 2084: 2074: 2073: 2069: 2055: 2054: 2050: 2041: 2040: 2036: 2027: 2026: 2022: 2013: 2012: 2008: 2000: 1996: 1988: 1983: 1982: 1978: 1968: 1966: 1955: 1954: 1950: 1942: 1925: 1920: 1915: 1910: 1909: 1903: 1899: 1893: 1889: 1884: 1866: 1853:chess computers 1851:many dedicated 1846:Acorn BBC Micro 1840:Tube-connected 1826: 1791: 1733: 1728: 1716: 1659: 1655: 1652: 1650:Low-power modes 1635: 1620: 1589: 1575: 1563: 1555: 1550:zero page. The 1527: 1517: 1491: 1463: 1451: 1439: 1432: 1407: 1402: 1392: 1387: 1373: 1359: 1355: 1351: 1347: 1341: 1337: 1333: 1329: 1325: 1321: 1317: 1311: 1308: 1293: 1282: 1276: 1272: 1268: 1264: 1257: 1250: 1246: 1242: 1238: 1234: 1230: 1226: 1220: 1211: 1199: 1195: 1183: 1152: 1148: 1144: 1143:holds $ 34 and 1140: 1128: 1119: 1115: 1111: 1107: 1100: 1093: 1080: 1076: 1072: 1044: 1025: 1010: 1006: 1002: 998: 994: 990: 986: 978: 972:program counter 967: 963: 959: 955: 951: 940: 936: 932: 928: 924: 918: 907: 903: 888: 879: 874: 860: 856: 848: 840: 831: 826: 791: 777: 765: 743: 732: 728: 697:operation codes 687:program counter 679:status register 674:index registers 633: 565:Status register 541:Program counter 495:Index Register 481:Index Register 465:Index registers 432: 427: 422: 417: 412: 407: 402: 397: 392: 387: 382: 377: 372: 367: 362: 357: 305:developer board 288:(SoC) designs. 278:instruction set 265: 261: 258:index registers 256:(A), two 8-bit 246:program counter 227: 161:microcontroller 140:is an enhanced 89: 69: 67: 64: 50: 35: 32: 23: 22: 15: 12: 11: 5: 2728: 2726: 2718: 2717: 2712: 2702: 2701: 2695: 2694: 2692: 2691: 2686: 2680: 2678: 2674: 2673: 2671: 2670: 2665: 2660: 2655: 2653:Hudson HuC6280 2649: 2647: 2639: 2638: 2636: 2635: 2629: 2627: 2623: 2622: 2620: 2619: 2613: 2611: 2601: 2600: 2598: 2597: 2591: 2586: 2581: 2575: 2573: 2567: 2566: 2564: 2563: 2557: 2551: 2545: 2540: 2535: 2530: 2523: 2521: 2518:MOS Technology 2514: 2513: 2510: 2508: 2507: 2500: 2493: 2485: 2479: 2478: 2472: 2466: 2458: 2457:External links 2455: 2454: 2453: 2445:978-0893037895 2430: 2414: 2411: 2410: 2409: 2401:"6502 revival" 2396: 2381: 2378: 2375: 2374: 2360: 2336: 2312: 2287: 2280: 2260: 2237: 2235:, p. 199. 2225: 2208: 2196: 2194:, p. 203. 2177: 2175:, p. 200. 2160: 2153:Clark, Bruce. 2142: 2115: 2104: 2093: 2082: 2067: 2056:Parker, Neil. 2048: 2034: 2020: 2006: 2004:, p. 174. 1994: 1976: 1948: 1946:, p. 204. 1922: 1921: 1919: 1916: 1914: 1911: 1908: 1907: 1897: 1886: 1885: 1883: 1880: 1879: 1878: 1872: 1865: 1862: 1861: 1860: 1849: 1838: 1825: 1824:Other products 1822: 1821: 1820: 1814: 1808: 1798: 1790: 1787: 1786: 1785: 1779: 1770: 1760: 1750: 1744: 1741:Apple Computer 1732: 1731:Home computers 1729: 1727: 1724: 1715: 1712: 1651: 1648: 1647: 1646: 1604: 1603: 1572: 1571: 1546: 1545: 1507: 1506: 1447: 1446: 1411: 1410: 1408:AND #%00010000 1405: 1396: 1395: 1393:BIT #%00010000 1390: 1372: 1369: 1368: 1367: 1345: 1315: 1280: 1219: 1216: 1212:JMP ($ A000,X) 1124: 1123: 1104: 1092: 1089: 917: 914: 887: 884: 878: 875: 873: 870: 858: 854: 846: 838: 829: 825: 822: 821: 820: 813: 810: 799: 790: 787: 786: 785: 755: 740: 727: 726:Logic features 724: 711: 710: 699: 689: 683: 682: 681: 676: 671: 666: 654: 647: 640: 632: 629: 626: 625: 622: 621: 611: 606: 601: 596: 591: 586: 583: 578: 573: 569: 568: 560: 559: 549: 545: 544: 536: 535: 525: 522: 519: 516: 513: 510: 507: 504: 501: 497: 496: 490: 487: 483: 482: 476: 473: 469: 468: 460: 459: 453: 450: 446: 445: 443:Main registers 439: 438: 436:(bit position) 433: 430: 428: 425: 423: 420: 418: 415: 413: 410: 408: 405: 403: 400: 398: 395: 393: 390: 388: 385: 383: 380: 378: 375: 373: 370: 368: 365: 363: 360: 358: 355: 286:system-on-chip 226: 223: 165:home computers 138:microprocessor 125: 124: 119: 115: 114: 110: 109: 106: 96: 95: 91: 90: 88: 87: 81: 79: 75: 74: 61: 57: 56: 52: 51: 45: 33: 24: 14: 13: 10: 9: 6: 4: 3: 2: 2727: 2716: 2713: 2711: 2708: 2707: 2705: 2690: 2687: 2685: 2682: 2681: 2679: 2675: 2669: 2666: 2664: 2661: 2659: 2658:Nintendo SA-1 2656: 2654: 2651: 2650: 2648: 2645: 2640: 2634: 2631: 2630: 2628: 2624: 2618: 2615: 2614: 2612: 2610: 2606: 2602: 2595: 2592: 2590: 2587: 2585: 2582: 2580: 2577: 2576: 2574: 2572: 2568: 2561: 2558: 2555: 2552: 2549: 2546: 2544: 2541: 2539: 2536: 2534: 2531: 2528: 2525: 2524: 2522: 2519: 2515: 2506: 2501: 2499: 2494: 2492: 2487: 2486: 2483: 2476: 2473: 2470: 2467: 2464: 2463:65C02 webpage 2461: 2460: 2456: 2451: 2446: 2442: 2438: 2436: 2431: 2428: 2427: 2423: 2422: 2420: 2412: 2406: 2402: 2397: 2393: 2389: 2384: 2383: 2379: 2370: 2364: 2361: 2350: 2346: 2340: 2337: 2326: 2322: 2316: 2313: 2301: 2297: 2291: 2288: 2283: 2277: 2273: 2272: 2264: 2261: 2249: 2248: 2241: 2238: 2234: 2229: 2226: 2218: 2212: 2209: 2205: 2200: 2197: 2193: 2188: 2186: 2184: 2182: 2178: 2174: 2169: 2167: 2165: 2161: 2156: 2149: 2147: 2143: 2139: 2128: 2122: 2120: 2116: 2113: 2108: 2105: 2102: 2097: 2094: 2091: 2086: 2083: 2078: 2071: 2068: 2063: 2059: 2052: 2049: 2044: 2038: 2035: 2030: 2024: 2021: 2016: 2010: 2007: 2003: 1998: 1995: 1987: 1980: 1977: 1964: 1963: 1958: 1952: 1949: 1945: 1940: 1938: 1936: 1934: 1932: 1930: 1928: 1924: 1917: 1912: 1901: 1898: 1891: 1888: 1881: 1876: 1873: 1871: 1868: 1867: 1863: 1858: 1854: 1850: 1847: 1843: 1839: 1836: 1832: 1828: 1827: 1823: 1818: 1815: 1812: 1809: 1806: 1802: 1801:NEC PC Engine 1799: 1796: 1793: 1792: 1788: 1783: 1780: 1778: 1774: 1771: 1768: 1764: 1761: 1758: 1754: 1751: 1748: 1745: 1742: 1738: 1735: 1734: 1730: 1725: 1723: 1721: 1713: 1711: 1703: 1680: 1678: 1669: 1663: 1649: 1643: 1639: 1633: 1629: 1624: 1618: 1614: 1610: 1606: 1605: 1600: 1596: 1593: 1586: 1582: 1579: 1574: 1573: 1567: 1561: 1553: 1548: 1547: 1543: 1539: 1534: 1531: 1524: 1521: 1516: 1515: 1514: 1511: 1500: 1495: 1489: 1481: 1461: 1457: 1449: 1448: 1443: 1436: 1431: 1430: 1429: 1422: 1406: 1401: 1400: 1399: 1391: 1386: 1385: 1384: 1377: 1370: 1365: 1346: 1316: 1297: 1291: 1286: 1281: 1261: 1254: 1225: 1224: 1223: 1217: 1215: 1203: 1169: 1168:device driver 1165: 1161: 1160:branch tables 1156: 1132: 1105: 1098: 1097: 1096: 1090: 1088: 1084: 1068: 1066: 1061: 1057: 1053: 1048: 1041: 1038: 1033: 1031: 1023: 1019: 1014: 984: 975: 973: 949: 944: 921: 915: 913: 910: 900: 896: 893: 885: 883: 876: 871: 869: 866: 864: 852: 842: 835: 823: 818: 814: 811: 808: 804: 800: 797: 793: 792: 788: 783: 775: 771: 763: 759: 756: 753: 749: 742:Memory lock ( 741: 738: 731:Vector pull ( 730: 729: 725: 720: 715: 708: 704: 700: 698: 694: 690: 688: 684: 680: 677: 675: 672: 670: 669:stack pointer 667: 665: 662: 661: 659: 655: 652: 648: 645: 641: 639: 635: 634: 630: 619: 615: 612: 610: 607: 605: 602: 600: 597: 595: 592: 590: 587: 584: 582: 579: 577: 574: 570: 567: 566: 561: 557: 553: 550: 546: 543: 542: 537: 533: 529: 526: 520: 517: 514: 511: 508: 505: 502: 499: 498: 494: 491: 484: 480: 477: 470: 467: 466: 461: 457: 454: 447: 444: 440: 437: 434: 429: 424: 419: 414: 409: 404: 399: 394: 389: 384: 379: 374: 369: 364: 359: 354: 353: 350: 349: 343: 341: 337: 333: 329: 325: 321: 317: 312: 310: 306: 302: 298: 294: 289: 287: 281: 279: 275: 274:stack pointer 271: 259: 255: 251: 247: 244: 240: 236: 232: 224: 222: 220: 216: 212: 207: 205: 201: 197: 193: 189: 185: 181: 177: 172: 170: 166: 162: 158: 154: 151: 147: 143: 139: 136: 132: 123: 120: 116: 111: 107: 105: 102: 97: 92: 86: 83: 82: 80: 76: 62: 58: 53: 48: 43: 38: 30: 19: 2689:Chuck Peddle 2626:Architecture 2596:(and 65C802) 2578: 2432: 2424: 2404: 2391: 2380:Bibliography 2363: 2352:. Retrieved 2348: 2339: 2328:. Retrieved 2324: 2315: 2304:. Retrieved 2302:. 2010-06-23 2299: 2290: 2270: 2263: 2252:. Retrieved 2246: 2240: 2228: 2211: 2199: 2137: 2130:. Retrieved 2107: 2096: 2085: 2070: 2061: 2051: 2043:"W65C02S-14" 2037: 2023: 2009: 1997: 1986:"6502 Stack" 1979: 1967:. Retrieved 1960: 1951: 1900: 1890: 1857:Mephisto MMV 1835:Commodore 64 1829:TurboMaster 1739:portable by 1719: 1717: 1704: 1681: 1670: 1664: 1653: 1641: 1637: 1631: 1627: 1622: 1616: 1612: 1608: 1598: 1594: 1591: 1584: 1580: 1577: 1565: 1559: 1551: 1541: 1537: 1532: 1529: 1522: 1519: 1512: 1508: 1498: 1493: 1487: 1479: 1459: 1455: 1441: 1434: 1423: 1412: 1397: 1378: 1374: 1295: 1289: 1284: 1259: 1252: 1221: 1204: 1196:JMP ($ A004) 1157: 1149:JMP ($ A000) 1147:holds $ 12, 1133: 1125: 1108:LDA ($ 10),Y 1101:LDA ($ 10,X) 1094: 1085: 1073:LDA $ 1200,X 1069: 1064: 1059: 1055: 1051: 1046: 1042: 1037:decimal mode 1034: 1015: 1009:rather than 999:JMP ($ 12FF) 976: 960:JMP ($ 1234) 945: 922: 919: 901: 897: 889: 880: 867: 843: 827: 773: 769: 761: 757: 718: 705:, including 693:instructions 617: 613: 563: 555: 551: 539: 531: 527: 492: 478: 463: 455: 442: 435: 315: 313: 299:(ASIC) or a 290: 282: 228: 218: 208: 191: 173: 134: 128: 46: 2684:Bill Mensch 2471:- CPU World 2233:Wagner 1983 2204:Wagner 1983 2192:Wagner 1983 2173:Wagner 1983 2132:27 February 1944:Wagner 1983 1831:accelerator 1294:LDA #0;STA 1164:subroutines 1134:The 6502's 983:memory page 851:Bill Mensch 748:bus masters 664:accumulator 644:address bus 458:ccumulator 340:static core 254:accumulator 250:address bus 200:Seiko Epson 118:Predecessor 94:Performance 2704:Categories 2668:Ricoh 5A22 2663:Ricoh 2A03 2617:740 family 2605:Mitsubishi 2562:(and 4510) 2417:See also: 2354:2023-10-31 2330:2023-10-31 2306:2023-10-31 2281:0895881357 2254:2024-05-02 1913:References 1875:CSG 65CE02 1795:Atari Lynx 1753:BBC Master 1621:BBS1 $ 12, 1403:LDA $ 1234 1388:LDA $ 1234 1129:LDA ($ 10) 834:data sheet 764:nterrupt ( 709:addressing 316:W65C02S–14 219:W65C02S-14 104:clock rate 2677:Designers 2450:(archive) 1957:"Softalk" 1918:Citations 1773:Laser 128 1763:Replica 1 1737:Apple IIc 1556:SMB1 $ 12 1112:$ 10/$ 11 1022:interrupt 916:Bug fixes 707:zero page 241:) with a 235:registers 2646:machines 2392:Softtalk 1864:See also 1844:for the 1811:GameKing 1777:Apple II 1677:spinning 638:data bus 620:egister 336:homebrew 239:data bus 176:Synertek 169:embedded 60:Launched 2609:Renesas 1855:, e.g. 1805:HuC6280 1767:Apple I 1492:.A AND 1035:During 892:opcodes 865:space. 796:voltage 794:Supply 760:it-for- 750:when a 719:W65C02S 685:16-bit 642:16-bit 572:  558:ounter 554:rogram 534:ointer 486:  472:  449:  293:Verilog 204:HuC6280 148:-based 113:History 68: ( 47:W65C02S 2594:65C816 2589:65C265 2584:65C134 2560:65CE02 2443:  2278:  1969:24 May 1718:The 65 1714:65SC02 1640:,$ 12, 1200:$ A000 1184:$ A000 1153:$ 1234 1145:$ A001 1141:$ A000 1120:$ 1005 1116:$ 1000 1081:$ 1200 1077:$ 1200 1011:$ 1300 1007:$ 1200 1003:$ 12FF 968:$ 1235 964:$ 1234 815:Fully 768:) and 656:8-bit 649:8-bit 636:8-bit 616:tatus 266:$ 00FF 262:$ 0000 243:16-bit 192:W65C02 186:, and 133:(WDC) 2579:65C02 2520:, CSG 2435:65816 2220:(PDF) 1989:(PDF) 1905:page. 1895:date. 1882:Notes 1782:KIM-1 1568:,$ 12 1314:pair. 1277:DEC A 1273:INC A 1176:CLOSE 1018:reset 653:(ALU) 530:tack 307:, an 270:stack 231:8-bit 196:Sanyo 150:8-bit 135:65C02 99:Max. 29:6502C 18:65C02 2644:game 2642:For 2554:8502 2548:6510 2543:6509 2538:6508 2533:6507 2527:6502 2441:ISBN 2276:ISBN 2134:2018 1971:2022 1658:and 1642:addr 1636:BBS 1632:bit# 1628:addr 1623:addr 1617:bit# 1609:addr 1599:addr 1592:bit# 1588:and 1585:addr 1578:bit# 1564:SMB 1560:bit# 1552:bit# 1538:bit# 1530:bit# 1526:and 1520:bit# 1499:addr 1494:addr 1488:addr 1480:addr 1460:addr 1456:addr 1442:addr 1440:TRB 1438:and 1435:addr 1433:TSB 1413:The 1296:addr 1290:addr 1285:addr 1283:STZ 1260:addr 1258:DEC 1253:addr 1251:INC 1249:and 1229:and 1208:READ 1192:READ 1188:READ 1180:READ 1172:OPEN 1065:addr 1060:addr 1056:addr 1052:addr 1047:addr 1045:INC 995:$ 00 991:$ 00 979:$ FF 805:per 326:and 324:PLCC 320:PDIP 314:The 248:and 237:and 213:and 211:PLCC 146:nMOS 142:CMOS 129:The 70:1983 63:1983 1708:WAI 1700:JSR 1696:WAI 1692:JMP 1690:or 1688:JSR 1684:WAI 1672:WAI 1666:STP 1660:WAI 1656:STP 1590:BBR 1576:BBS 1528:RMB 1518:SMB 1503:BIT 1486:at 1484:AND 1478:at 1472:AND 1426:BIT 1419:BIT 1415:AND 1380:BIT 1360:BRA 1356:JMP 1352:JMP 1348:BRA 1342:PHA 1338:TYA 1336:or 1334:TXA 1330:PLY 1326:PHY 1322:PLX 1318:PHX 1312:PLA 1309:PHA 1305:LDA 1301:STZ 1271:or 1269:DEA 1265:INA 1247:DEY 1243:INY 1239:DEX 1235:INX 1231:DEC 1227:INC 1136:JMP 1026:CLD 1020:or 987:JMP 956:JMP 952:JMP 941:ROR 937:ROR 933:ROR 929:ROL 925:ROR 909:NOP 904:BBS 859:MAX 855:MAX 807:MHz 778:STP 766:WAI 744:MLB 733:VPB 701:16 691:69 548:PC 524:SP 332:MHz 328:QFP 264:to 215:QFP 180:NCR 101:CPU 2706:: 2607:, 2447:. 2403:. 2390:. 2347:. 2323:. 2298:. 2180:^ 2163:^ 2145:^ 2136:. 2118:^ 2060:. 1959:. 1926:^ 1720:SC 1613:zp 1595:zp 1581:zp 1542:zp 1533:zp 1523:zp 1476:OR 1468:OR 1464:.A 1452:.A 1202:. 1186:. 1178:, 1174:, 847:DD 839:DD 830:DD 803:mA 770:ST 758:WA 660:: 585:- 521:1 518:0 515:0 512:0 509:0 506:0 503:0 500:0 489:Y 475:X 452:A 322:, 291:A 206:. 194:. 182:, 178:, 2504:e 2497:t 2490:v 2371:. 2357:. 2333:. 2309:. 2284:. 2257:. 2222:. 2157:. 2079:. 2064:. 2045:. 2031:. 2017:. 1991:. 1973:. 1675:" 1638:1 1597:, 1583:, 1566:1 1544:. 1366:. 1344:. 1328:, 1324:, 1320:, 1279:. 1275:/ 1267:/ 1256:/ 1245:/ 1241:, 1237:/ 776:( 774:P 772:o 762:I 618:R 614:S 609:C 604:Z 599:I 594:D 589:B 581:V 576:N 556:C 552:P 532:P 528:S 493:Y 479:X 456:A 431:0 426:1 421:2 416:3 411:4 406:5 401:6 396:7 391:8 386:9 381:0 376:1 371:2 366:3 361:4 356:5 72:) 20:)

Index

65C02
6502C

Western Design Center
CPU
clock rate
MOS Technology 6502
Western Design Center
microprocessor
CMOS
nMOS
8-bit
MOS Technology 6502
portable computer
microcontroller
home computers
embedded
Synertek
NCR
GTE Microcircuits
Rockwell Semiconductor
Sanyo
Seiko Epson
HuC6280
PLCC
QFP
8-bit
registers
data bus
16-bit

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