456:
original 6502, which allowed it to be used as a drop-in replacement while still allowing the 16-bit processing of the CPU to be used. However, as it used the original pinout it had only 16 addressing pins, and could therefore only access 64 KB of external memory. Typically, when hardware manufacturers designed a project from the ground up, they used the 65C816 rather than the 65C802, resulting in the latter being withdrawn from production.
532:
1443:. Direct page addressing uses an 8-bit address, which results in faster access than when a 16- or 24-bit address is used. Also, some addressing modes that offer indirection are only possible on direct page. In the 65(c)02, the direct page is always the first 256 bytes of memory, hence âzero pageâ. In native mode, the 65c816 can relocate direct (zero) page anywhere in bank
374:
1387:
will not be incremented. Hence a program is bounded by the limits of the bank in which it is executing. Implied by this memory model is that branch and subroutine targets must be in the same bank as the instruction making the branch or call, unless "long" jumps or subroutine calls are used to execute
1311:
status register bits. This feature gives the programmer the ability to perform operations on either word- and byte-size data. As the accumulator and index register sizes are independently settable, it is possible, for example, to have the accumulator set to eight bits and the index registers set to
1225:
The 65C816 has two operating modes: "emulation mode", in which the 16-bit operations are invisibleâthe index registers are forced to eight bitsâand the chip appears to be very similar to the 6502, with the same cycle timings for the opcodes; and "native mode", which exposes all new features. The CPU
364:
is completely software-compatible with the 65C816, but is electrically-compatible with the 6502 and 65C02. Hence the 65C802 could be used as a drop-in replacement in most systems equipped with a 6502 or 65C02. However, the 65C802 cannot emit a 24-bit address, which limits it to a 64 KB address
447:
that would, among other things, have improved graphics and sound. Apple wanted an MPU that would be software compatible with the 6502 then in use in the Apple II but with the ability to address more memory, and to load and store 16 bit words. The result was the 65C816, finished in March 1984, with
455:
The same process also led to the 65C802, which was identical inside to the 65C816. Both were produced on the same fabrication lines and diverged only during the last metalization stages when the chip was being connected to the external pins. In the 65C802, those pins had the same layout as the
341:, the W65C816S starts in "emulation mode", meaning it substantially behaves as a 65C02. Thereafter, the W65C816S may be switched to "native mode" with a two instruction sequence, causing it to enable all enhanced features, yet still maintain a substantial degree of
1319:, when used while the accumulator is set to 16 bits, will affect two contiguous bytes of memory, not one and will consume more clock cycles than when the accumulator is set to eight bits. Similarly, all arithmetic and logical operations will be 16-bit operations.
1399:
is prepended to a 16-bit data address to form the 24-bit effective address at which data will be accessed. This processor characteristic makes it possible to sanely execute 6502 or 65c02 code that uses 16-bit addresses to reference data elements. Unlike
38:
1327:
The other major change to the system while running in native mode is that the memory model is expanded to a 24-bit format from the original 16-bit format of the 6502. The 65c816 makes use of two 8-bit registers, the data bank register
1292:) are 8-bit or 16-bit in size. Zeros in these bits set 16-bit sizes, ones set 8-bit sizes. These bits are locked at ones when the processor is powered on or reset, but become changeable when the processor is switched to native mode.
1674:
is set, not only will the index registers return to being 8 bits, whatever was in the MSB while they were 16 bits wide will be lost, something an assembly language programmer cannot afford to forget.
1226:
automatically enters emulation mode when it is powered on or reset, which allows it to replace a 65(C)02, assuming one makes the required circuit changes to accommodate the different pin layout.
1336:), to set bits 16-23 of the address, effectively generating 24-bit addresses. In both cases, 'bank' refers to a contiguous 64 KB segment of memory that is bounded by the address range
1315:
When register sizes are set to 16 bits, a memory access will fetch or store two contiguous bytes at the rate of one byte per clock cycle. Hence a read-modify-write instruction, such as
428:
at any given clock speed. Also desired was the ability to raise the maximum supported clock speed. The 65C02 design addressed chip errata present in the NMOS 6502 (e.g., the infamous
408:. The primary goal of the 65C02 effort was to move from the original 6502's NMOS process to the CMOS process, which would allow it to run at much lower power levels, somewhere between
1617:-accumulator). A load/store or arithmetic/logical operation involving the accumulator or memory will be a 16-bit operationâtwo bus cycles are required to fetch/store a 16-bit value.
1234:
The most obvious change to the 65C816 when running in native mode is the expansion of the various registers from 8-bit to 16-bit sizes. This enhancement affects the accumulator (
1491:), there were not enough bits left to hold the new mode bit. Instead, a unique solution was used in which the mode bit was left "invisible", unable to be directly accessed. The
1268:
When running in native mode, two bits in the status register change their meaning. In the original 6502, bits 4 and 5 were not used, although bit 4 is referred to as the break (
452:
in the second half of the year and full release in 1985. Mensch was aided during the design process by his sister
Kathryn, who was responsible for part of the device's layout.
1805:
2543:
1643:
is set, the accumulator will return to being an 8-bit register and subsequent operations on the accumulator, with a few exceptions, will be 8-bit operations. The
1647:-accumulator will retain the value it had when the accumulator was set to 16 bits. The exceptions are the instructions that transfer the direct page register (
1546:
determine how the user registers (accumulator and index) appear to the rest of the system. Upon reset, the 65c816 starts in 6502 emulation mode, in which
1420:
is ignored if a 24-bit address is specified as the operand to a data fetch/store instruction, or if the effective address is on direct (zero) page or the
1772:
1830:
514:
1021:
1295:
In native mode operation, the accumulator and index registers may be set to 16- or 8-bit sizes at the programmerâs discretion by using the
1312:
16 bits, giving the programmer the ability to manipulate individual bytes over a 64KB range without having to perform pointer arithmetic.
2486:
1709:
293:
2008:
1978:
1948:
2221:
2030:
2331:
1077:) registers, generating bits 16–23 of 24-bit code and data addresses. Separate program and data bank registers allow program
1408:
can be changed under program control, something that might be done to access data beyond the limits of 16-bit addressing. Also,
2548:
1794:
2538:
2461:
1742:
1562:-accumulator) is not directly accessible but can be swapped with the least significant byte (LSB) of the accumulator (the
1134:
1865:
137:
1655:) to/from the accumulator. These operations are always 16 bits wide in native mode, regardless of the condition of the
502:
377:
175:
1013:
Emulation mode allows substantial software compatibility with the NMOS 6502 and CMOS 65C02, excepting undocumented
1207:) instruction for future two-byte opcodes and a link to future designs (WDM are the initials of W65C816S designer
1841:
1768:
353:
replacement for its NMOS ancestor, the PDIP40 W65C816S is not pin-compatible with any other 6502 family MPU.
1558:. Hence the registers are locked to eight-bit size. The most significant byte (MSB) of the accumulator (the
1032:
652:
397:
94:
2297:
1632:, the 16-bit value in the index register will be added to the base address to form the effective address.
1126:
401:
342:
2399:
2324:
1179:
1078:
1028:
385:
264:
77:
1916:
1097:
327:
169:
2244:
2170:
1515:. For instance, if one wants to enter native mode after the processor has started up, one would use
2481:
2437:
2382:
2376:
2371:
2366:
2361:
2355:
2237:
1197:
282:
142:
1713:
1686:
525:
311:
2289:
1412:
will temporarily increment if an address is indexed beyond the limits of the bank currently in
2217:
1183:
506:
444:
432:
bug) and introduced new instructions and new addressing modes for some existing instructions.
338:
2211:
2317:
2000:
1970:
1940:
1628:
is cleared, both index registers will be set to 16 bits. If used to index an address, e.g.,
1108:
319:
308:
2272:
1372:
1258:
1145:
1141:
1118:) input and associated vector supports processor repairs of bus error conditions, such as
940:
877:
510:
468:
271:
2445:
2346:
1421:
1281:
1246:
1048:
695:
678:
494:, made it possible to produce designs that used minimal power when in a standby state.
436:
350:
315:
279:
260:
2532:
1724:
1250:
1040:
777:
464:
334:, as well as several new electrical signals for improved system hardware management.
2517:
1704:
487:
1196:) instruction with associated vector supports co-processor configurations, e.g.,
314:
sizes. In addition to the availability of 16-bit registers, the W65C816S extends
2512:
1208:
1189:
522:
483:
393:
37:
2278:
2188:
1507:
mulation) instruction exchanges the value of the emulation bit with the carry (
531:
400:
of WDC, began development of the 65C02 with his production partners, primarily
2496:
2491:
2472:
2433:
2417:
2412:
2388:
2303:
1717:
1691:
1119:
1003:
491:
460:
331:
289:
285:
97:
1447:(the first 64 KB of memory) by writing the 16-bit starting address into
2407:
1130:
1093:
989:
734:
268:
228:
1431:
A further addition to the register set is the 16-bit direct page register (
1125:
Direct page register and stack relative addressing provides capability for
303:
in the part's designation comes from its 65C02 compatibility mode, and the
1570:
instruction. There is no corresponding operation for the index registers (
435:
Development of the W65C816S commenced in 1982 after Mensch consulted with
1700:
1523:
to write it to the emulation bit. Returning to 65c02 emulation mode uses
1007:
440:
405:
323:
2283:
1344:
is the bank address, that is, bits 16-23 of the effective address. Both
1364:
1149:
1017:. All 256 opcodes in the 65C816 are functional in both operating modes.
996:
985:
518:
490:
without loss of register contents. This feature, along with the use of
373:
267:(WDC). Introduced in 1983, the W65C816S is an enhanced version of the
17:
2306:– An extensive discussion of interrupt processing on the 65C816
1360:
1014:
982:
2309:
1696:
530:
482:
In the 1990s, both the 65C816 and 65C02 were converted to a fully
476:
449:
372:
1795:"W65C832 Information, Specification, and Data Sheet (March 1990)"
1435:), which sets the base address for what was formerly called the
978:
498:
346:
275:
2313:
1455:
is not set to an exact page boundary, that is, if the value in
497:
As of April 2024, the W65C816S is available from WDC in 40 pin
1487:
bits to the previous set of six flags in the status register (
1388:
code in another bank. There is no programmatic means by which
1164:
1163:), allowing rapid copying of data structures from one area of
472:
2253:
Programming the 65816: Including the 6502, 65C02, and 65802
2057:
2055:
1006:
range, officially 14 MHz maximum at 5 volts (20Mhz in
1875:
1873:
1475:
The current mode of operation is stored in the emulation (
1020:
24-bit memory addressing provides access to 16 MB of
479:
and others from the mid-to-late 1980s to the early 1990s.
2213:
Programming the 65816 - including the 6502, 65C02, 65802
1727:, a 65c816-based co-processor chip, in each cartridge.
1152:, including most new opcodes implemented in the 65C02.
1534:
Internally, the 65c816 is a fully 16-bit design. The
1831:"W65C832 Information, Specification, and Data Sheet"
1732:
Foenix Retro
Systems C256 U/U+ model and F256K model
2505:
2470:
2454:
2432:
2398:
2345:
1613:-accumulator to form a 16-bit register (called the
237:
218:
213:
190:
185:
161:
156:
148:
136:
131:
123:
106:
92:
87:
70:
52:
47:
1918:Application Specific Logic Products Data Book 1988
459:Apple subsequently integrated the 65C816 into the
330:. It has an enhanced instruction set and a 16-bit
1092:) control outputs for memory qualification, dual
2238:List of books about 65xx microprocessor families
486:, which made it possible to completely stop the
1585:Upon being switched to native mode, the MSB of
1379:) to form the 24-bit effective address. Should
1186:and allow synchronization with external events.
1723:Additionally, 30+ Super NES games include the
981:design offers low power consumption (300
345:with most 65C02 software. However, unlike the
2325:
2290:A 6502 Programmer's Introduction to the 65816
1921:. VLSI Technology Inc. 1988. pp. 257â279
1062:16-bit direct page (aka zero page) register (
307:signifies that the MPU has selectable 8- and
8:
1280:flag. These bits control whether or not the
961:
30:
1428:is used to generate the effective address.
2332:
2318:
2310:
2157:
2145:
2133:
2121:
2109:
2097:
2085:
2073:
2061:
1903:
1891:
1879:
1272:) flag. In native mode, bit 4 becomes the
36:
2279:6502/65C02/65C816 Instruction Set decoded
2260:65816/65802 assembly language programming
1866:Chronology of Microprocessors (1980â1989)
1451:. There is a one-cycle access penalty if
513:through the W65C265, and as IP cores for
365:space. The 65C802 is no longer produced.
2248:; Western Design Center; 55 pages; 2018.
1759:
1597:-accumulator will be unchanged. If the
2544:Computer-related introductions in 1983
1424:. In the latter case, an implied bank
1144:—13 original 6502 modes with 92
1081:and 16 MB linear data addressing.
543:
463:computer. The basic 65C816 design was
29:
2031:"W55V92 TV-toy Controller Data Sheet"
1609:-accumulator will be "ganged" to the
1107:) control output to indicate when an
1010:), using a single-phase clock source.
999:range: 1.8 V to 5.0 V ± 5%.
7:
1479:) bit. Having already added the new
1395:During a data fetch or store cycle,
200:W65C802 (pin-compatible with W65C02)
2379:(and 6510T, 6512, 6513, 6514, 6515)
2262:; Osborne/McGraw-Hill; 686 pg; 1986
2001:"W65C265S 8/16-bit Microcontroller"
1710:Super Nintendo Entertainment System
448:samples provided to both Apple and
384:microprocessor, shown mounted on a
294:Super Nintendo Entertainment System
288:MPU. The 65C816 is the CPU for the
2171:"16bits CPU â New Retro Computers"
1682:Systems based on 65c816 variants:
25:
2296:article by Brett Tabke; includes
2210:Eyes, David; Lichty, Ron (1986).
1971:"W65C816 8/16-bit Microprocessor"
1941:"W65C265S 16-bit Microcontroller"
1519:to clear the carry bit, and then
1332:) and the program bank register (
1265:), which has always been 16-bit.
349:version of the 65C02, which is a
2284:65816/65C816 Technical Documents
2255:; Brady Publishing; 636 pg; 2015
1981:from the original on 15 Nov 2023
263:(MPU) developed and sold by the
2304:Investigating 65C816 Interrupts
2011:from the original on 7 Apr 2024
1951:from the original on 2 Apr 2024
1811:from the original on 7 Apr 2024
1775:from the original on 7 Apr 2024
1303:instructions to manipulate the
992:) and increased noise immunity.
132:Architecture and classification
2005:The Western Design Center, Inc
1975:The Western Design Center, Inc
1945:The Western Design Center, Inc
1467:is the most-significant byte.
1216:Comparison with earlier models
1:
2462:Interrupts in 65xx processors
1743:Interrupts in 65xx processors
1167:to another with minimal code.
1122:and memory access violations.
1088:) and valid program address (
278:enhancement of the venerable
2358:(and 6501, 6503, 6504, 6505)
2251:Eyes, David and Ron Lichty;
1720:CPU is based on the 65c816.
1578:), whose MSBs are locked at
1566:-accumulator) by using the
1276:flag and bit 5 becomes the
292:and, in modified form, the
241:WDC 65C832 (never released)
58:; 39 years ago
2565:
2300:'s instruction set summary
2235:
1288:) and accumulator/memory (
1257:). It does not affect the
949:
897:
890:
860:
771:
728:
689:
672:
663:
632:
186:Products, models, variants
1439:, but now referred to as
1392:can be directly changed.
1383:"wrap" (return to zero),
1198:floating point processors
1155:Block-copy instructions (
855:
790:
687:
670:
646:
641:
639:
517:integration (for example
102:1 MHz to 14 MHz
35:
1769:"A Report on the 65c832"
1180:reduce power consumption
439:on a new version of the
2275:- Western Design Center
1471:Switching between modes
1178:) instructions further
960:rogram status register
521:'s W55V9x series of TV
492:asynchronous static RAM
157:Physical specifications
27:8/16-bit microprocessor
2549:16-bit microprocessors
2385:(and 7501, 8500, 8501)
2158:Eyes & Lichty 1986
2146:Eyes & Lichty 1986
2134:Eyes & Lichty 1986
2122:Eyes & Lichty 1986
2110:Eyes & Lichty 1986
2098:Eyes & Lichty 1986
2086:Eyes & Lichty 1986
2074:Eyes & Lichty 1986
2062:Eyes & Lichty 1986
1904:Eyes & Lichty 1986
1892:Eyes & Lichty 1986
1880:Eyes & Lichty 1986
1593:will be zero, and the
1356:at power-on or reset.
1174:) and Stop-the-Clock (
944:rogram status register
536:
402:Rockwell Semiconductor
389:
343:backward compatibility
322:, supporting up to 16
149:Number of instructions
2400:Western Design Center
1703:enhancements for the
1651:) and stack pointer (
973:WDC 65c816 features:
545:WDC 65c816 registers
534:
386:single-board computer
376:
265:Western Design Center
78:Western Design Center
2539:65xx microprocessors
2193:Foenix Retro Systems
2175:Foenix Retro Systems
1371:is prepended to the
1170:Wait-for-Interrupt (
1084:Valid data address (
1073:) and program bank (
488:processor's Ă2 clock
328:random-access memory
138:Instruction set
1767:Mensch, William D.
1352:are initialized to
1203:Reserved "escape" (
1004:operating frequency
546:
71:Common manufacturer
48:General information
32:
2258:Fischer, Michael;
1687:Acorn Communicator
544:
537:
445:personal computers
430:JMP (<addr>)
390:
2526:
2525:
2216:. Prentice Hall.
2038:Arrow Electronics
1338:$ xx0000-$ xxFFFF
1323:24-bit addressing
1209:William D. Mensch
1184:interrupt latency
1111:is being fetched.
1069:8-bit data bank (
971:
970:
967:
966:
509:packaging, as an
316:memory addressing
245:
244:
16:(Redirected from
2556:
2334:
2327:
2320:
2311:
2245:65C816 Datasheet
2227:
2197:
2196:
2185:
2179:
2178:
2167:
2161:
2155:
2149:
2143:
2137:
2131:
2125:
2119:
2113:
2107:
2101:
2095:
2089:
2083:
2077:
2071:
2065:
2059:
2050:
2049:
2047:
2045:
2035:
2027:
2021:
2020:
2018:
2016:
1997:
1991:
1990:
1988:
1986:
1967:
1961:
1960:
1958:
1956:
1937:
1931:
1930:
1928:
1926:
1913:
1907:
1901:
1895:
1889:
1883:
1877:
1868:
1863:
1857:
1856:
1854:
1852:
1846:
1840:. Archived from
1835:
1827:
1821:
1820:
1818:
1816:
1810:
1799:
1791:
1785:
1784:
1782:
1780:
1764:
1673:
1669:
1662:
1658:
1654:
1650:
1646:
1642:
1638:
1631:
1627:
1623:
1616:
1612:
1608:
1605:is cleared, the
1604:
1600:
1596:
1592:
1588:
1581:
1577:
1573:
1569:
1565:
1561:
1557:
1553:
1549:
1545:
1541:
1537:
1530:
1526:
1522:
1518:
1514:
1511:) bit, bit 0 in
1510:
1494:
1490:
1486:
1482:
1478:
1466:
1462:
1458:
1454:
1450:
1446:
1434:
1427:
1419:
1415:
1411:
1407:
1403:
1398:
1391:
1386:
1382:
1378:
1370:
1355:
1351:
1347:
1343:
1339:
1335:
1331:
1318:
1317:ROR <addr>
1310:
1306:
1302:
1298:
1291:
1287:
1279:
1275:
1271:
1264:
1256:
1245:
1241:
1237:
1230:16-bit registers
1206:
1195:
1177:
1173:
1162:
1158:
1142:addressing modes
1117:
1109:interrupt vector
1106:
1096:and cycle steal
1091:
1087:
1076:
1072:
1065:
1058:
1054:
1046:
1038:
551:
550:
547:
431:
427:
426:
422:
417:
416:
412:
66:
64:
59:
40:
33:
21:
2564:
2563:
2559:
2558:
2557:
2555:
2554:
2553:
2529:
2528:
2527:
2522:
2501:
2466:
2450:
2428:
2394:
2341:
2340:65xx-based CPUs
2338:
2294:Commodore World
2269:
2240:
2234:
2232:Further reading
2224:
2209:
2206:
2201:
2200:
2187:
2186:
2182:
2169:
2168:
2164:
2156:
2152:
2144:
2140:
2132:
2128:
2120:
2116:
2108:
2104:
2096:
2092:
2084:
2080:
2072:
2068:
2060:
2053:
2043:
2041:
2033:
2029:
2028:
2024:
2014:
2012:
1999:
1998:
1994:
1984:
1982:
1969:
1968:
1964:
1954:
1952:
1939:
1938:
1934:
1924:
1922:
1915:
1914:
1910:
1902:
1898:
1890:
1886:
1878:
1871:
1864:
1860:
1850:
1848:
1844:
1833:
1829:
1828:
1824:
1814:
1812:
1808:
1804:. 6 Sep 2010 .
1797:
1793:
1792:
1788:
1778:
1776:
1766:
1765:
1761:
1756:
1751:
1739:
1680:
1671:
1667:
1660:
1656:
1652:
1648:
1644:
1640:
1636:
1630:LDA SOMEWHERE,X
1629:
1625:
1621:
1614:
1610:
1606:
1602:
1598:
1594:
1590:
1586:
1579:
1575:
1571:
1567:
1563:
1559:
1555:
1551:
1547:
1543:
1539:
1535:
1528:
1524:
1520:
1516:
1512:
1508:
1492:
1488:
1484:
1480:
1476:
1473:
1464:
1460:
1456:
1452:
1448:
1444:
1432:
1425:
1417:
1413:
1409:
1405:
1401:
1396:
1389:
1384:
1380:
1376:
1373:program counter
1368:
1353:
1349:
1345:
1341:
1337:
1333:
1329:
1325:
1316:
1308:
1304:
1300:
1296:
1289:
1285:
1282:index registers
1277:
1273:
1269:
1262:
1259:program counter
1254:
1247:index registers
1243:
1239:
1235:
1232:
1223:
1218:
1204:
1193:
1175:
1171:
1160:
1156:
1115:
1104:
1100:implementation.
1089:
1085:
1074:
1070:
1063:
1056:
1052:
1049:index registers
1044:
1036:
995:Wide operating
892:Status register
665:Index registers
542:
469:VLSI Technology
429:
424:
420:
419:
414:
410:
409:
371:
233:
209:
206:
181:
119:
83:
62:
60:
57:
43:
28:
23:
22:
15:
12:
11:
5:
2562:
2560:
2552:
2551:
2546:
2541:
2531:
2530:
2524:
2523:
2521:
2520:
2515:
2509:
2507:
2503:
2502:
2500:
2499:
2494:
2489:
2484:
2482:Hudson HuC6280
2478:
2476:
2468:
2467:
2465:
2464:
2458:
2456:
2452:
2451:
2449:
2448:
2442:
2440:
2430:
2429:
2427:
2426:
2420:
2415:
2410:
2404:
2402:
2396:
2395:
2393:
2392:
2386:
2380:
2374:
2369:
2364:
2359:
2352:
2350:
2347:MOS Technology
2343:
2342:
2339:
2337:
2336:
2329:
2322:
2314:
2308:
2307:
2301:
2287:
2281:
2276:
2273:65C816 webpage
2268:
2267:External links
2265:
2264:
2263:
2256:
2249:
2233:
2230:
2229:
2228:
2223:978-0893037895
2222:
2205:
2202:
2199:
2198:
2180:
2162:
2150:
2138:
2126:
2114:
2102:
2090:
2078:
2066:
2051:
2022:
2007:. 5 Jan 2021.
1992:
1977:. 5 Jan 2021.
1962:
1947:. 5 Jan 2021.
1932:
1908:
1896:
1884:
1869:
1858:
1847:on 30 Jun 2023
1822:
1802:ReActive Micro
1786:
1758:
1757:
1755:
1752:
1750:
1747:
1746:
1745:
1738:
1735:
1734:
1733:
1730:
1729:
1728:
1707:
1694:
1689:
1679:
1676:
1554:are locked to
1472:
1469:
1422:hardware stack
1324:
1321:
1231:
1228:
1222:
1219:
1217:
1214:
1213:
1212:
1201:
1187:
1168:
1153:
1138:
1123:
1112:
1101:
1082:
1067:
1060:
1025:
1018:
1011:
1000:
993:
969:
968:
965:
964:
955:
950:
947:
946:
938:
933:
928:
923:
918:
913:
908:
903:
898:
895:
894:
888:
887:
864:
859:
853:
852:
842:
839:
836:
833:
830:
827:
824:
821:
818:
815:
812:
809:
806:
803:
800:
797:
794:
788:
787:
775:
770:
767:
764:
761:
758:
755:
752:
749:
745:
744:
732:
727:
724:
721:
718:
715:
712:
709:
706:
702:
701:
693:
688:
685:
684:
676:
671:
668:
667:
661:
660:
650:
645:
640:
637:
636:
634:Main registers
630:
629:
627:(bit position)
624:
621:
618:
615:
612:
609:
606:
603:
600:
597:
594:
591:
588:
585:
582:
579:
576:
573:
570:
567:
564:
561:
558:
555:
541:
538:
465:second-sourced
437:Apple Computer
396:, founder and
370:
367:
351:pin-compatible
280:MOS Technology
274:MPU, itself a
261:microprocessor
259:) is a 16-bit
243:
242:
239:
235:
234:
232:
231:
226:
222:
220:
216:
215:
211:
210:
208:
207:
205:
204:
201:
197:
194:
192:
188:
187:
183:
182:
180:
179:
172:
165:
163:
159:
158:
154:
153:
150:
146:
145:
140:
134:
133:
129:
128:
125:
121:
120:
118:
117:
114:
110:
108:
104:
103:
100:
90:
89:
85:
84:
82:
81:
74:
72:
68:
67:
54:
50:
49:
45:
44:
42:PDIP40 package
41:
26:
24:
14:
13:
10:
9:
6:
4:
3:
2:
2561:
2550:
2547:
2545:
2542:
2540:
2537:
2536:
2534:
2519:
2516:
2514:
2511:
2510:
2508:
2504:
2498:
2495:
2493:
2490:
2488:
2487:Nintendo SA-1
2485:
2483:
2480:
2479:
2477:
2474:
2469:
2463:
2460:
2459:
2457:
2453:
2447:
2444:
2443:
2441:
2439:
2435:
2431:
2424:
2421:
2419:
2416:
2414:
2411:
2409:
2406:
2405:
2403:
2401:
2397:
2390:
2387:
2384:
2381:
2378:
2375:
2373:
2370:
2368:
2365:
2363:
2360:
2357:
2354:
2353:
2351:
2348:
2344:
2335:
2330:
2328:
2323:
2321:
2316:
2315:
2312:
2305:
2302:
2299:
2295:
2291:
2288:
2285:
2282:
2280:
2277:
2274:
2271:
2270:
2266:
2261:
2257:
2254:
2250:
2247:
2246:
2242:
2241:
2239:
2231:
2225:
2219:
2215:
2214:
2208:
2207:
2203:
2194:
2190:
2184:
2181:
2176:
2172:
2166:
2163:
2160:, p. 51.
2159:
2154:
2151:
2148:, p. 65.
2147:
2142:
2139:
2136:, p. 64.
2135:
2130:
2127:
2124:, p. 80.
2123:
2118:
2115:
2112:, p. 55.
2111:
2106:
2103:
2100:, p. 54.
2099:
2094:
2091:
2088:, p. 53.
2087:
2082:
2079:
2076:, p. 52.
2075:
2070:
2067:
2064:, p. 46.
2063:
2058:
2056:
2052:
2039:
2032:
2026:
2023:
2010:
2006:
2002:
1996:
1993:
1980:
1976:
1972:
1966:
1963:
1950:
1946:
1942:
1936:
1933:
1920:
1919:
1912:
1909:
1906:, p. 45.
1905:
1900:
1897:
1894:, p. 44.
1893:
1888:
1885:
1882:, p. 42.
1881:
1876:
1874:
1870:
1867:
1862:
1859:
1843:
1839:
1832:
1826:
1823:
1807:
1803:
1796:
1790:
1787:
1774:
1770:
1763:
1760:
1753:
1748:
1744:
1741:
1740:
1736:
1731:
1726:
1722:
1721:
1719:
1715:
1711:
1708:
1706:
1702:
1698:
1695:
1693:
1690:
1688:
1685:
1684:
1683:
1677:
1675:
1664:
1633:
1618:
1583:
1532:
1506:
1502:
1498:
1470:
1468:
1442:
1438:
1429:
1423:
1393:
1374:
1367:fetch cycle,
1366:
1362:
1357:
1322:
1320:
1313:
1293:
1283:
1266:
1260:
1252:
1251:stack pointer
1248:
1229:
1227:
1220:
1215:
1210:
1202:
1199:
1191:
1188:
1185:
1181:
1169:
1166:
1154:
1151:
1147:
1143:
1139:
1136:
1132:
1128:
1124:
1121:
1113:
1110:
1103:Vector pull (
1102:
1099:
1095:
1083:
1080:
1068:
1061:
1050:
1042:
1041:stack pointer
1034:
1030:
1026:
1023:
1019:
1016:
1012:
1009:
1005:
1001:
998:
994:
991:
987:
984:
980:
977:Fully static
976:
975:
974:
963:
959:
956:
954:
951:
948:
945:
943:
939:
937:
934:
932:
929:
927:
924:
922:
919:
917:
914:
912:
909:
907:
904:
902:
899:
896:
893:
889:
886:
884:
880:
876:
872:
868:
865:
863:
858:
854:
851:ank register
850:
846:
843:
840:
837:
834:
831:
828:
825:
822:
819:
816:
813:
810:
807:
804:
801:
798:
795:
793:
789:
786:
784:
780:
776:
774:
768:
765:
762:
759:
756:
753:
750:
747:
746:
743:
741:
737:
733:
731:
725:
722:
719:
716:
713:
710:
707:
704:
703:
700:
698:
694:
692:
686:
683:
681:
677:
675:
669:
666:
662:
658:
654:
651:
649:
644:
638:
635:
631:
628:
625:
622:
619:
616:
613:
610:
607:
604:
601:
598:
595:
592:
589:
586:
583:
580:
577:
574:
571:
568:
565:
562:
559:
556:
553:
552:
549:
548:
539:
533:
529:
527:
524:
520:
516:
512:
508:
504:
500:
495:
493:
489:
485:
480:
478:
474:
470:
466:
462:
457:
453:
451:
446:
442:
438:
433:
407:
403:
399:
395:
387:
383:
379:
375:
368:
366:
363:
359:
354:
352:
348:
344:
340:
335:
333:
332:stack pointer
329:
325:
321:
317:
313:
310:
306:
302:
297:
295:
291:
287:
284:
281:
277:
273:
270:
266:
262:
258:
254:
250:
240:
236:
230:
227:
224:
223:
221:
217:
212:
203:W65C265 (MCU)
202:
199:
198:
196:
195:
193:
189:
184:
177:
173:
171:
167:
166:
164:
160:
155:
151:
147:
144:
141:
139:
135:
130:
126:
124:Address width
122:
116:16 (internal)
115:
112:
111:
109:
105:
101:
99:
96:
91:
86:
79:
76:
75:
73:
69:
55:
51:
46:
39:
34:
19:
2518:Chuck Peddle
2455:Architecture
2425:(and 65C802)
2422:
2293:
2286:- zophar.net
2259:
2252:
2243:
2212:
2204:Bibliography
2192:
2183:
2174:
2165:
2153:
2141:
2129:
2117:
2105:
2093:
2081:
2069:
2042:. Retrieved
2040:. 2 May 2006
2037:
2025:
2013:. Retrieved
2004:
1995:
1983:. Retrieved
1974:
1965:
1953:. Retrieved
1944:
1935:
1923:. Retrieved
1917:
1911:
1899:
1887:
1861:
1849:. Retrieved
1842:the original
1837:
1825:
1813:. Retrieved
1801:
1789:
1777:. Retrieved
1762:
1725:Nintendo SA1
1705:Commodore 64
1681:
1678:Applications
1665:
1634:
1619:
1584:
1533:
1527:followed by
1504:
1500:
1496:
1474:
1440:
1436:
1430:
1394:
1358:
1326:
1314:
1294:
1267:
1233:
1224:
1190:Co-Processor
1146:instructions
1137:programming.
1135:re-locatable
1079:segmentation
1022:memory space
972:
957:
952:
941:
935:
930:
925:
920:
915:
910:
905:
900:
891:
882:
878:
874:
870:
866:
861:
856:
848:
844:
791:
782:
778:
772:
739:
735:
729:
696:
690:
679:
673:
664:
656:
653:accumulators
647:
642:
633:
626:
505:, or 44-pin
496:
481:
458:
454:
434:
391:
381:
361:
357:
355:
336:
304:
300:
298:
256:
252:
248:
246:
219:Predecessors
113:8 (external)
2513:Bill Mensch
1441:direct page
1182:, decrease
1120:page faults
1033:accumulator
742:age pointer
523:Edutainment
484:static core
394:Bill Mensch
380:version of
88:Performance
2533:Categories
2497:Ricoh 5A22
2492:Ricoh 2A03
2446:740 family
2434:Mitsubishi
2391:(and 4510)
2292:– A
2236:See also:
1749:References
1718:Ricoh 5A22
1692:Apple IIGS
1503:arry with
1359:During an
1249:, and the
1148:using 256
988:at 1
659:Combined)
461:Apple IIGS
443:series of
290:Apple IIGS
107:Data width
98:clock rate
31:WDC 65C816
2506:Designers
1754:Citations
1437:zero page
1221:Two modes
1131:recursive
1127:reentrant
962:mode flag
392:In 1981,
324:megabytes
269:WDC 65C02
238:Successor
229:WDC 65C02
2475:machines
2009:Archived
1979:Archived
1949:Archived
1925:18 March
1838:6502.org
1806:Archived
1773:Archived
1737:See also
1701:SuperCPU
1542:bits in
1463:, where
1340:, where
1150:op codes
1008:SuperCPU
540:Features
535:W65C802P
441:Apple II
406:Synertek
382:W65C816S
312:register
249:W65C816S
225:MOS 6502
178:, others
162:Packages
80:, others
53:Launched
2438:Renesas
2189:"F256K"
2044:12 June
1714:console
1670:bit in
1666:If the
1659:bit in
1639:bit in
1635:If the
1624:bit in
1620:If the
1601:bit in
1499:change
1459:is not
1365:operand
1238:), the
1114:Abort (
1047:), and
1027:16-bit
1015:opcodes
997:voltage
881:rogram
869:rogram
519:Winbond
423:⁄
413:⁄
378:PLCC-44
369:History
358:W65C802
320:24 bits
214:History
191:Variant
174:44-pin
168:40-pin
127:24 bits
61: (
2423:65C816
2418:65C265
2413:65C134
2389:65CE02
2220:
1712:: the
1461:$ xx00
1361:opcode
1116:ABORTB
885:ounter
785:ointer
738:irect
503:PLCC44
347:PDIP40
309:16-bit
253:65C816
251:(also
18:65C816
2408:65C02
2349:, CSG
2034:(PDF)
2015:7 Apr
1985:7 Apr
1955:7 Apr
1851:7 Apr
1845:(PDF)
1834:(PDF)
1815:7 Apr
1809:(PDF)
1798:(PDF)
1779:7 Apr
1697:C-One
1094:cache
1002:Wide
781:tack
699:index
682:index
477:Sanyo
450:Atari
362:65802
339:reset
272:8-bit
257:65816
93:Max.
2473:game
2471:For
2383:8502
2377:6510
2372:6509
2367:6508
2362:6507
2356:6502
2218:ISBN
2046:2024
2017:2024
1987:2024
1957:2024
1927:2024
1853:2024
1817:2024
1781:2024
1699:and
1589:and
1580:$ 00
1574:and
1550:and
1538:and
1483:and
1445:$ 00
1426:$ 00
1354:$ 00
1348:and
1307:and
1299:and
1242:and
1159:and
1133:and
1055:and
979:CMOS
873:ank
847:ata
515:ASIC
507:TQFP
499:PDIP
418:and
404:and
356:The
299:The
286:NMOS
283:6502
276:CMOS
247:The
176:PLCC
143:6502
63:1985
56:1985
2298:CMD
1716:'s
1568:XBA
1529:XCE
1525:SEC
1521:XCE
1517:CLC
1493:XCE
1363:or
1301:SEP
1297:REP
1205:WDM
1194:COP
1176:STP
1172:WAI
1165:RAM
1161:MVP
1157:MVN
1140:24
1105:VPB
1098:DMA
1090:VPA
1086:VDA
1039:),
1029:ALU
990:MHz
623:00
620:01
617:02
614:03
611:04
608:05
605:06
602:07
599:08
596:09
593:10
590:11
587:12
584:13
581:14
578:15
575:16
572:17
569:18
566:19
563:20
560:21
557:22
554:23
528:).
526:ICs
511:MCU
473:GTE
467:by
398:CEO
360:or
337:At
326:of
318:to
305:816
255:or
170:DIP
95:CPU
2535::
2436:,
2191:.
2173:.
2054:^
2036:.
2003:.
1973:.
1943:.
1872:^
1836:.
1800:.
1771:.
1672:SR
1663:.
1661:SR
1653:SP
1649:DP
1641:SR
1626:SR
1603:SR
1582:.
1544:SR
1531:.
1513:SR
1495:(e
1489:SR
1465:xx
1457:DP
1453:DP
1449:DP
1433:DP
1418:DB
1416:.
1414:DB
1410:DB
1406:DB
1404:,
1402:PB
1397:DB
1390:PB
1385:PB
1381:PC
1377:PC
1369:PB
1350:PB
1346:DB
1342:xx
1334:PB
1330:DB
1263:PC
1255:SP
1211:).
1129:,
1075:PB
1071:DB
1066:).
1064:DP
1059:).
1045:SP
1031:,
862:PC
857:PB
841:0
838:0
835:0
832:0
829:0
826:0
823:0
820:0
817:0
814:0
811:0
808:0
805:0
802:0
799:0
796:0
792:DB
773:SP
769:0
766:0
763:0
760:0
757:0
754:0
751:0
748:0
730:DP
726:0
723:0
720:0
717:0
714:0
711:0
708:0
705:0
501:,
475:,
471:,
425:20
415:10
301:65
296:.
152:92
2333:e
2326:t
2319:v
2226:.
2195:.
2177:.
2048:.
2019:.
1989:.
1959:.
1929:.
1855:.
1819:.
1783:.
1668:x
1657:m
1645:B
1637:m
1622:x
1615:C
1611:A
1607:B
1599:m
1595:B
1591:Y
1587:X
1576:Y
1572:X
1564:A
1560:B
1556:1
1552:x
1548:m
1540:x
1536:m
1509:c
1505:E
1501:C
1497:X
1485:m
1481:x
1477:e
1375:(
1328:(
1309:x
1305:m
1290:m
1286:x
1284:(
1278:m
1274:x
1270:b
1261:(
1253:(
1244:Y
1240:X
1236:A
1200:.
1192:(
1057:Y
1053:X
1051:(
1043:(
1037:C
1035:(
1024:.
986:A
983:”
958:P
953:e
942:P
936:c
931:z
926:i
921:d
916:x
911:m
906:v
901:n
883:C
879:P
875::
871:B
867:P
849:B
845:D
783:P
779:S
740:P
736:D
697:Y
691:Y
680:X
674:X
657:C
655:(
648:A
643:B
421:1
411:1
388:.
65:)
20:)
Text is available under the Creative Commons Attribution-ShareAlike License. Additional terms may apply.