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unprivileged partitions. The privileged partition can be defined as a protected partition. If content is highly popular, it is pushed into the privileged partition. Replacement of the privileged partition is done as follows: LFRU evicts content from the unprivileged partition, pushes content from privileged partition to unprivileged partition, and finally inserts new content into the privileged partition. In the above procedure the LRU is used for the privileged partition and an approximated LFU (ALFU) scheme is used for the unprivileged partition, hence the abbreviation LFRU. The basic idea is to filter out the locally popular contents with ALFU scheme and push the popular contents to one of the privileged partition.
993:
With write caches, a performance increase of writing a data item may be realized upon the first write of the data item by virtue of the data item immediately being stored in the cache's intermediate storage, deferring the transfer of the data item to its residing storage at a later stage or else occurring as a background process. Contrary to strict buffering, a caching process must adhere to a (potentially distributed) cache coherency protocol in order to maintain consistency between the cache's intermediate storage and the location where the data resides. Buffering, on the other hand,
263:
271:
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individual writes are deferred to a batch of writes is a form of buffering. The portion of a caching protocol where individual reads are deferred to a batch of reads is also a form of buffering, although this form may negatively impact the performance of at least the initial reads (even though it may positively impact the performance of the sum of the individual reads). In practice, caching almost always involves some form of buffering, while strict buffering does not involve caching.
1016:
order than that in which it is produced. Also, a whole buffer of data is usually transferred sequentially (for example to hard disk), so buffering itself sometimes increases transfer performance or reduces the variation or jitter of the transfer's latency as opposed to caching where the intent is to reduce the latency. These benefits are present even if the buffered data are written to the buffer once and read from the buffer once.
613:, to a network architecture in which the focal point is identified information. Due to the inherent caching capability of the nodes in an ICN, it can be viewed as a loosely connected network of caches, which has unique requirements for caching policies. However, ubiquitous content caching introduces the challenge to content protection against unauthorized access, which requires extra care and solutions.
933:
635:(CDNs) and distributed networks in general. TLRU introduces a new term: TTU (Time to Use). TTU is a time stamp of a content/page which stipulates the usability time for the content based on the locality of the content and the content publisher announcement. Owing to this locality based time stamp, TTU provides more control to the local administrator to regulate in network storage.
40:
849:. It provides a cache for frequently accessed data, providing high speed local access to frequently accessed data in the cloud storage service. Cloud storage gateways also provide additional benefits such as accessing cloud object storage through traditional file serving protocols as well as continued access to cached data during connectivity outages.
307:. For this reason, a read miss in a write-back cache will often require two memory backing store accesses to service: one for the write back, and one to retrieve the needed data. Other policies may also trigger data write-back. The client may make many changes to data in the cache, and then explicitly notify the cache to write back the data.
695:, which is an integrated part of the hard disk drive or solid state drive, is sometimes misleadingly referred to as "disk cache", its main functions are write sequencing and read prefetching. Repeated cache hits are relatively rare, due to the small size of the buffer in comparison to the drive's capacity. However, high-end
992:
With read caches, a data item must have been fetched from its residing location at least once in order for subsequent reads of the data item to realize a performance increase by virtue of being able to be fetched from the cache's (faster) intermediate storage rather than the data's residing location.
1019:
A cache also increases transfer performance. A part of the increase similarly comes from the possibility that multiple small transfers will combine into one large block. But the main performance-gain occurs because there is a good chance that the same data will be read from cache multiple times, or
988:
Fundamentally, caching realizes a performance increase for transfers of data that is being repeatedly transferred. While a caching system may realize a performance increase upon the initial (typically write) transfer of a data item, this performance increase is due to buffering occurring within the
616:
Unlike proxy servers, in ICN the cache is a network-level solution. Therefore, it has rapidly changing cache states and higher request arrival rates; moreover, smaller cache sizes impose different requirements on the content eviction policies. In particular, eviction policies for ICN should be fast
1007:
With typical caching implementations, a data item that is read or written for the first time is effectively being buffered; and in the case of a write, mostly realizing a performance increase for the application from where the write originated. Additionally, the portion of a caching protocol where
397:
go further—they not only read the data requested, but guess that the next chunk or two of data will soon be required, and so prefetch that data into the cache ahead of time. Anticipatory paging is especially helpful when the backing store has a long latency to read the first chunk and much shorter
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cannot directly address data stored in peripheral devices. Thus, addressable memory is used as an intermediate stage. Additionally, such a buffer may be feasible when a large block of data is assembled or disassembled (as required by a storage device), or when data may be delivered in a different
638:
In the TLRU algorithm, when a piece of content arrives, a cache node calculates the local TTU value based on the TTU value assigned by the content publisher. The local TTU value is calculated by using a locally defined function. Once the local TTU value is calculated the replacement of content is
161:
A larger resource incurs a significant latency for access – e.g. it can take hundreds of clock cycles for a modern 4 GHz processor to reach DRAM. This is mitigated by reading large chunks into the cache, in the hope that subsequent reads will be from nearby locations and can be read from the
385:
read the minimum amount from the backing store. A typical demand-paging virtual memory implementation reads one page of virtual memory (often 4 KB) from disk into the disk cache in RAM. A typical CPU reads a single L2 cache line of 128 bytes from DRAM into the L2 cache, and a single L1
818:
CDNs began in the late 1990s as a way to speed up the delivery of static content, such as HTML pages, images and videos. By replicating content on multiple servers around the world and delivering it to users based on their location, CDNs can significantly improve the speed and availability of a
660:
servers; two requests within the same park would generate separate requests. An optimization by edge-servers to truncate the GPS coordinates to fewer decimal places meant that the cached results from the earlier query would be used. The number of to-the-server lookups per day dropped by half.
647:
The Least
Frequent Recently Used (LFRU) cache replacement scheme combines the benefits of LFU and LRU schemes. LFRU is suitable for 'in network' cache applications, such as ICN, CDNs and distributed networks in general. In LFRU, the cache is divided into two partitions called privileged and
868:
Write-through operation is common when operating over unreliable networks (like an
Ethernet LAN), because of the enormous complexity of the coherency protocol required between multiple write-back caches when communication is unreliable. For instance, web page caches and
169:
The use of a cache also allows for higher throughput from the underlying resource, by assembling multiple fine-grain transfers into larger, more efficient requests. In the case of DRAM circuits, the additional throughput may be gained by using a wider data bus.
748:. Web caches reduce the amount of information that needs to be transmitted across the network, as information previously stored in the cache can often be re-used. This reduces bandwidth and processing requirements of the web server, and helps to improve
99:
occurs when it cannot. Cache hits are served by reading data from the cache, which is faster than recomputing a result or reading from a slower data store; thus, the more requests that can be served from the cache, the faster the system performs.
254:. One popular replacement policy, least recently used (LRU), replaces the oldest entry, the entry that was accessed less recently than any other entry. More sophisticated caching algorithms also take into account the frequency of use of entries.
78:
220:) needs to access data presumed to exist in the backing store, it first checks the cache. If an entry can be found with a tag matching that of the desired data, the data in the entry is used instead. This situation is known as a
814:
A content delivery network (CDN) is a network of distributed servers that deliver pages and other Web content to a user, based on the geographic locations of the user, the origin of the web page and the content delivery server.
91:) is a hardware or software component that stores data so that future requests for that data can be served faster; the data stored in a cache might be the result of an earlier computation or a copy of data stored elsewhere. A
354:. Alternatively, when the client updates the data in the cache, copies of those data in other caches will become stale. Communication protocols between the cache managers that keep the data consistent are associated with
630:
The Time aware Least
Recently Used (TLRU) is a variant of LRU designed for the situation where the stored contents in cache have a valid life time. The algorithm is suitable in network cache applications, such as ICN,
111:. Such access patterns exhibit temporal locality, where data is requested that has been recently requested, and spatial locality, where data is requested that is stored near data that has already been requested.
819:
website or application. When a user requests a piece of content, the CDN will check to see if it has a copy of the content in its cache. If it does, the CDN will deliver the content to the user from the cache.
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that always pre-loads the entire executable into RAM. A few caches go even further, not only pre-loading an entire file, but also starting to load other related files that may soon be requested, such as the
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applications are stored in an ISP cache to accelerate P2P transfers. Similarly, decentralised equivalents exist, which allow communities to perform the same task for P2P traffic, for example, Corelli.
119:
In memory design, there is an inherent trade-off between capacity and speed because larger capacity implies larger size and thus greater physical distances for signals to travel causing
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The semantics of a "buffer" and a "cache" are not totally different; even so, there are fundamental differences in intent between the process of caching and the process of buffering.
997:
reduces the number of transfers for otherwise novel data amongst communicating processes, which amortizes overhead involved for several small transfers over fewer, larger transfers,
517:
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for later writing to the backing store. The data in these locations are written back to the backing store only when they are evicted from the cache, a process referred to as a
243:. This requires a more expensive access of data from the backing store. Once the requested data is retrieved, it is typically copied into the cache, ready for the next access.
335:): data at the missed-write location is not loaded to cache, and is written directly to the backing store. In this approach, data is loaded into the cache on read misses only.
1609:"Globally Distributed Content Delivery, by J. Dilley, B. Maggs, J. Parikh, H. Prokop, R. Sitaraman and B. Weihl, IEEE Internet Computing, Volume 6, Issue 5, November 2002"
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performed on a subset of the total content stored in cache node. The TLRU ensures that less popular and small life content should be replaced with the incoming content.
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uses networked hosts to provide scalability, reliability and performance to the application. The hosts can be co-located or spread over different geographical regions.
278:
When a system writes data to cache, it must at some point write that data to the backing store as well. The timing of this write is controlled by what is known as the
295:: initially, writing is done only to the cache. The write to the backing store is postponed until the modified content is about to be replaced by another cache block.
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310:
Since no data is returned to the requester on write operations, a decision needs to be made whether or not data would be loaded into the cache on write misses.
346:
A write-through cache uses no-write allocate. Here, subsequent writes have no advantage, since they still need to be written directly to the backing store.
894:
provides a "Cached" link next to each search result. This can prove useful when web pages from a web server are temporarily or permanently inaccessible.
228:. In this example, the URL is the tag, and the content of the web page is the data. The percentage of accesses that result in cache hits is known as the
702:
Finally, a fast local hard disk drive can also cache information held on even slower data storage devices, such as remote servers (web cache) or local
321:): data at the missed-write location is loaded to cache, followed by a write-hit operation. In this approach, write misses are similar to read misses.
1615:
224:. For example, a web browser program might check its local cache on disk to see if it has a local copy of the contents of a web page at a particular
166:
can be used to guess where future reads will come from and make requests ahead of time; if done optimally, the latency is bypassed altogether.
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that written data will soon be read. A cache's sole purpose is to reduce accesses to the underlying slower storage. Cache is also usually an
246:
During a cache miss, some other previously existing cache entry is typically removed in order to make room for the newly retrieved data. The
513:
was not used. Caching was important to leverage 32-bit (and wider) transfers for texture data that was often as little as 4 bits per pixel.
714:. Also, fast flash-based solid-state drives (SSDs) can be used as caches for slower rotational-media hard disk drives, working together as
581:
A memory management unit (MMU) that fetches page table entries from main memory has a specialized cache, used for recording the results of
1307:"Intel Broadwell Core i7 5775C '128MB L4 Cache' Gaming Behemoth and Skylake Core i7 6700K Flagship Processors Finally Available In Retail"
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A write-back cache is more complex to implement since it needs to track which of its locations have been written over and mark them as
950:
350:
Entities other than the cache may change the data in the backing store, in which case the copy in the cache may become out-of-date or
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and lightweight. Various cache replication and eviction schemes for different ICN architectures and applications have been proposed.
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To be cost-effective, caches must be relatively small. Nevertheless, caches are effective in many areas of computing because typical
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1110:
972:
84:
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Bilal, Muhammad; et al. (2017). "A Cache
Management Scheme for Efficient Content Eviction and Replication in Cache Networks".
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within a lookup table, allowing subsequent calls to reuse the stored results and avoid repeated computation. It is related to the
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may have as many as six types of cache (between levels and functions). Some examples of caches with a specific function are the
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711:
343:
A write-back cache uses write allocate, hoping for subsequent writes (or even reads) to the same location, which is now cached.
759:(ISPs) or organizations also use a caching proxy server, which is a web cache that is shared among all users of that network.
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ensures a minimum data size or representation required by at least one of the communicating processes involved in a transfer.
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The alternative situation, when the cache is checked and found not to contain any entry with the desired tag, is known as a
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Mentions L4 cache. Combined with separate I-Cache and TLB, this brings the total 'number of caches (levels+functions) to 6.
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Both write-through and write-back policies can use either of these write-miss policies, but usually they are paired.
1741:
1365:
Bilal, Muhammad; et al. (2019). "Secure
Distribution of Protected Content in Information-Centric Networking".
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provides an intermediary for communicating processes which are incapable of direct transfers amongst each other, or
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While CPU caches are generally managed entirely by hardware, a variety of software manages other caches. The
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1608:
1267:"Survey of CPU Cache-Based Side-Channel Attacks: Systematic Analysis, Security Models, and Countermeasures"
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884:) are typically read-only or write-through specifically to keep the network protocol simple and reliable.
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33:
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Corelli: A Dynamic
Replication Service for Supporting Latency-Dependent Content in Community Networks
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1142:"Cache hit ratio maximization in device-to-device communications overlaying cellular networks"
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A cache can store data that is computed on demand rather than retrieved from a backing store.
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552:
525:
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213:, which specifies the identity of the data in the backing store of which the entry is a copy.
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532:, exhibiting functionality commonly found in CPU caches. These caches have grown to handle
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also frequently make web pages they have indexed available from their cache. For example,
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infrastructure away from a host-centric paradigm, based on perpetual connectivity and the
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1422:. 16th International Conference on Advanced Communication Technology. pp. 528–532.
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in main memory, which is an example of disk cache, is managed by the operating system
524:, they have developed progressively larger and increasingly general caches, including
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Paul, S.; Fei, Z. (1 February 2001). "Distributed caching with centralized control".
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translations. This specialized cache is called a translation lookaside buffer (TLB).
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Zhong, Liang; Zheng, Xueqian; Liu, Yong; Wang, Mengting; Cao, Yang (February 2020).
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In 2011, the use of smartphones with weather forecasting options was overly taxing
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algorithm design methodology, which can also be thought of as a means of caching.
190:(SSDs) and hard disk drives (HDDs) frequently include hardware-based cache, while
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A buffer is a temporary memory location that is traditionally used because CPU
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300 million to 500 million fewer requests a day handled by AccuWeather servers
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Small memories on or close to the CPU can operate faster than the much larger
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Tyson, Gareth; Mauthe, Andreas; Kaune, Sebastian; Mu, Mu; Plagemann, Thomas.
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that is designed to be invisible from the perspective of neighboring layers.
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often have their own on-board cache of the hard disk drive's data blocks.
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741:
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289:: write is done synchronously both to the cache and to the backing store.
123:. There is also a tradeoff between high-performance technologies such as
740:
employ web caches to store previous responses from web servers, such as
39:
957: in this section. Unsourced material may be challenged and removed.
470:
466:
1265:
Su, Chao; Zeng, Qingkai (10 June 2021). Nicopolitidis, Petros (ed.).
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529:
449:. Most CPUs since the 1980s have used one or more caches, sometimes
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A cache is made up of a pool of entries. Each entry has associated
1420:
Time Aware Least Recent Used (TLRU) cache management policy in ICN
38:
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cache line of 64 bytes from the L2 cache into the L1 cache.
182:
of memory for temporary storage of data likely to be used again.
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have similarly generalized over the years. Earlier designs used
128:
95:
occurs when the requested data can be found in a cache, while a
926:
225:
1530:
Murphy, Chris (30 May 2011). "5 Lines Of Code In The Cloud".
27:
Additional storage that enables faster access to main storage
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A cloud storage gateway, also known as an edge filer, is a
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often include a very similar set of caches to a CPU (e.g.
67:
64:
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technique that stores the results of resource-consuming
398:
times to sequentially read the next few chunks, such as
518:
general-purpose computing on graphics processing units
127:
and cheaper, easily mass-produced commodities such as
85:
61:
837:
device that connects a local network to one or more
250:
used to select the entry to replace is known as the
755:Web browsers employ a built-in web cache, but some
1722:"What Every Programmer Should Know About Memory"
1697:"Distributed Caching on the Path To Scalability"
374:Memory paging § Page replacement techniques
1240:Patterson, David A.; Hennessy, John L. (1990).
1213:Hennessy, John L.; Patterson, David A. (2011).
904:applications, for example in the processing of
567:with shared L2, split L1 I-cache and D-cache).
1216:Computer Architecture: A Quantitative Approach
509:would drastically affect performance, e.g. if
266:A write-through cache without write allocation
32:"Caching" redirects here. For other uses, see
1242:Computer Architecture A Quantitative Approach
8:
900:can substantially improve the throughput of
146:provided by a cache benefits one or both of
1244:. Morgan Kaufmann Publishers. p. 413.
861:daemon caches a mapping of domain names to
216:When the cache client (a CPU, web browser,
205:, which is a copy of the same data in some
405:A few operating systems go further with a
282:. There are two basic writing approaches:
1671:
1490:
1427:
1378:
1282:
973:Learn how and when to remove this message
1727:"Caching in the Distributed Environment"
1418:Bilal, Muhammad; Kang, Shin-Gak (2014).
1344:CSE 120: Principles of Operating Systems
274:A write-back cache with write allocation
269:
261:
1102:
912:, and frequently used subsets of data.
710:; such a scheme is the main concept of
43:Diagram of a CPU memory cache operation
540:, and interface with a CPU-style MMU.
766:, where the files most sought for by
626:Time aware least recently used (TLRU)
7:
955:adding citations to reliable sources
378:On a cache read miss, caches with a
1641:"Definition: cloud storage gateway"
1271:Security and Communication Networks
1187:Bottomley, James (1 January 2004).
643:Least frequent recently used (LFRU)
605:(ICN) is an approach to evolve the
493:(GPUs) often had limited read-only
198:commonly rely on software caching.
1621:from the original on 9 August 2017
1322:"qualcom Hexagon DSP SDK overview"
107:access data with a high degree of
25:
931:
57:
942:needs additional citations for
712:hierarchical storage management
178:Hardware implements cache as a
1337:"Lecture 7: Memory Management"
865:, as does a resolver library.
603:Information-centric networking
598:Information-centric networking
162:cache. Prediction or explicit
1:
1682:10.1016/S0140-3664(00)00322-4
565:Modified Harvard architecture
516:As GPUs advanced, supporting
577:Translation lookaside buffer
571:Translation lookaside buffer
475:translation lookaside buffer
1509:10.1109/ACCESS.2017.2669344
430:Examples of hardware caches
1763:
1446:10.1109/ICACT.2014.6779016
1397:10.1109/JSYST.2019.2931813
1219:. Elsevier. p. B–12.
826:
807:
777:
757:Internet service providers
729:
673:
574:
559:, but modern DSPs such as
534:synchronization primitives
438:
395:anticipatory paging policy
371:
365:
31:
1695:Khan, Iqbal (July 2009).
1590:. MMCN'09. Archived from
1552:"Web application caching"
1045:Cache-oblivious algorithm
762:Another form of cache is
720:solid-state hybrid drives
633:content delivery networks
549:Digital signal processors
491:graphics processing units
1158:10.23919/jcc.2020.02.018
810:Content delivery network
804:Content delivery network
209:. Each entry also has a
184:Central processing units
1660:Computer Communications
1189:"Understanding Caching"
1060:Cache manifest in HTML5
876:caches (like those in
839:cloud storage services
752:for users of the web.
479:memory management unit
275:
267:
44:
34:Cache (disambiguation)
1747:Computer architecture
829:Cloud storage gateway
823:Cloud storage gateway
503:locality of reference
372:Further information:
273:
265:
109:locality of reference
105:computer applications
42:
1367:IEEE Systems Journal
1335:Frank Uyeda (2009).
1309:. 25 September 2015.
1284:10.1155/2021/5559552
1146:China Communications
1085:Pipeline burst cache
1055:Cache language model
951:improve this article
835:hybrid cloud storage
611:end-to-end principle
557:direct memory access
536:between threads and
391:prefetch input queue
1562:on 12 December 2019
1501:2017arXiv170204078B
1438:2018arXiv180100390B
1389:2020ISysJ..14.1921B
1115:Oxford Dictionaries
874:network file system
798:dynamic programming
526:instruction caches
453:; modern high-end
451:in cascaded levels
414:associated with a
276:
268:
252:replacement policy
188:solid-state drives
121:propagation delays
45:
1742:Cache (computing)
1550:Multiple (wiki).
1455:978-89-968650-3-2
1226:978-0-12-383872-8
1121:on 18 August 2012
1075:Materialized view
1022:abstraction layer
983:
982:
975:
917:distributed cache
910:data dictionaries
845:services such as
738:web proxy servers
736:Web browsers and
708:optical jukeboxes
553:scratchpad memory
538:atomic operations
368:Cache prefetching
329:write-no-allocate
325:No-write allocate
16:(Redirected from
1754:
1709:
1708:
1692:
1686:
1685:
1675:
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1649:
1648:
1637:
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1613:
1605:
1599:
1598:
1597:on 18 June 2015.
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1589:
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1571:
1569:
1567:
1558:. Archived from
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1199:
1184:
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1177:
1137:
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1128:
1126:
1117:. Archived from
1107:
1080:Memory hierarchy
1070:Five-minute rule
989:caching system.
978:
971:
967:
964:
958:
935:
927:
923:Buffer vs. cache
898:Database caching
697:disk controllers
652:Weather forecast
593:In-network cache
587:physical address
561:Qualcomm Hexagon
424:link prefetching
422:associated with
393:or more general
258:Writing policies
218:operating system
88:
83:
82:
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63:
21:
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1718:
1716:Further reading
1713:
1712:
1694:
1693:
1689:
1657:
1656:
1652:
1639:
1638:
1634:
1624:
1622:
1618:
1611:
1607:
1606:
1602:
1594:
1587:
1580:
1579:
1575:
1565:
1563:
1549:
1548:
1544:
1533:InformationWeek
1529:
1528:
1524:
1476:
1475:
1471:
1456:
1417:
1416:
1412:
1364:
1363:
1359:
1349:
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1339:
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1300:
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1234:
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1186:
1185:
1181:
1139:
1138:
1134:
1124:
1122:
1109:
1108:
1104:
1099:
1094:
1040:Cache hierarchy
1030:
979:
968:
962:
959:
948:
936:
925:
855:
831:
825:
812:
806:
782:
776:
734:
728:
678:
672:
667:
665:Software caches
654:
645:
628:
623:
600:
595:
583:virtual address
579:
573:
546:
522:compute kernels
487:
463:microprocessors
443:
437:
432:
376:
370:
364:
356:cache coherence
260:
176:
117:
86:
77:
76:
75:
60:
56:
37:
28:
23:
22:
15:
12:
11:
5:
1760:
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1730:
1729:
1724:
1717:
1714:
1711:
1710:
1687:
1673:10.1.1.38.1094
1666:(2): 256–268.
1650:
1632:
1600:
1573:
1542:
1536:. p. 28.
1522:
1469:
1454:
1410:
1357:
1346:. UC San Diego
1327:
1313:
1298:
1257:
1250:
1232:
1225:
1205:
1179:
1152:(2): 232–238.
1132:
1101:
1100:
1098:
1095:
1093:
1092:
1090:Temporary file
1087:
1082:
1077:
1072:
1067:
1062:
1057:
1052:
1050:Cache stampede
1047:
1042:
1037:
1035:Cache coloring
1031:
1029:
1026:
1005:
1004:
1001:
998:
981:
980:
939:
937:
930:
924:
921:
888:Search engines
854:
851:
843:object storage
827:Main article:
824:
821:
808:Main article:
805:
802:
794:function calls
778:Main article:
775:
772:
750:responsiveness
730:Main article:
727:
724:
674:Main article:
671:
668:
666:
663:
653:
650:
644:
641:
627:
624:
622:
619:
599:
596:
594:
591:
575:Main article:
572:
569:
545:
542:
501:to improve 2D
495:texture caches
486:
483:
439:Main article:
436:
433:
431:
428:
389:Caches with a
366:Main article:
363:
360:
348:
347:
344:
337:
336:
322:
319:fetch on write
315:Write allocate
297:
296:
290:
259:
256:
236:of the cache.
175:
172:
116:
113:
26:
24:
14:
13:
10:
9:
6:
4:
3:
2:
1759:
1748:
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1743:
1740:
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1737:
1728:
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1691:
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1679:
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1651:
1646:
1645:SearchStorage
1642:
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1610:
1604:
1601:
1593:
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1585:
1577:
1574:
1561:
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1553:
1546:
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1535:
1534:
1526:
1523:
1518:
1514:
1510:
1506:
1502:
1498:
1493:
1488:
1485:: 1692–1701.
1484:
1480:
1473:
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1461:
1457:
1451:
1447:
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1261:
1258:
1253:
1251:1-55860-069-8
1247:
1243:
1236:
1233:
1228:
1222:
1218:
1217:
1209:
1206:
1194:
1193:Linux Journal
1190:
1183:
1180:
1175:
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1163:
1159:
1155:
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1143:
1136:
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1120:
1116:
1112:
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1103:
1096:
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1088:
1086:
1083:
1081:
1078:
1076:
1073:
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1066:
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1017:
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1009:
1002:
999:
996:
995:
994:
990:
986:
977:
974:
966:
956:
952:
946:
945:
940:This section
938:
934:
929:
928:
922:
920:
918:
913:
911:
907:
903:
899:
895:
893:
889:
885:
883:
879:
875:
872:
866:
864:
860:
852:
850:
848:
844:
840:
836:
830:
822:
820:
816:
811:
803:
801:
799:
795:
791:
787:
781:
773:
771:
769:
765:
760:
758:
753:
751:
747:
743:
739:
733:
725:
723:
721:
717:
716:hybrid drives
713:
709:
705:
700:
698:
694:
689:
687:
683:
677:
669:
664:
662:
659:
651:
649:
642:
640:
636:
634:
625:
620:
618:
614:
612:
608:
604:
597:
592:
590:
588:
584:
578:
570:
568:
566:
562:
558:
554:
550:
543:
541:
539:
535:
531:
527:
523:
519:
514:
512:
508:
504:
500:
496:
492:
484:
482:
480:
476:
472:
468:
464:
460:
456:
452:
448:
442:
434:
429:
427:
425:
421:
417:
413:
408:
403:
401:
396:
392:
387:
384:
382:
381:demand paging
375:
369:
361:
359:
357:
353:
345:
342:
341:
340:
334:
330:
327:(also called
326:
323:
320:
317:(also called
316:
313:
312:
311:
308:
306:
302:
294:
291:
288:
287:Write-through
285:
284:
283:
281:
272:
264:
257:
255:
253:
249:
244:
242:
237:
235:
231:
227:
223:
219:
214:
212:
208:
207:backing store
204:
199:
197:
193:
189:
185:
181:
173:
171:
167:
165:
159:
157:
153:
149:
145:
140:
138:
134:
130:
126:
122:
114:
112:
110:
106:
101:
98:
94:
90:
89:
79:
72:
54:
50:
41:
35:
30:
19:
1704:
1700:
1690:
1663:
1659:
1653:
1647:. July 2014.
1644:
1635:
1623:. Retrieved
1603:
1592:the original
1583:
1576:
1564:. Retrieved
1560:the original
1555:
1545:
1537:
1531:
1525:
1482:
1478:
1472:
1419:
1413:
1370:
1366:
1360:
1348:. Retrieved
1343:
1330:
1316:
1301:
1274:
1270:
1260:
1241:
1235:
1215:
1208:
1196:. Retrieved
1192:
1182:
1149:
1145:
1135:
1123:. Retrieved
1119:the original
1114:
1105:
1018:
1013:instructions
1010:
1006:
991:
987:
984:
969:
960:
949:Please help
944:verification
941:
914:
896:
886:
867:
863:IP addresses
856:
853:Other caches
841:, typically
832:
817:
813:
790:optimization
783:
768:peer-to-peer
761:
754:
735:
701:
690:
679:
655:
646:
637:
629:
615:
601:
580:
547:
515:
507:Cache misses
488:
444:
404:
400:disk storage
394:
388:
379:
377:
351:
349:
338:
333:write around
332:
328:
324:
318:
314:
309:
304:
300:
298:
292:
286:
280:write policy
279:
277:
245:
240:
238:
233:
229:
221:
215:
210:
206:
202:
200:
192:web browsers
177:
168:
160:
141:
118:
102:
96:
92:
52:
46:
29:
18:Memory cache
1479:IEEE Access
1373:(2): 1–12.
871:client-side
786:Memoization
780:Memoization
774:Memoization
764:P2P caching
704:tape drives
693:disk buffer
658:AccuWeather
461:and server
447:main memory
196:web servers
164:prefetching
1736:Categories
1625:25 October
1492:1702.04078
1429:1801.00390
1380:1907.11717
1350:4 December
1097:References
691:While the
682:page cache
676:Page cache
670:Disk cache
511:mipmapping
416:prefetcher
412:page cache
402:and DRAM.
305:lazy write
293:Write-back
241:cache miss
152:throughput
137:hard disks
115:Motivation
97:cache miss
1668:CiteSeerX
1405:198967720
1293:1939-0122
1198:1 October
1174:212649328
1166:1673-5447
1065:Dirty bit
963:June 2021
857:The BIND
847:Amazon S3
742:web pages
732:Web cache
726:Web cache
722:(SSHDs).
499:swizzling
497:and used
485:GPU cache
441:CPU cache
435:CPU cache
420:web cache
248:heuristic
234:hit ratio
222:cache hit
174:Operation
156:bandwidth
144:buffering
93:cache hit
49:computing
1616:Archived
1556:Docforge
1517:14517299
1277:: 1–15.
1125:2 August
1028:See also
902:database
621:Policies
607:Internet
489:Earlier
477:for the
473:and the
455:embedded
362:Prefetch
230:hit rate
186:(CPUs),
1566:24 July
1497:Bibcode
1434:Bibcode
1385:Bibcode
1111:"Cache"
906:indexes
555:fed by
530:shaders
481:(MMU).
471:I-cache
467:D-cache
459:desktop
418:or the
148:latency
1670:
1515:
1464:830503
1462:
1452:
1403:
1291:
1248:
1223:
1172:
1164:
892:Google
788:is an
746:images
686:kernel
407:loader
383:policy
1619:(PDF)
1612:(PDF)
1595:(PDF)
1588:(PDF)
1513:S2CID
1487:arXiv
1460:S2CID
1424:arXiv
1401:S2CID
1375:arXiv
1340:(PDF)
1170:S2CID
352:stale
301:dirty
180:block
135:, or
133:flash
74:
53:cache
1707:(7).
1701:MSDN
1627:2019
1568:2013
1450:ISBN
1352:2013
1289:ISSN
1275:2021
1246:ISBN
1221:ISBN
1200:2019
1162:ISSN
1127:2016
744:and
544:DSPs
528:for
520:and
203:data
194:and
150:and
142:The
129:DRAM
125:SRAM
87:KASH
51:, a
1678:doi
1505:doi
1442:doi
1393:doi
1279:doi
1154:doi
953:by
882:SMB
880:or
878:NFS
859:DNS
718:or
706:or
585:to
331:or
232:or
226:URL
211:tag
158:).
47:In
1738::
1705:24
1703:.
1699:.
1676:.
1664:24
1662:.
1643:.
1614:.
1554:.
1511:.
1503:.
1495:.
1481:.
1458:.
1448:.
1440:.
1432:.
1399:.
1391:.
1383:.
1371:14
1369:.
1342:.
1287:.
1273:.
1269:.
1191:.
1168:.
1160:.
1150:17
1148:.
1144:.
1113:.
915:A
908:,
688:.
505:.
469:,
457:,
426:.
358:.
139:.
131:,
1684:.
1680::
1629:.
1570:.
1519:.
1507::
1499::
1489::
1483:5
1466:.
1444::
1436::
1426::
1407:.
1395::
1387::
1377::
1354:.
1324:.
1295:.
1281::
1254:.
1229:.
1202:.
1176:.
1156::
1129:.
976:)
970:(
965:)
961:(
947:.
154:(
71:/
68:ʃ
65:æ
62:k
59:/
55:(
36:.
20:)
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