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were received from the memory or the general purpose registers over the DAL bus, which is also used to write back results. It consisted of 29,600 transistors on a 341 mil by 288 mil die (8.66 mm by 7.32 mm) for an area of 98,208 mil (63.36 mm). It dissipated 2.5 W.
127:
The chips in the chip set were connected with four buses: the MIB, DAL, PAL and CAL. The MIB (microinstruction bus) carried microinstructions control signals and addresses from the control store to the I/E and F chips. The MIB is 40 bits wide, the same width as a microword and is
119:
The V-11 was a multichip design, mainly consisting of an I/E chip, a M chip, a F chip and five ROM/RAM chips. Unlike the MicroVAX 78032, which implemented a subset of VAX ISA, the V-11 was a complete VAX implementation, supporting all of the 304 instructions and 17
124:(byte, word, longword, quadword, octaword, F-floating, D-floating, G-floating, H-floating, bit, variable-length bit field, character string, trailing numeric string, leading separate numeric string, packed decimal string, absolute queue, and self-relative queue).
156:(CAM). The ROM contained the control store, with the RAM used to hold control store patches. The ROM/RAM consisted of 208,000 transistors on a die measuring 344 mils by 285 mils (8.74 mm by 7.24 mm) for an area of 98,040 mil (63.25 mm). It dissipated 1 W.
59:
held in 1984 alongside the MicroVAX 78032 and was introduced in early 1986 in systems, operating at 5 MHz (200 ns cycle time) and in 1987 at 6.25 MHz (160 ns cycle time). The V-11 was proprietary to DEC and was only used in their
207:(TLB). It contained five page table entries (PTEs), one for instruction and four for data. In the event of a miss, the backup translation buffer (BTB) in the M chip is used. The I/E chip consisted of 60,000 transistors on a
223:
and interrupt handling. It contained the backup translation buffer (BTB) tags, cache tags and internal processor registers. The M chip also contained the I/O functionality defined by the VAX architecture and generated the
292:. The F chip was supposed to be a completely new design developed for the V-11, but was cancelled in favor of a derivative as part of an effort to simplify the V-11 so it could be completed quicker as development of the
194:
instructions. It improved performance by maintaining a number of instructions ready for execution. The hardware attempted to keep the instruction buffer full at all times. The execution unit consisted of sixteen 32-bit
239:(PTEs), of which 256 were for system-space pages and 256 were for process-space pages. There are 128 BTB tags, one for every four PTEs, located in the M chip. The BTB was implemented with external RAMs.
245:
The M chip consisted of 54,000 transistors on a die measuring 339 mil by 332 mil (8.61 mm by 8.43 mm) for an area of 112,548 mil (72.61 mm). It dissipated 3 W.
410:
132:
protected. The DAL is a 32-bit parity-protected bus that carries data and addresses to and from the I/E, M and F chips, cache, backup translation buffer RAMs and the port interface.
111:(CAD) suite and semiconductor process, the results of which are CHAS and ZMOS, respectively. ZMOS was the first semiconductor process to be developed entirely by DEC.
242:
There are 26 internal processor registers, which are used by the microcode for temporary storage when executing complex instructions requiring multiple cycles.
56:
403:
328:
process with two levels of interconnect. (The 'Z' in the name was chosen because it looked like a '2' -- having 2 layers of metal was notable.)
211:
measuring 354 mils by 358 mils (8.99 mm by 9.09 mm) for an area of 126,732 mil (81.76 mm). It dissipated 5 W.
1331:
1321:
396:
1019:
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package. The package provided the complete control store as a unit for the processor; each of the five DC327 had different ROM contents.
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defined in the VAX architecture and was also responsible for executing integer divide and multiply instructions. The F chip received
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The V-11 was part of the
Scorpio program, which aimed at providing DEC with the ability to develop and fabricate
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and a mini-translation buffer (MTB). The instruction buffer is a two-entry 32-bit buffer that held
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Five DC327 chips were mounted on a common ceramic carrier in a very characteristic, overly wide
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The V-11 was
Digital's first VAX microprocessor design, but was the second to ship, after the
1103:
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145:
20:
A KA820-AA CPU module from a VAX 8200 minicomputer containing a V-11 microprocessor chip set
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96:. At 6.25 MHz, it performed approximately 1.2 times faster than the VAX-11/780.
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from the I/E chip and microinstructions from the control store over the MIB bus.
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The V-11 chip set contained a total of 1,183,600 transistors spread over nine
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341:, Third Edition, April 1987". EK-KA820-TM-003. Digital Equipment Corporation.
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28:, code-named "Scorpio", is a miniprocessor chip set implementation of the
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107:(ICs). Other aspects of the program were the development of a new
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257:(FPU). It supported most VAX floating-point instructions and the
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The ROM/RAM chip (DC327) implemented one-fifth of the patchable
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Johnson, W.N.; Herrick, W.V.; Grundmann, W.J. (October 1984).
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The F chip was a derivative of the FPA, which belonged to the
29:
235:(TLB) which handled a miss in the MTB. The BTB contained 512
89:
At 5 MHz, the V-11 performed approximately the same as the
182:
The I/E chip (DC328) contained an instruction buffer, a
308:. The cache was physically addressed and has a 64-byte
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288:microprocessor chip set, an implementation of the
384:"V-11" at The Computer History Simulation Project
231:The backup translation buffer was essentially a
324:fabricated in Digital's ZMOS process, a 3.0 Ξm
404:
57:International Solid State Circuits Conference
8:
483:
461:
411:
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144:. It contained a 16,384 by 8-bit (16 KB)
219:The M chip (DC329) was responsible for
339:KA820/KA825 Processor Technical Manual
7:
1327:
1020:Digital Storage Systems Interconnect
357:IEEE Journal of Solid-State Circuits
1094:Dynamically Redefined Character Set
1040:Synchronous Backplane Interconnect
203:(ALU) and a shifter. The MTB is a
14:
1326:
1317:
1316:
1307:
1306:
371:ISSCC Digest of Technical Papers
1234:Maintenance Operations Protocol
253:The F chip (DC330) contained a
148:(ROM), a 1,024 by 8-bit (1 KB)
55:. It was presented at the 39th
367:"A VLSI superminicomputer CPU"
304:The V-11 has an external 8 KB
1:
1124:Mass Storage Control Protocol
420:Digital Equipment Corporation
365:Johnson, W. (February 1984).
41:Digital Equipment Corporation
1214:Digital Federal Credit Union
436:(founder and CEO, 1957â1992)
233:translation lookaside buffer
205:translation lookaside buffer
101:very-large-scale integration
33:instruction set architecture
1258:Sequence and Batch Language
1219:Dynamic debugging technique
199:defined by the VAX ISA, an
1374:
1249:Record Management Services
1035:Standard Disk Interconnect
154:content-addressable memory
1302:
1283:The Ultimate Entrepreneur
459:
197:general purpose registers
946:DIGITAL Command Language
1272:Systems Research Center
1267:System Reference Manual
178:of V-11 I/E DC328 chips
152:RAM and a 32 by 14-bit
1358:32-bit microprocessors
1239:On-line Debugging Tool
179:
21:
353:"A VLSI VAX chip set"
201:arithmetic logic unit
174:
109:computer-aided design
19:
1229:Local Area Transport
987:National Replacement
150:random-access memory
35:(ISA) developed and
1353:DEC microprocessors
1089:Digital Linear Tape
448:(VP of engineering)
362:(5): 663–674.
255:floating-point unit
176:Semiconductor wafer
105:integrated circuits
1312:Computers template
237:page table entries
228:for the chip set.
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22:
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221:memory management
94:superminicomputer
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1104:Flip-Chip module
997:Special Graphics
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454:(CEO, 1992â1998)
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373:: 174–175.
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146:read-only memory
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966:(Multinational)
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472:Instruction set
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440:Harlan Anderson
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346:Further reading
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1168:Related topics
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294:MicroVAX 78032
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188:execution unit
184:microsequencer
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474:architectures
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452:Robert Palmer
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77:minicomputers
75:
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34:
31:
27:
18:
1281:
1189:
1149:Star coupler
1045:TURBOchannel
891:Digital UNIX
524:
442:(co-founder)
370:
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356:
338:
319:
303:
283:
252:
244:
241:
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226:clock signal
218:
181:
158:
139:
136:ROM/RAM chip
126:
118:
98:
88:
50:
25:
23:
901:Programming
614:Alpha 21464
609:Alpha 21364
604:Alpha 21264
594:Alpha 21164
577:Alpha 21064
446:Gordon Bell
310:cache block
296:had begun.
115:Description
84:workstation
1347:Categories
1207:HP-Interex
630:MicroPRISM
479:processors
427:Key people
332:References
270:data types
267:g_floating
263:d_floating
259:f_floating
192:prefetched
122:data types
91:VAX-11/780
79:; and the
37:fabricated
1180:AltaVista
1084:DECwriter
1055:VAXBI bus
1002:Technical
978:(Turkish)
941:VAX MACRO
903:languages
789:Operating
671:VT50/VT52
651:terminals
635:StrongARM
434:Ken Olsen
1322:Category
1191:CPU Wars
1109:Gold key
1066:hardware
992:RADIX 50
931:MACRO-11
926:MACRO-10
649:Computer
316:Physical
278:Operands
167:I/E chip
74:VAX 8350
70:VAX 8300
66:VAX 8250
62:VAX 8200
1332:Commons
1244:PALcode
1129:PALcode
1099:Firefly
1079:DECtape
1074:DECtalk
1025:Massbus
972:(Greek)
911:BASIC-8
871:VAX/VMS
866:TOPS-20
814:TOPS-10
791:systems
598:21164PC
274:opcodes
103:(VLSI)
47:History
43:(DEC).
1277:TD/SMP
1197:DECnet
1185:Compaq
1064:Other
1050:Unibus
982:Hebrew
881:Ultrix
876:VAXELN
861:DSM-11
849:RSX-11
844:RSTS/E
834:DOS-11
819:RSX-15
804:4K DMS
799:DECsys
775:(1994)
769:(1993)
763:(1990)
761:VT1000
757:(1990)
741:(1987)
725:(1983)
689:(1978)
673:(1975)
667:(1972)
661:(1970)
552:Mariah
495:LSI-11
488:PDP-11
290:PDP-11
249:F chip
215:M chip
130:parity
1294:WPS-8
1289:VT640
1262:Sixel
1254:ReGIS
1224:FX!32
1202:DECUS
1175:AdvFS
1119:LK421
1114:LK201
1030:Q-Bus
936:MUMPS
921:FOCAL
916:DIBOL
839:RT-11
824:TSS/8
779:VT525
773:VT520
767:VT510
755:VT420
750:VT340
745:VT330
739:VT320
734:VT241
729:VT240
723:VT220
718:VT180
713:VT131
708:VT105
703:VT103
698:VT102
693:VT101
687:VT100
623:Other
587:21068
582:21066
569:Alpha
547:Rigel
300:Cache
186:, an
1159:TU81
1144:RL02
1139:RK05
1134:RA90
886:MICA
829:OS/8
682:VT62
677:VT55
665:GT40
659:VT05
559:NVAX
535:CVAX
525:V-11
507:J-11
502:T-11
498:F-11
326:NMOS
322:dies
286:J-11
265:and
72:and
26:V-11
24:The
854:IAS
809:COS
540:SOC
517:VAX
209:die
161:DIP
39:by
30:VAX
1349::
369:.
360:19
355:.
312:.
261:,
86:.
68:,
64:,
600:)
596:(
476:,
412:e
405:t
398:v
337:"
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