80:
This table shows the variants of the FCMOV instructions. The first operand is always the ST(0) register (equivalently, the top of the floating point stack). The Opcode column indicates a two-byte sequence where the second byte is a base value indicating the number of the floating point stack register
38:
integer flag register, to the ST(0) (top of stack) register. There are 8 variants of the instruction selected by the condition codes that need be set for the instruction to perform the move.
53:
than conditional branch instructions. Therefore, it is most useful for simple yet unpredictable comparison or conditional operations, where it can provide substantial performance gains.
35:
289:
46:
34:
processors. It copies the contents of one of the floating point stack register, depending on the contents of
69:
61:
50:
81:
to use for the second operand. Add the desired number to complete the corresponding opcode value.
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idiom to set the relevant condition codes based on the result of a floating point comparison.
65:
57:
274:
240:
45:
instruction, FCMOV allows some conditional operations to be performed without the usual
283:
252:
Optimizing subroutines in assembly language. An optimization guide for x86 platforms.
237:
Intel
Architecture Software Developer Manual, Volume 2: Instruction Set Reference.
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31:
110:
20:
24:
269:
255:
42:
27:
275:
Intel's official instruction set reference download page
8:
56:The instruction is usually used with the
232:
230:
83:
226:
19:is a floating point conditional move
7:
49:overhead. However, it has a higher
30:architecture, first introduced in
14:
200:Carry flag and Zero flag cleared
270:Software Optimization Resources
1:
141:Carry flag or Zero flag set
197:Move if not below or equal
306:
254:Available for download at
239:Available for download at
138:Move if below or equal
211:Move if not unordered
214:Parity flag cleared
172:Carry flag cleared
60:instruction or the
186:Zero flag cleared
183:Move if not equal
169:Move if not below
152:Move if unordered
218:
217:
297:
290:X86 instructions
257:
248:
242:
234:
84:
305:
304:
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298:
296:
295:
294:
280:
279:
266:
261:
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235:
228:
223:
78:
41:Similar to the
12:
11:
5:
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264:External links
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160:
159:
153:
150:
147:
143:
142:
139:
136:
133:
129:
128:
127:Zero flag set
125:
124:Move if equal
122:
119:
115:
114:
108:
107:Move if below
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102:
98:
97:
94:
91:
88:
77:
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13:
10:
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6:
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2:
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33:
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26:
22:
18:
251:
246:
236:
79:
55:
40:
16:
15:
156:Parity flag
32:Pentium Pro
221:References
111:Carry flag
96:Condition
194:FCMOVNBE
90:Mnemonic
47:branching
284:Category
250:Fog, A:
208:FCMOVNU
205:DB D8+i
191:DB D0+i
180:FCMOVNE
177:DB C8+i
166:FCMOVNB
163:DB C0+i
146:DA D8+i
135:FCMOVBE
132:DA D0+i
118:DA C8+i
101:DA C0+i
93:Meaning
76:Variants
149:FCMOVU
121:FCMOVE
104:FCMOVB
87:Opcode
51:latency
23:of the
36:EFLAGS
21:opcode
66:FSTSW
58:FCOMI
25:Intel
17:FCMOV
158:set
113:set
70:SAHF
62:FCOM
43:CMOV
28:x86
286::
229:^
68:-
64:-
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