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supply or sink at its output the sum of the currents needed or provided (depending on whether the output is a logic high or low voltage level) by all of the connected inputs, while maintaining the output voltage specifications. For each logic family, typically a "standard" input is defined by the manufacturer with maximum input currents at each logic level, and the fan-out for an output is computed as the number of these standard inputs that can be driven in the worst case. (Therefore, it is possible that an output can actually drive more inputs than specified by fan-out, even of devices within the same family, if the particular devices being driven sink and/or source less current, as reported on their data sheets, than a "standard" device of that family.) Ultimately, whether a device has the fan-out capability to drive (with guaranteed reliability) a set of inputs is determined by adding up all the input-low (max.) source currents specified on the datasheets of the driven devices, adding up all the input-high (max.) sink currents of those same devices, and comparing those sums to the driving device's guaranteed maximum output-low sink current and output-high source current specifications, respectively. If both totals are within the driving device's limits, then it has the DC fan-out capacity to drive those inputs on those devices as a group, and otherwise it doesn't, regardless of the manufacturer's given fan-out number. However, for any reputable manufacturer, if this current analysis reveals that the device cannot drive the inputs, the fan-out number will agree.
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speed. If each device has 8 pF of input capacitance, then only 11 pF of trace capacitance is allowable. (Routing traces on printed circuit boards usually have 1-2 pF per inch so the traces in this case can be 5.5 inches long max.) If this trace length condition can't be met, then the microcontroller must be run at a slower bus speed for reliable operation, or a buffer chip with higher current drive must be inserted into the circuit. Higher current drive increases speed since
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More complex analysis than fan-in and fan-out is required when two different logic families are interconnected. Fan-out is ultimately determined by the maximum source and sink currents of an output and the maximum source and sink currents of the connected inputs; the driving device must be able to
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The fan-out is the number of inputs that can be connected to an output before the current required by the inputs exceeds the current that can be delivered by the output while still maintaining correct logic levels. The current figures may be different for the logic zero and logic one states and in
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Dynamic or AC fan-out, not DC fan-out is therefore the primary limiting factor in many practical cases, due to the speed limitation. For example, suppose a microcontroller has 3 devices on its address and data lines, and the microcontroller can drive 35 pF of bus capacitance at its maximum clock
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In most designs, logic gates are connected to form more complex circuits. While no logic gate input can be fed by more than one output at a time without causing contention, it is common for one output to be connected to several inputs. The technology used to implement logic gates usually allows a
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Often a single signal (as an extreme example, the clock signal) needs to drive far more than 10 things on a chip. Rather than simply wiring the output of a gate to 1000 different inputs, circuit designers have found that it runs much faster to have a tree (as an extreme example, a
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When high-speed signal switching is required, the AC impedance of the output, the inputs, and the conductors between may significantly reduce the effective drive capacity of output, and this DC analysis may not be enough. See
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312:{\displaystyle {\text{DC Fan-out}}=\operatorname {min} \left(\left\lfloor {\frac {I_{\text{out high}}}{I_{\text{in high}}}}\right\rfloor ,\left\lfloor {\frac {I_{\text{out low}}}{I_{\text{in low}}}}\right\rfloor \right)}
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on a 64-bit ALU, circuit designers have found that it runs much faster to have a tree – for example, have the Z flag generated by an 8-input NOR gate, and each of their inputs generated by an 8-input OR gate.
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Maximum limits on fan-out are usually stated for a given logic family or device in the manufacturer's datasheets. These limits assume that the driven devices are members of the same family.
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simulations may be required for exact determination of the dynamic fan-out since dynamic fan-out is not clearly defined in most datasheets. (See the external link for more information.)
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of an output measures its load-driving capability: it is the greatest number of inputs of gates of the same type to which the output can be safely connected.
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533:"Novel Optical Computer Architecture Utilizing Reconfigurable Interconnects"
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However, inputs of real gates have capacitance as well as resistance to the
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This article is about digital electronics. For the software concept, see
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NXP Semiconductor specifications for their HEF4000 series CMOS chips
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HIGH-SPEED DIGITAL DESIGN — online newsletter — Vol. 8 Issue 07
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into subsequent gate inputs - attempting to do so causes the
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Unfortunately, due to the higher speeds of modern devices,
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Miles
Murdocca, Apostolos Gerasoulis, and Saul Levy.
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365:at 25 °C and 15 V gives a fan-out of 34 000).
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369:AC fan-out
220:DC Fan-out
184:DC fan-out
173:AC Fan-out
87:newspapers
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