182:
are not dispatched through interrupt vectors, as with nearly all other
Freescale processors. RS08 interrupts can wake the processor from a WAIT or STOP condition (where execution is temporarily halted), but otherwise do not change program flow. In essence, RS08 runs any thread of programming to
63:
parts, it has a much-simplified design. The 'R' in its part numbers suggests "Reduced"; Freescale itself describes the core as "ultra-low-end". Typical implementations include fewer on-board peripherals and memory resources, have smaller packages (the smallest is the
94:
Short and Tiny addressing modes allow for more efficient access and manipulation of the most commonly used variables and registers. These instructions have single-byte instruction opcodes, reducing the amount of program memory required by their frequent use.
225:
257:
163:. If a subroutine in turn calls another subroutine, it can preserve the return address in a local variable, call subroutines as necessary, and restore the saved address just before returning.
68:
6 package, at 3mm x 3mm x 1mm), and are priced under US$ 1. Aims of the simplified design include greater efficiency, greater cost-effectiveness for small-memory-size parts, and smaller
250:
803:
243:
808:
98:
Die size is 30% smaller than the S08 core. The RS08 core uses the same bus structure as S08, making memory and peripheral module reuse possible. It offers a
99:
91:
are a subset of the S08. This allows an easy transition from the S08 core to the RS08 core for designers and engineers.
646:
279:
153:
79:
with shared program and data bus; executing instructions from within data memory is possible. The device is not
184:
76:
230:
619:
38:
31:
528:
235:
361:
195:
414:
305:
266:
170:
has Carry and Zero flag bits. Overflow and
Negative, usually found in other cores, are not present.
409:
69:
27:
106:
interface that allows interactive control over the processor when installed in a target system.
35:
295:
80:
456:
451:
446:
441:
436:
49:
721:
705:
700:
695:
678:
673:
424:
351:
346:
341:
336:
331:
167:
88:
23:
220:
737:
542:
537:
518:
513:
501:
466:
461:
404:
399:
394:
389:
384:
379:
374:
369:
191:
45:
797:
665:
609:
594:
318:
313:
160:
60:
42:
773:
683:
589:
580:
570:
561:
324:
119:
198:
operation is possible. Interrupt arbitration is exclusively software-controlled.
575:
566:
504:
207:
Freescale
Semiconductor. RS08 Core Reference Manual (RS08RM). Rev. 1.0, 4/2006.
768:
599:
585:
179:
149:
145:
34:
in 2006, the RS08 architecture is a reduced-resource version of the
Freescale
210:
Freescale
Semiconductor. MC9RS08KA2 Data Sheet (MC9RS08KA2). Rev. 1.0, 4/2006
758:
103:
552:
489:
484:
48:
family. It has been implemented in several microcontroller devices for
763:
84:
190:
Though handling external events is synchronous, no overhead due to
604:
476:
134:
MC9RS08KB12: 12 kB of Flash-programmable program memory, I2C, SCI.
20:
778:
627:
131:
MC9RS08LA8: 8 kB of Flash-programmable program memory, SCI, SPI.
56:
239:
427:
65:
128:
MC9RS08LE4: 4 kB of Flash-programmable program memory, SCI.
267:
Motorola-Freescale-NXP processors and microcontrollers
125:
MC9RS08KA2: 2 kB of Flash-programmable program memory.
751:
730:
714:
655:
618:
551:
527:
500:
475:
423:
360:
304:
288:
251:
183:completion. The effect is vaguely similar to
8:
641:
274:
258:
244:
236:
83:with the S08 core, though the instruction
804:Freescale Semiconductor microcontrollers
7:
809:NXP Semiconductors microcontrollers
14:
144:The RS08 core does not manage a
100:Background Debug Mode interface
1:
122:-programmable program memory.
221:Freescale RS08 Announcement
114:Devices (as of July 2010):
825:
231:RS08 Core Reference Manual
644:
640:
277:
273:
30:. Originally released by
185:cooperative multitasking
77:von Neumann architecture
55:Compared to its sibling
529:Memory management units
289:Industrial control unit
41:(CPU), a member of the
39:central processing unit
226:RS08KA Overview at NXP
187:in operating systems.
158:Shadow Program Counter
152:calls, it preserves a
139:Architectural features
118:MC9RS08KA1: 1 kB of
75:The RS08 employs a
175:Interrupt handling
28:NXP Semiconductors
791:
790:
787:
786:
636:
635:
194:is required, and
192:context switching
81:binary compatible
816:
648:Microcontrollers
642:
275:
260:
253:
246:
237:
102:, a single-wire
89:addressing modes
50:embedded systems
24:microcontrollers
824:
823:
819:
818:
817:
815:
814:
813:
794:
793:
792:
783:
747:
726:
710:
651:
632:
614:
547:
523:
496:
471:
425:Embedded system
419:
356:
300:
284:
269:
264:
217:
204:
177:
168:Status register
141:
112:
19:is a family of
12:
11:
5:
822:
820:
812:
811:
806:
796:
795:
789:
788:
785:
784:
782:
781:
776:
771:
766:
761:
755:
753:
749:
748:
746:
745:
744:
743:
734:
732:
728:
727:
725:
724:
718:
716:
712:
711:
709:
708:
703:
698:
693:
692:
691:
686:
676:
671:
668:
663:
659:
657:
653:
652:
645:
638:
637:
634:
633:
631:
630:
624:
622:
616:
615:
613:
612:
607:
602:
597:
592:
583:
578:
573:
564:
558:
556:
549:
548:
546:
545:
540:
534:
532:
525:
524:
522:
521:
516:
510:
508:
502:Floating-point
498:
497:
495:
494:
493:
492:
481:
479:
473:
472:
470:
469:
464:
459:
454:
449:
444:
439:
433:
431:
421:
420:
418:
417:
412:
407:
402:
397:
392:
387:
382:
377:
372:
366:
364:
358:
357:
355:
354:
349:
344:
339:
334:
329:
328:
327:
316:
310:
308:
302:
301:
299:
298:
292:
290:
286:
285:
278:
271:
270:
265:
263:
262:
255:
248:
240:
234:
233:
228:
223:
216:
215:External links
213:
212:
211:
208:
203:
200:
176:
173:
172:
171:
164:
154:return address
140:
137:
136:
135:
132:
129:
126:
123:
111:
108:
46:microprocessor
13:
10:
9:
6:
4:
3:
2:
821:
810:
807:
805:
802:
801:
799:
780:
777:
775:
772:
770:
767:
765:
762:
760:
757:
756:
754:
750:
742:DSPcontroller
741:
740:
739:
736:
735:
733:
729:
723:
720:
719:
717:
713:
707:
704:
702:
699:
697:
694:
690:
687:
685:
682:
681:
680:
677:
675:
672:
669:
667:
664:
661:
660:
658:
654:
650:
649:
643:
639:
629:
626:
625:
623:
621:
617:
611:
608:
606:
603:
601:
598:
596:
593:
591:
587:
584:
582:
579:
577:
574:
572:
568:
565:
563:
560:
559:
557:
554:
550:
544:
541:
539:
536:
535:
533:
530:
526:
520:
517:
515:
512:
511:
509:
506:
503:
499:
491:
488:
487:
486:
483:
482:
480:
478:
474:
468:
465:
463:
460:
458:
455:
453:
450:
448:
445:
443:
440:
438:
435:
434:
432:
429:
426:
422:
416:
413:
411:
408:
406:
403:
401:
398:
396:
393:
391:
388:
386:
383:
381:
378:
376:
373:
371:
368:
367:
365:
363:
359:
353:
350:
348:
345:
343:
340:
338:
335:
333:
330:
326:
322:
321:
320:
317:
315:
312:
311:
309:
307:
303:
297:
294:
293:
291:
287:
283:
282:
276:
272:
268:
261:
256:
254:
249:
247:
242:
241:
238:
232:
229:
227:
224:
222:
219:
218:
214:
209:
206:
205:
201:
199:
197:
193:
188:
186:
181:
174:
169:
165:
162:
161:link register
159:
155:
151:
147:
143:
142:
138:
133:
130:
127:
124:
121:
117:
116:
115:
109:
107:
105:
101:
96:
92:
90:
86:
82:
78:
73:
71:
67:
62:
61:Freescale S08
58:
53:
51:
47:
44:
40:
37:
33:
29:
25:
22:
18:
774:PowerPC 5000
688:
647:
505:coprocessors
362:68000 family
325:Hitachi 6309
280:
202:Bibliography
189:
178:
157:
113:
97:
93:
74:
54:
16:
15:
306:6800 family
166:The core's
798:Categories
769:PowerQUICC
600:PowerQUICC
415:DragonBall
323:see also:
281:Processors
180:Interrupts
150:subroutine
715:16/32-bit
662:6801/6803
610:PPC e6500
595:PPC e5500
430:-variants
196:low-power
148:. During
104:debugging
36:MC68HCS08
32:Freescale
738:DSP568xx
586:PPC 74xx
581:PPC e500
562:PPC e200
410:ColdFire
70:die size
576:PPC 7xx
567:PPC 6xx
553:PowerPC
490:MC88110
485:MC88100
467:68LC060
462:68EC060
457:68LC040
452:68EC040
447:68EC030
442:68EC020
437:68EC000
110:Devices
85:opcodes
764:MPC5xx
759:M·CORE
752:32-bit
731:24-bit
706:68HC16
701:68HC12
696:68HC11
679:68HC08
674:68HC05
555:family
507:(FPUs)
352:68HC16
347:68HC12
342:68HC11
337:68HC08
332:68HC05
722:683xx
656:8-bit
605:QorIQ
543:68851
538:68451
531:(MMU)
519:68882
514:68881
477:88000
405:68060
400:68040
395:68030
390:68020
385:68012
380:68010
375:68008
370:68000
296:14500
156:in a
146:stack
120:Flash
21:8-bit
779:i.MX
689:RS08
670:6804
666:6802
628:i.MX
590:e600
571:e300
319:6809
314:6800
87:and
59:and
57:HC08
43:6800
17:RS08
684:S08
620:ARM
428:68k
66:QFN
26:by
800::
72:.
52:.
588:/
569:/
259:e
252:t
245:v
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