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118:) or a sandwich of these layers. This gate electrode is often called "gate metal" or "gate conductor". The geometrical width of the gate conductor electrode (the direction transverse to current flow) is called the physical gate width. The physical gate width may be slightly different from the electrical channel width used to model the transistor as fringing electric fields can exert an influence on conductors that are not immediately below the gate.
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he electrical properties of the gate oxide are critical to the formation of the conductive channel region below the gate. In NMOS-type devices, the zone beneath the gate oxide is a thin n-type inversion layer on the surface of the
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accidentally grew an oxide layer over silicon at Bell Labs and patented their method. By 1957 Frosch and
Derrick were aware of surface passivation by silicon dioxide and made the first gate oxide for a transistors. In 1987,
45:(metal–oxide–semiconductor field-effect transistor) from the underlying source and drain terminals as well as the conductive channel that connects source and drain when the transistor is turned on. Gate oxide is formed by
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283:, Lincoln, Derick & Frosch, Carl J., "Oxidation of semiconductive surfaces for controlled diffusion", issued 1957-08-13
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57:. A conductive gate material is subsequently deposited over the gate oxide to form the transistor. The gate oxide serves as the
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53:. The insulating silicon dioxide layer is formed through a process of self-limiting oxidation, which is described by the
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333:; Ting, Chung-Yu; Ahn, Kie Y.; Basavaiah, S.; Hu, Chao-Kun; Taur, Yuan; Wordeman, Matthew R.; Aboelfotoh, O. (1987).
254:, Chih-Tang Sah. World Scientific, first published 1991, reprinted 1992, 1993 (pbk), 1994, 1995, 2001, 2002, 2006,
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Dielectric layer of a MOSFET isolating the gate terminal from the underlying silicon
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of the silicon of the channel to form a thin (5 - 200 nm) insulating layer of
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substrate. It is induced by the oxide electric field from the applied gate
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301:"Surface Protection and Selective Masking during Diffusion in Silicon"
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223:"Surface Protection and Selective Masking during Diffusion in Silicon"
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layer so that the gate can sustain as high as 1 to 5 MV/cm transverse
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Gate oxide at NPNP transistor made by Frosch and
Derrick, 1957
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1987 Symposium on VLSI Technology. Digest of
Technical Papers
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Above the gate oxide is a thin electrode layer made of a
335:"Submicron Tungsten Gate MOSFET with 10 nm Gate Oxide"
141:Overstressing the gate oxide layer, a common
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185:that demonstrated the first MOSFET with a
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252:Fundamentals of Solid-State Electronics
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305:Journal of the Electrochemical Society
227:Journal of The Electrochemical Society
138:to flow from the source to the drain.
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183:IBM Thomas J. Watson Research Center
368:Semiconductor fabrication materials
65:in order to strongly modulate the
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299:Frosch, C. J.; Derick, L (1957).
221:Frosch, C. J.; Derick, L (1957).
145:, may lead to gate rupture or to
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189:gate oxide thickness, using
181:led a research team at the
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363:Semiconductor devices
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154:reactive-ion-etching
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398:American inventions
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209:References
187:10 nm
59:dielectric
35:dielectric
31:gate oxide
136:electrons
78:aluminium
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341:: 61–62.
197:See also
191:tungsten
168:In 1955
94:silicide
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164:History
128:voltage
82:silicon
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