Knowledge (XXG)

HLT (x86 instruction)

Source 📝

185:
includes an instruction or sleep mode which halts the processor until more work needs to be done. In interrupt-driven processors, this instruction halts the CPU until an external interrupt is received. On most architectures, executing such an instruction allows the processor to significantly reduce
55:
is fired. Interrupts are signals sent by hardware devices to the CPU alerting it that an event occurred to which it should react. For example, hardware timers send interrupts to the CPU at regular intervals.
232:
to decide whether other processes are runnable; if not. If every process is sleeping or waiting, it will normally execute a HLT instruction to cut power usage until the next hardware interrupt.
312: 126:
and in Microsoft's tests it saved 5%. Some of the first 100 MHz DX chips had a buggy HLT state, prompting the developers of
258: 268: 338: 418: 247: 217: 292: 48: 229: 413: 253: 34: 224:(API) provided for that purpose by the operating system when no more work can be done, such as Linux's 130:
to implement a "no-hlt" option for use when running on those chips, but this was fixed in later chips.
118:
prior to 6.0 and was not specifically designed to reduce power consumption until the release of the
363: 203: 76: 191: 44: 293:"Intel 64 and IA-32 Architectures Software Developer's Manual: Instruction Set Reference A-Z" 60: 388: 190:
for sleeping and idling. In most processors, halting (instead of looping) also reduces the
213: 182: 228:. This is referred to as "yielding" the processor. This allows the operating system's 133:
Intel has since introduced additional processor-yielding instructions. These include:
67:
instruction when there is no immediate work to be done, putting the processor into an
407: 220:. Because of this, it is often best practice in application programming to use the 187: 17: 273: 263: 123: 122:
processor in 1994. MS-DOS 6.0 provided a POWER.EXE that could be installed in
72: 68: 186:
its power usage and heat output, which is why it is commonly used instead of
119: 52: 342: 144:
intended for spin loops. Available to userspace (low-privilege rings).
216:
access, it can only be run by privileged system software such as the
115: 80: 127: 241: 155: 141: 221: 31: 339:"POWER.EXE and Advanced Power Management (APM) Support" 169: 165: 161: 151: 147: 137: 172:(userspace monitor/mwait). Available to userspace. 110:All x86 processors from the 8086 onward had the 94:On ARM processors, the similar instructions are 75:, for example, this instruction is run in the " 313:"Why does DOS use 100% CPU under Virtual PC?" 8: 242:Advanced Configuration and Power Interface 27:X86 CPU instruction which pauses execution 284: 7: 389:"sched_yield(2) - Linux manual page" 114:instruction, but it was not used by 25: 222:application programming interface 181:Almost every modern processor 51:(CPU) until the next external 1: 364:"The Linux BootPrompt-HowTo" 269:Instruction set architecture 47:instruction which halts the 158:for thread synchronization. 435: 201: 79:". On x86 processors, the 248:Advanced Power Management 98:(Wait For Interrupt) and 198:Use in operating systems 194:of the next interrupt. 49:central processing unit 254:Computer architecture 212:instruction requires 35:computer architecture 259:Halt and Catch Fire 204:Sleep (system call) 77:System Idle Process 319:. 20 December 2004 208:Since issuing the 164:(timed pause) and 102:(Wait For Event). 61:operating systems 45:assembly language 16:(Redirected from 426: 419:X86 instructions 399: 398: 396: 395: 385: 379: 378: 376: 374: 360: 354: 353: 351: 350: 341:. Archived from 335: 329: 328: 326: 324: 309: 303: 302: 300: 299: 289: 227: 211: 171: 167: 163: 153: 149: 139: 113: 101: 97: 90: 86: 66: 41: 21: 434: 433: 429: 428: 427: 425: 424: 423: 404: 403: 402: 393: 391: 387: 386: 382: 372: 370: 362: 361: 357: 348: 346: 337: 336: 332: 322: 320: 311: 310: 306: 297: 295: 291: 290: 286: 282: 238: 225: 209: 206: 200: 183:instruction set 179: 111: 108: 99: 95: 88: 84: 64: 39: 28: 23: 22: 18:HLT instruction 15: 12: 11: 5: 432: 430: 422: 421: 416: 406: 405: 401: 400: 380: 355: 330: 304: 283: 281: 278: 277: 276: 271: 266: 261: 256: 251: 245: 237: 234: 202:Main article: 199: 196: 178: 175: 174: 173: 159: 145: 107: 106:History on x86 104: 26: 24: 14: 13: 10: 9: 6: 4: 3: 2: 431: 420: 417: 415: 412: 411: 409: 390: 384: 381: 369: 365: 359: 356: 345:on 2014-09-27 344: 340: 334: 331: 318: 317:microsoft.com 314: 308: 305: 294: 288: 285: 279: 275: 272: 270: 267: 265: 262: 260: 257: 255: 252: 249: 246: 243: 240: 239: 235: 233: 231: 226:sched_yield() 223: 219: 215: 205: 197: 195: 193: 189: 184: 176: 160: 157: 146: 143: 136: 135: 134: 131: 129: 125: 121: 117: 105: 103: 92: 82: 78: 74: 70: 62: 57: 54: 50: 46: 43:(halt) is an 42: 36: 33: 19: 414:Machine code 392:. Retrieved 383: 371:. Retrieved 368:www.faqs.org 367: 358: 347:. Retrieved 343:the original 333: 321:. Retrieved 316: 307: 296:. Retrieved 287: 207: 188:busy waiting 180: 132: 109: 93: 58: 38: 29: 373:18 November 323:18 November 408:Categories 394:2020-09-02 349:2015-09-27 298:2012-03-01 280:References 274:NOP (code) 264:Idle (CPU) 124:CONFIG.SYS 73:Windows NT 69:idle state 63:execute a 230:scheduler 120:Intel DX4 53:interrupt 236:See also 166:UMONITOR 192:latency 177:Process 148:MONITOR 30:In the 244:(ACPI) 218:kernel 214:ring 0 170:UMWAIT 162:TPAUSE 116:MS-DOS 81:opcode 250:(APM) 152:MWAIT 138:PAUSE 128:Linux 71:. In 59:Most 375:2018 325:2018 156:SSE3 142:SSE2 89:0xF4 210:HLT 154:in 140:in 112:HLT 100:WFE 96:WFI 87:is 85:HLT 83:of 65:HLT 40:HLT 32:x86 410:: 366:. 315:. 91:. 37:, 397:. 377:. 352:. 327:. 301:. 168:/ 150:/ 20:)

Index

HLT instruction
x86
computer architecture
assembly language
central processing unit
interrupt
operating systems
idle state
Windows NT
System Idle Process
opcode
MS-DOS
Intel DX4
CONFIG.SYS
Linux
SSE2
SSE3
instruction set
busy waiting
latency
Sleep (system call)
ring 0
kernel
application programming interface
scheduler
Advanced Configuration and Power Interface
Advanced Power Management
Computer architecture
Halt and Catch Fire
Idle (CPU)

Text is available under the Creative Commons Attribution-ShareAlike License. Additional terms may apply.