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x86 virtualization

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228:, which made the protection of the hypervisor's memory impossible, in particular, the protection of the trap handler that runs in the guest kernel address space. Revision D and later 64-bit AMD processors (as a rule of thumb, those manufactured in 90 nm or less) added basic support for segmentation in long mode, making it possible to run 64-bit guests in 64-bit hosts via binary translation. Intel did not add segmentation support to its x86-64 implementation ( 696: 466: 306: 495:"VMX" stands for Virtual Machine Extensions, which adds 13 new instructions: VMPTRLD, VMPTRST, VMCLEAR, VMREAD, VMWRITE, VMCALL, VMLAUNCH, VMRESUME, VMXOFF, VMXON, INVEPT, INVVPID, and VMFUNC. These instructions permit entering and exiting a virtual execution mode where the guest OS perceives itself as running with full privilege (ring 0), but the host OS remains protected. 962:"Surprisingly, we find that the first-generation hardware support rarely offers performance advantages over existing software techniques. We ascribe this situation to high VMM/guest transition costs and a rigid programming model that leaves little room for software flexibility in managing either the frequency or cost of these transitions. 853:
In SR-IOV, the most common of these, a host VMM configures supported devices to create and allocate virtual "shadows" of their configuration spaces so that virtual machine guests can directly configure and access such "shadow" device resources. With SR-IOV enabled, virtualized network interfaces are
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An IOMMU also allows operating systems to eliminate bounce buffers needed to allow themselves to communicate with peripheral devices whose memory address spaces are smaller than the operating system's memory address space, by using memory address translation. At the same time, an IOMMU also allows
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hypervisor was self-standing and did not depend on any operating system or run any user applications itself. In contrast, the first x86 virtualization products were aimed at workstation computers, and ran a guest OS inside a host OS by embedding the hypervisor in a kernel module that ran under the
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0, and applications at a lower privilege such as ring 3. In software-based virtualization, a host OS has direct access to hardware while the guest OSs have limited access to hardware, just like any other application of the host OS. One approach used in x86 software-based virtualization to overcome
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in memory that exists exactly once per VM, while it is managed by the VMM. With every change of the execution context between different VMs, the VMCS is restored for the current VM, defining the state of the VM's virtual processor. As soon as more than one VMM or nested VMMs are used, a problem
182: 557:. In such cases, VMCS needs to be shadowed multiple times (in case of nesting) and partially implemented in software in case there is no hardware support by the processor. To make shadow VMCS handling more efficient, Intel implemented hardware support for VMCS shadowing. 1433: 208:
operating systems to run on the resulting virtual machine, which does not implement the parts of the actual x86 instruction set that are hard to virtualize. The paravirtualized I/O has significant performance benefits as demonstrated in the original
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In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-assisted virtualization capabilities while attaining reasonable performance. In 2005 and 2006, both
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in the processor, so once the segment descriptors have been loaded into the processor, the memory from which they have been loaded may be overwritten and there is no way to get the descriptors back from the processor.
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AMD developed its first generation virtualization extensions under the code name "Pacifica", and initially published them as AMD Secure Virtual Machine (SVM), but later marketed them under the trademark
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to the x86 architecture. The first generation of x86 hardware virtualization addressed the issue of privileged instructions. The issue of low performance of virtualized system memory was addressed with
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paper that the above techniques made the x86 platform virtualizable in the sense of meeting the three criteria of Popek and Goldberg, albeit not by the classic trap-and-emulate technique.
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supports native IOV in existing single-root complex PCI Express topologies. It requires support for new device capabilities to configure multiple virtualized configuration spaces.
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chip, which offered virtualized 8086 processors on the 386 and later chips. Hardware support for virtualizing the protected mode itself, however, became available 20 years later.
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These techniques incur some performance overhead due to lack of MMU virtualization support, as compared to a VM running on a natively virtualizable architecture such as the
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On some platforms, it is possible to run a 64-bit guest on a 32-bit host OS if the underlying processor is 64-bit and supports the necessary virtualization extensions.
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supports native IOV in new topologies (for example, blade servers) by building on SR-IOV to provide multiple root complexes which share a common PCI Express hierarchy.
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A Comparison of Software and Hardware Techniques for x86 Virtualization, Keith Adams and Ole Agesen, VMware, ASPLOS’06 October 21–25, 2006, San Jose, California, USA
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Previously codenamed "Vanderpool", VT-x represents Intel's technology for virtualization on the x86 platform. On November 13, 2005, Intel released two models of
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directly accessible to the guests, avoiding involvement of the VMM and resulting in high overall performance; for example, SR-IOV achieves over 95% of the
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Intel's "Virtualization Technology for Directed I/O" (VT-d), included in most high-end (but not all) newer Intel processors since the Core 2 architecture.
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AMD Opteron CPUs beginning with the Family 0x10 Barcelona line, and Phenom II CPUs, support a second generation hardware virtualization technology called
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supports native IOV across PCI Express via address translation. It requires support for new transactions to configure such translations.
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series of Intel CPUs, which is sold as Xeon E5-26xx v2 (launched in late 2013) and as Xeon E5-46xx v2 (launched in early 2014).
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There has been some controversy whether the x86 architecture with no hardware assistance is virtualizable as described by
600:) targeting interrupt overhead reduction in virtualization environments. This technology, as announced, does not support 568:
3000 Series Processors and higher support VIA VT virtualization technology compatible with Intel VT-x. EPT is present in
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As of 2015, almost all newer server, desktop and mobile Intel processors support VT-x, with some of the
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appears in a way similar to what required shadow page table management to be invented, as described
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virtualization, which did not have a brand name at its announcement time. Later, it was branded as
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could not run concurrent DOS applications well by itself in protected mode, Intel introduced the
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devices, such as Ethernet, accelerated graphics cards, and hard-drive controllers, through
1825: 1789: 1770: 1751: 1694: 1557:"Intel Virtualization Technology: Hardware Support for Efficient Processor Virtualization" 1437: 959: 916: 708: 465: 305: 73: 398:(formerly known as Nested Page Tables during its development), later adopted by Intel as 2487: 375:
processors support AMD-V. AMD-V is not supported by any Socket 939 processors. The only
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is used to rewrite certain ring 0 instructions in terms of ring 3 instructions, such as
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must therefore be used to track changes made to the descriptor tables by the guest OS.
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A special course at the University of San Francisco on Intel EM64T and VT Extensions
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provides a set of general (non-x86 specific) I/O virtualization methods based on
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based on x86, but it likely did not include support for graphics virtualization.
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In protected mode the operating system kernel runs at a higher privilege such as
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I/O device emulation: Unsupported devices on the guest OS must be emulated by a
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The following discussion focuses only on virtualization of the x86 architecture
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operating systems and hypervisors to prevent buggy or malicious hardware from
712: 499: 459: 364: 356: 352: 309: 166: 131: 2349:"An Introduction to Intel Flexible Port Partitioning Using SR-IOV Technology" 1665:"Technology Brief: Intel Microarchitecture Nehalem Virtualization Technology" 776:(FLR) can be virtualized this way, as it is required for reassigning various 2101:"Intel Virtualization Technology for Directed I/O (VT-d) Supported CPU List" 1099:"Virtualization: architectural considerations and other evaluation criteria" 785: 720: 526: 477: 458:"Intel VT-x" redirects here. For the Itanium virtualization extensions, see 368: 344: 225: 2481: 17: 1038:"A Comparison of Software and Hardware Techniques for x86 Virtualization" 565: 229: 151: 2385:"NASA's Flexible Cloud Fabric: Moving Cluster Applications to the Cloud" 1575: 742:
AMD's I/O Virtualization Technology, "AMD-Vi", originally called "IOMMU"
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between virtual machines. If a device to be assigned does not support
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Everything You Need to Know About the Intel Virtualization Technology
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Also in 2012, Intel announced a similar technology for interrupt and
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Graphics virtualization is not part of the x86 architecture. Intel
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instruction set, they implement AMD's own graphics architectures (
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Three techniques made virtualization of protected mode possible:
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Neiger, Gil; A. Santoni; F. Leung; D. Rodgers; R. Uhlig (2006).
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lines with other devices for the assignment to be possible. All
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microarchitecture (announced in 2013), Intel started to include
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2 day open source & open access class on writing a VT-x VMM
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A number of key data structures used by a processor need to be
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added support for launching the logical processor directly in
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Both AMD and Intel have released their IOMMU specifications:
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Intel's "Virtualization Technology for Connectivity" (VT-c).
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An input/output memory management unit (IOMMU) allows guest
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for instance), the reuse of pages by the guest OS, or even
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Patrick Kutch; Brian Johnson; Greg Rose (September 2011).
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Introduction of AMD Advanced Virtual Interrupt Controller
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To see if your processor supports hardware virtualization
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Input–output memory management unit § Virtualization
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virtualization that was added to the chipset later.
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Understanding Intel Virtualization Technology (VT).
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Interrupt virtualization (AMD AVIC and Intel APICv)
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Hardware-assisted virtualization on x86/x86-64 CPUs
1840:"Next-generation Interrupt Virtualization for KVM" 1783:VIA Introduces New VIA Nano 3000 Series Processors 677:Memory and I/O virtualization is performed by the 351:family of processors with revisions "F" or "G" on 188:A different route was taken by other systems like 2272: 2270: 2250:"PCI-SIG I/O Virtualization (IOV) Specifications" 877:Comparison of application virtualization software 126:, and granting the guest OS direct access to the 103:need to be cached in a coherent way that detects 2287:. November 27, 2014. p. 104. Archived from 655:) which do not support graphics virtualization. 506:, users must enable Intel's VT-x feature in the 46: 2445:"Enhanced Networking in the AWS Cloud - Part 2" 821:PCI-SIG Single Root I/O Virtualization (SR-IOV) 810:PCI-SIG Single Root I/O Virtualization (SR-IOV) 502:processors as the primary exception. With some 54: 882:Comparison of platform virtualization software 685:I/O MMU virtualization (AMD-Vi and Intel VT-d) 619:) and it became commercially available in the 510:setup before applications can make use of it. 450:setup before applications can make use of it. 328:On May 23, 2006, AMD released the Athlon 64 ( 8: 1764:The 'what, where and why' of VMCS shadowing. 1340:"33047_SecureVirtualMachineManual_3-0.book" 446:, users must enable AMD SVM feature in the 416:for AMD-V is "svm". This may be checked in 2019:"Linux virtualization and PCI passthrough" 1426: 1424: 1227:"VMware and CPU Virtualization Technology" 521:architecture, released in 2008. In 2010, 379:processors which support it are APUs and 2252:. Pcisig.com. 2011-03-31. Archived from 2190:"How to assign devices with VT-d in KVM" 1128: 1126: 1067: 1065: 1032: 1030: 1028: 1026: 1024: 2313:Yaozu Dong; Zhao Yu; Greg Rose (2008). 1147:"VMware and Hardware Assist Technology" 945: 816:Single-root input/output virtualization 165:On traditional mainframes, the classic 2420:"Enhanced Networking in the AWS Cloud" 1506:"Intel Virtualization Technology List" 1451:"How to enable Intel VTx and AMD SVM?" 912:Timeline of virtualization development 343:AMD-V capability also features on the 862:'s virtualized datacenter and in the 749:In addition to the CPU support, both 594:Advanced Virtual Interrupt Controller 409:-based AMD processors support AMD-V. 363:2nd generation and third-generation, 122:. Because most operating systems use 7: 1881:from the original on 2 February 2017 1531:"Windows Virtual PC: Configure BIOS" 1111:from the original on 6 February 2011 723:remapping. This is sometimes called 257:(working independently) created new 2278:"Intel Look Inside: Intel Ethernet" 1457:. QNAP Systems, Inc. Archived from 1178:"Xen and the Art of Virtualization" 1050:from the original on 20 August 2010 37:capabilities on an x86/x86-64 CPU. 832:Address translation services (ATS) 633:Graphics Virtualization Technology 181:researchers pointed out in a 2006 130:would mean loss of control by the 25: 922:List of IOMMU-supporting hardware 546:virtual machine control structure 540:as a technology that accelerates 1190:from the original on 2014-09-29. 927:Second Level Address Translation 887:Hardware-assisted virtualization 245:Hardware-assisted virtualization 239:Hardware-assisted virtualization 35:hardware-assisted virtualization 2451:from the original on 2014-01-10 2426:from the original on 2014-01-09 2329:from the original on 2014-01-09 2231:from the original on 2016-02-22 2200:from the original on 2015-03-10 2171:from the original on 2014-02-09 2142:from the original on 2016-03-04 2103:. Ark.intel.com. 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Pagetable.com. 2006-11-09. 800:Network virtualization (VT-c) 592:In 2012, AMD announced their 396:Rapid Virtualization Indexing 170:host OS (type 2 hypervisor). 61:Software-based virtualization 1900:Jun Nakajimaa (2012-12-13). 792:devices routed behind a PCI/ 733:compromising memory security 554: 1932:Khang Nguyen (2013-12-17). 1533:. Microsoft. Archived from 933:Message Signaled Interrupts 782:Message Signaled Interrupts 561:VIA virtualization (VIA VT) 490:sysctl machdep.cpu.features 454:Intel virtualization (VT-x) 2524: 1838:Jörg Rödel (August 2012). 1750:September 8, 2014, at the 1006:. Usenix.org. 2002-01-29. 813: 688: 670: 457: 301:AMD virtualization (AMD-V) 278: 242: 77:this limitation is called 1996:. Intel.com. 2006-08-10. 1788:January 22, 2013, at the 1313:Yager, Tom (2004-11-05). 784:(MSI), it must not share 513:Intel started to include 154:that runs in the host OS. 1639:(Press release). Intel. 1564:Intel Technology Journal 1317:. Images.infoworld.com. 627:Graphics processing unit 336:) and the Athlon 64 FX ( 145:Shadow descriptor tables 2508:Hardware virtualization 907:OS-level virtualization 847:Multi-root IOV (MR-IOV) 270:Central processing unit 216:The initial version of 1609:Intel Software Network 1479:INTEL (October 2019). 902:Network virtualization 704: 659:was the only graphics 572:ZX-C, a descendant of 473: 313: 132:virtualization manager 2021:. IBM. Archived from 1968:. Intel. 2014-03-14. 1670:. Intel. 2009-03-25. 1570:(3). Intel: 167–178. 1134:U.S. patent 6,496,847 1086:U.S. patent 6,704,925 1073:U.S. patent 6,397,242 858:network bandwidth in 756:and system firmware ( 698: 542:nested virtualization 468: 332:), the Athlon 64 X2 ( 308: 1875:www.mail-archive.com 1773:Retrieved 2014-09-01 1754:Retrieved 2014-09-01 774:function level reset 515:Extended Page Tables 400:Extended Page Tables 259:processor extensions 124:paged virtual memory 1576:10.1535/itj.1003.01 1487:. Intel Corporation 978:. Intel.com. 2007. 864:Amazon Public Cloud 772:devices supporting 613:APIC virtualization 140:segment descriptors 113:self-modifying code 2025:on 1 November 2009 1938:software.intel.com 1824:2014-07-14 at the 1769:2014-09-03 at the 1436:2012-11-25 at the 958:2010-08-20 at the 897:I/O virtualization 705: 673:I/O virtualization 474: 319:AMD Virtualization 314: 249:In 2005 and 2006, 202:paravirtualization 175:Popek and Goldberg 136:shadow page tables 89:Binary translation 79:ring deprivileging 31:x86 virtualization 2365:on August 7, 2015 1508:. Ark.intel.com. 1410:on April 16, 2009 1381:on April 15, 2009 1260:. Kb.vmware.com. 841:(SR-IOV or SRIOV) 661:microarchitecture 291:virtual 8086 mode 281:Virtual 8086 mode 275:Virtual 8086 mode 204:, which involves 16:(Redirected from 2515: 2503:X86 architecture 2476:ghostarchive.org 2460: 2459: 2457: 2456: 2441: 2435: 2434: 2432: 2431: 2416: 2410: 2409: 2407: 2406: 2400: 2394:. Archived from 2389: 2381: 2375: 2374: 2372: 2370: 2364: 2358:. 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Intel.com. 2220: 2214: 2211: 2199: 2195: 2194:linux-kvm.org 2191: 2185: 2182: 2170: 2166: 2162: 2156: 2153: 2138: 2134: 2127: 2121: 2118: 2107:on 2010-10-27 2106: 2102: 2096: 2093: 2082:on 2013-04-03 2081: 2077: 2071: 2068: 2053: 2046: 2040: 2037: 2024: 2020: 2014: 2011: 1999: 1995: 1989: 1986: 1971: 1964: 1958: 1955: 1943: 1939: 1935: 1928: 1925: 1910: 1903: 1896: 1893: 1880: 1876: 1872: 1866: 1863: 1848: 1841: 1834: 1831: 1827: 1823: 1820: 1814: 1811: 1803: 1797: 1794: 1791: 1787: 1784: 1779: 1776: 1772: 1768: 1765: 1760: 1757: 1753: 1749: 1746: 1741: 1738: 1726: 1719: 1713: 1710: 1706: 1702: 1699: 1695: 1691: 1688: 1673: 1666: 1660: 1657: 1642: 1635: 1629: 1626: 1614: 1610: 1606: 1599: 1596: 1585:on 2012-09-25 1581: 1577: 1573: 1569: 1565: 1558: 1551: 1548: 1537:on 2010-09-06 1536: 1532: 1526: 1523: 1511: 1507: 1501: 1498: 1486: 1482: 1475: 1472: 1461:on 2018-03-07 1460: 1456: 1452: 1446: 1443: 1439: 1435: 1432: 1427: 1425: 1421: 1409: 1405: 1401: 1395: 1392: 1380: 1376: 1372: 1366: 1363: 1348: 1341: 1335: 1332: 1320: 1316: 1309: 1306: 1295:on 2010-01-05 1291: 1284: 1278: 1275: 1263: 1259: 1253: 1250: 1235: 1228: 1222: 1219: 1207: 1203: 1197: 1194: 1186: 1179: 1173: 1170: 1155: 1148: 1142: 1139: 1135: 1129: 1127: 1123: 1107: 1100: 1094: 1091: 1087: 1081: 1078: 1074: 1068: 1066: 1062: 1046: 1039: 1033: 1031: 1029: 1027: 1025: 1021: 1009: 1005: 999: 996: 981: 974: 968: 965: 961: 957: 954: 949: 946: 940: 934: 931: 928: 925: 923: 920: 918: 915: 913: 910: 908: 905: 903: 900: 898: 895: 893: 890: 888: 885: 883: 880: 878: 875: 874: 869: 867: 865: 861: 857: 848: 845: 842: 840: 836: 833: 830: 829: 828: 826: 822: 817: 809: 804: 803: 799: 797: 795: 791: 787: 783: 779: 775: 771: 767: 763: 759: 755: 752: 744: 741: 740: 739: 736: 734: 728: 726: 722: 718: 714: 710: 702: 697: 692: 684: 682: 680: 674: 666: 664: 662: 658: 654: 650: 646: 642: 638: 634: 626: 624: 622: 621:Ivy Bridge EP 618: 614: 610: 605: 603: 599: 595: 587: 585: 583: 579: 575: 571: 567: 560: 558: 556: 551: 547: 544:of VMMs. The 543: 539: 535: 530: 528: 524: 520: 516: 511: 509: 505: 501: 496: 493: 487: 482:/proc/cpuinfo 479: 471: 470:Intel Core i7 467: 461: 453: 451: 449: 445: 440: 437: 431: 427: 423: 419: 415: 410: 408: 403: 401: 397: 392: 390: 386: 382: 378: 374: 370: 366: 362: 358: 354: 350: 346: 341: 339: 335: 331: 326: 324: 320: 311: 307: 300: 298: 296: 292: 288: 282: 274: 269: 267: 265: 260: 256: 252: 246: 238: 236: 233: 231: 227: 223: 219: 214: 212: 207: 203: 199: 195: 191: 186: 184: 180: 176: 171: 168: 163: 161: 153: 149: 146: 141: 137: 133: 129: 125: 121: 117: 114: 110: 106: 105:code patching 102: 98: 94: 90: 87: 86: 85: 82: 80: 75: 70: 68: 60: 58: 56: 52: 48: 44: 38: 36: 32: 19: 2474:Archived at 2453:. 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VMware. 1212:2010-05-02 1163:2010-09-08 1104:. VMware. 1043:. VMware. 1014:2010-05-02 989:2016-12-12 941:References 892:Hypervisor 856:bare metal 713:peripheral 689:See also: 532:Since the 500:Intel Atom 460:Intel VT-i 442:With some 373:APU Fusion 353:socket AM2 310:AMD Phenom 18:Intel VT-c 2298:March 26, 1907:. Intel. 1611:. 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AMD. 1455:Support 1404:amd.com 1375:amd.com 754:chipset 679:chipset 667:Chipset 582:C4350AL 578:Eden X4 570:Zhaoxin 534:Haswell 519:Nehalem 436:cpuinfo 428:and in 402:(EPT). 377:Sempron 361:Opteron 206:porting 2484:(2007) 2323:USENIX 1727:. 2013 929:(SLAT) 641:x86-64 602:x2APIC 576:& 434:/proc/ 426:sysctl 389:Sargas 365:Phenom 359:, and 218:x86-64 196:, and 190:Denali 183:ASPLOS 179:VMware 167:type 1 49:) and 2399:(PDF) 2392:Intel 2388:(PDF) 2363:(PDF) 2356:Intel 2352:(PDF) 2292:(PDF) 2285:Intel 2281:(PDF) 2229:(PDF) 2222:(PDF) 2140:(PDF) 2129:(PDF) 2055:(PDF) 2048:(PDF) 1973:(PDF) 1966:(PDF) 1912:(PDF) 1905:(PDF) 1885:4 May 1850:(PDF) 1843:(PDF) 1805:(PDF) 1725:Intel 1721:(PDF) 1675:(PDF) 1668:(PDF) 1644:(PDF) 1637:(PDF) 1583:(PDF) 1560:(PDF) 1350:(PDF) 1343:(PDF) 1293:(PDF) 1286:(PDF) 1237:(PDF) 1230:(PDF) 1188:(PDF) 1181:(PDF) 1157:(PDF) 1150:(PDF) 1109:(PDF) 1102:(PDF) 1048:(PDF) 1041:(PDF) 983:(PDF) 976:(PDF) 935:(MSI) 794:PCI-X 617:APICv 555:above 486:macOS 430:Linux 422:dmesg 385:Regor 381:Huron 323:AMD-V 295:80386 251:Intel 222:AMD64 55:AMD-V 43:Intel 2371:2015 2300:2015 2031:2010 1887:2018 1117:2010 1056:2010 860:NASA 762:UEFI 758:BIOS 719:and 653:RDNA 651:and 609:APIC 598:AVIC 508:BIOS 488:via 448:BIOS 432:via 420:via 412:The 367:and 347:and 253:and 211:SOSP 109:VxDs 93:POPF 74:ring 47:VT-x 1572:doi 768:or 766:PCI 760:or 717:DMA 649:GCN 424:or 407:Zen 312:die 264:MMU 255:AMD 198:Xen 128:MMU 51:AMD 2499:: 2390:. 2354:. 2325:. 2321:. 2317:. 2283:. 2269:^ 2192:. 2163:. 2131:. 2050:. 1940:. 1936:. 1877:. 1873:. 1723:. 1607:. 1568:10 1566:. 1562:. 1483:. 1453:. 1423:^ 1402:. 1373:. 1345:. 1183:. 1152:. 1125:^ 1064:^ 1023:^ 866:. 735:. 727:. 699:A 647:, 584:. 492:. 387:, 383:, 355:, 325:. 194:L4 192:, 177:. 162:. 69:. 2458:. 2433:. 2408:. 2373:. 2336:. 2302:. 2263:. 2238:. 2207:. 2178:. 2149:. 2114:. 2089:. 2064:. 2033:. 2007:. 1982:. 1951:. 1921:. 1889:. 1859:. 1807:. 1734:. 1684:. 1653:. 1622:. 1592:. 1574:: 1544:. 1519:. 1494:. 1468:. 1417:. 1388:. 1359:. 1328:. 1302:. 1271:. 1246:. 1215:. 1166:. 1119:. 1058:. 1017:. 992:. 615:( 596:( 462:. 220:( 115:. 53:( 45:( 20:)

Index

Intel VT-c
hardware-assisted virtualization
Intel
VT-x
AMD
AMD-V
protected mode
ring
Binary translation
POPF
trap-and-emulate virtualization
basic blocks
code patching
VxDs
self-modifying code
shadowed
paged virtual memory
MMU
virtualization manager
segment descriptors
device emulator
IBM System/370
type 1
Popek and Goldberg
VMware
ASPLOS
Denali
L4
Xen
paravirtualization

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