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The load–store unit usually includes a queue which acts as a waiting area for memory instructions, and the unit itself operates independently of other processor units.
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responsible for executing all load and store instructions, generating virtual addresses of load and store operations and loading data from
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1901:
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2007:
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90:
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1980:
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691:
550:
125:
106:
Some load–store units are also capable of executing simple fixed-point and/or integer operations.
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1111:
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661:
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330:
168:
86:
52:
Please help update this article to reflect recent events or newly available information.
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151:"IBM POWER8 processor core microarchitecture (PDF Download Available)"
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103:, and in such cases the term "load–store vector" may be used.
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48:may be compromised due to out-of-date information
237:Computer Architecture: A Quantitative Approach
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239:by John L. Hennessy, David A. Patterson 2011
8:
219:by Bruce Jacob, Spencer Ng, David Wang 2007
1274:Computer performance by orders of magnitude
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99:Load–store units may also be used in
7:
1245:Floating-point operations per second
89:or storing it back to memory from
25:
217:Memory Systems: Cache, DRAM, Disk
2171:Semiconductor device fabrication
34:
2146:History of general-purpose CPUs
373:Nondeterministic Turing machine
169:"Structure of Computer Systems"
326:Deterministic finite automaton
1:
1117:Simultaneous and heterogenous
1801:Integrated memory controller
1783:Translation lookaside buffer
982:Memory dependence prediction
425:Random-access stored program
378:Probabilistic Turing machine
1257:Synaptic updates per second
2223:
1661:Heterogeneous architecture
583:Orthogonal instruction set
353:Alternating Turing machine
341:Quantum cellular automaton
2151:Microprocessor chronology
2114:Dynamic frequency scaling
1269:Cache performance metrics
27:Part of a computer system
2166:Hardware security module
1509:Digital signal processor
1486:Graphics processing unit
1298:Graphics processing unit
197:"ARM Information Center"
2119:Dynamic voltage scaling
1902:Memory address register
1796:Branch target predictor
1760:Address generation unit
1503:Physics processing unit
1292:Central processing unit
1251:Transactions per second
1239:Instructions per second
1162:Array processing (SIMT)
306:Stored-program computer
131:Load–store architecture
116:Address-generation unit
1925:Hardwired control unit
1807:Memory management unit
1772:Memory management unit
1521:Secure cryptoprocessor
1515:Tensor Processing Unit
1497:Vision processing unit
1231:Cycles per instruction
1225:Instructions per cycle
1172:Associative processing
863:Instruction pipelining
285:Processor technologies
2207:Computer architecture
2008:Sum-addressed decoder
1754:Arithmetic logic unit
881:Classic RISC pipeline
835:Epiphany architecture
682:Motorola 68000 series
121:Arithmetic–logic unit
2129:Performance per watt
1707:replacement policies
1373:Package on a package
1263:Performance per watt
1167:Pipelined processing
937:Tomasulo's algorithm
742:Clipper architecture
598:Application-specific
311:Finite-state machine
71:computer engineering
2161:Digital electronics
1814:Instruction decoder
1766:Floating-point unit
1420:Soft microprocessor
1367:System in a package
942:Reservation station
472:Transport-triggered
126:Floating-point unit
81:) is a specialized
2033:Integrated circuit
1877:Processor register
1531:Baseband processor
876:Operand forwarding
336:Cellular automaton
201:infocenter.arm.com
2194:
2193:
2083:
2082:
1702:Instruction cache
1692:Scratchpad memory
1539:
1538:
1526:Network processor
1455:Network on a chip
1410:Ultra-low-voltage
1361:Multi-chip module
1204:
1203:
990:
989:
977:Branch prediction
954:Register renaming
848:
847:
830:VISC architecture
652:Quantum computing
647:VISC architecture
529:Secondary storage
445:Microarchitecture
405:Register machines
101:vector processing
67:
66:
16:(Redirected from
2214:
2156:Processor design
2048:Power management
1930:Instruction unit
1791:Branch predictor
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1438:System on a chip
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1220:Transistor count
1144:Flynn's taxonomy
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662:Addressing modes
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519:Memory hierarchy
383:Hypercomputation
301:Abstract machine
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46:factual accuracy
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2176:Tick–tock model
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2003:Address decoder
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1907:Program counter
1882:Status register
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1778:Load–store unit
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1390:Embedded system
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947:Re-order buffer
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899:Data dependency
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566:Instruction set
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546:Multiprocessing
514:Cache hierarchy
507:Register/memory
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331:Queue automaton
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176:Users.utcluj.ro
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75:load–store unit
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43:This article's
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2181:Pin grid array
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2015:Barrel shifter
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1998:Binary decoder
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1887:Stack register
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1481:AI accelerator
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1444:Multiprocessor
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1395:Microprocessor
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1383:By application
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1112:Hyperthreading
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1094:Multithreading
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871:Pipeline stall
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820:z/Architecture
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524:Virtual memory
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83:execution unit
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18:Load and store
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1976:Demultiplexer
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1897:Memory buffer
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1892:Register file
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1832:Combinational
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983:
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975:
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939:
938:
935:
933:
932:Scoreboarding
930:
929:
927:
925:
921:
915:
914:False sharing
912:
910:
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905:
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736:
733:
731:
728:
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723:
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718:
715:
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710:
708:
707:Stanford MIPS
705:
703:
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690:
688:
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584:
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571:
569:
568:architectures
563:
557:
554:
552:
549:
547:
544:
542:
539:
537:
536:Heterogeneous
534:
530:
527:
525:
522:
521:
520:
517:
515:
512:
508:
505:
503:
500:
498:
495:
493:
490:
489:
488:
487:Memory access
485:
483:
480:
478:
475:
473:
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468:
465:
461:
458:
457:
456:
453:
451:
448:
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442:
440:
438:
434:
426:
423:
421:
420:Random-access
418:
416:
413:
411:
408:
407:
406:
403:
401:
400:Stack machine
398:
396:
393:
389:
386:
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334:
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329:
327:
324:
322:
319:
317:
316:with datapath
314:
313:
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309:
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299:
298:
296:
294:
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286:
279:
274:
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260:
259:
256:
247:pages 293-295
246:
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202:
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192:
189:
178:. p. 320
177:
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136:
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109:
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102:
97:
94:
92:
88:
84:
80:
76:
72:
61:
49:
47:
41:
32:
31:
19:
2186:Chip carrier
2124:Clock gating
2043:Mixed-signal
1940:Write buffer
1917:Control unit
1777:
1729:Clock signal
1468:accelerators
1450:Cypress PSoC
1107:Simultaneous
924:Out-of-order
556:Neuromorphic
437:Architecture
395:Belt machine
388:Zeno machine
321:Hierarchical
236:
232:
216:
200:
191:
180:. Retrieved
175:
163:
155:ResearchGate
154:
145:
105:
98:
95:
78:
74:
68:
55:
44:
1971:Multiplexer
1935:Data buffer
1646:Single-core
1618:bit slicing
1476:Coprocessor
1331:Coprocessor
1212:performance
1134:Cooperative
1124:Speculative
1084:Distributed
1043:Superscalar
1028:Instruction
996:Parallelism
969:Speculative
801:System/3x0
673:Instruction
450:Von Neumann
363:Post–Turing
2091:management
1986:Multiplier
1847:Logic gate
1837:Sequential
1744:Functional
1724:Clock rate
1697:Data cache
1670:Components
1651:Multi-core
1639:Core count
1129:Preemptive
1033:Pipelining
1016:Bit-serial
959:Wide-issue
904:Structural
826:Tilera ISA
792:MicroBlaze
762:ETRAX CRIS
657:Comparison
502:Load–store
482:Endianness
245:012383872X
225:0123797519
182:2017-06-23
137:References
58:March 2017
2025:Circuitry
1945:Microcode
1869:Registers
1712:coherence
1687:CPU cache
1545:Word size
1210:Processor
854:Execution
757:DEC Alpha
735:Power ISA
551:Cognitive
358:Universal
91:registers
2201:Category
1963:Datapath
1656:Manycore
1628:variable
1466:Hardware
1102:Temporal
782:OpenRISC
477:Cellular
467:Dataflow
460:modified
227:page 298
110:See also
2139:Related
2070:Quantum
2060:Digital
2055:Boolean
1953:Counter
1852:Quantum
1613:512-bit
1608:256-bit
1603:128-bit
1446:(MPSoC)
1431:on chip
1429:Systems
1247:(FLOPS)
1060:Process
909:Control
891:Hazards
777:Itanium
772:Unicore
730:PowerPC
455:Harvard
415:Pointer
410:Counter
368:Quantum
2075:Switch
2065:Analog
1803:(IMC)
1774:(MMU)
1623:others
1598:64-bit
1593:48-bit
1588:32-bit
1583:24-bit
1578:16-bit
1573:15-bit
1568:12-bit
1405:Mobile
1321:Stream
1316:Barrel
1311:Vector
1300:(GPU)
1259:(SUPS)
1227:(IPC)
1079:Memory
1072:Vector
1055:Thread
1038:Scalar
840:Others
787:RISC-V
752:SuperH
721:Power
717:MIPS-X
692:PDP-11
541:Fabric
293:Models
243:
223:
87:memory
2131:(PPW)
2089:Power
1981:Adder
1857:Array
1824:Logic
1785:(TLB)
1768:(FPU)
1762:(AGU)
1756:(ALU)
1746:units
1682:Cache
1563:8-bit
1558:4-bit
1553:1-bit
1517:(TPU)
1511:(DSP)
1505:(PPU)
1499:(VPU)
1488:(GPU)
1457:(NoC)
1440:(SoC)
1375:(PoP)
1369:(SiP)
1363:(MCM)
1304:GPGPU
1294:(CPU)
1284:Types
1265:(PPW)
1253:(TPS)
1241:(IPS)
1233:(CPI)
1004:Level
815:S/390
810:S/370
805:S/360
747:SPARC
725:POWER
608:TRIPS
576:Types
172:(PDF)
2109:ACPI
1842:Glue
1734:FIFO
1677:Core
1415:ASIP
1356:CPLD
1351:FPOA
1346:FPGA
1341:ASIC
1194:SPMD
1189:MIMD
1184:MISD
1177:SWAR
1157:SIMD
1152:SISD
1067:Data
1050:Task
1021:Word
767:M32R
712:MIPS
675:sets
642:ZISC
637:NISC
632:OISC
627:MISC
620:EPIC
615:VLIW
603:EDGE
593:RISC
588:CISC
497:HUMA
492:NUMA
241:ISBN
221:ISBN
73:, a
2104:APM
2099:PMU
1991:CPU
1948:ROM
1719:Bus
1336:PAL
1011:Bit
797:LMC
702:ARM
697:x86
687:VAX
79:LSU
69:In
2203::
2038:3D
209:^
199:.
174:.
153:.
93:.
277:e
270:t
263:v
203:.
185:.
157:.
77:(
60:)
56:(
50:.
20:)
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