531:. When the two signals being compared are completely in-phase, the XOR gate's output will have a constant level of zero. When the two signals differ in phase by 1°, the XOR gate's output will be high for 1/180th of each cycle — the fraction of a cycle during which the two signals differ in value. When the signals differ by 180° — that is, one signal is high when the other is low, and vice versa — the XOR gate's output remains high throughout each cycle. This phase detector requires inputs that are symmetrical square waves, or nearly so.
495:-based double-balanced mixer) provides "the ultimate in phase noise floor performance" and "in system sensitivity." since it does not create finite pulse widths at the phase detector output. Another advantage of a mixer-based PD is its relative simplicity. Both the quadrature and simple multiplier phase detectors have an output that depends on the input amplitudes as well as the phase difference. In practice, the input amplitudes of input signals are normalized prior to input into the detector to remove the amplitude dependency.
43:
594:(which will happen when the instantaneous frequency difference is large), then the sign of the loop gain can reverse and start driving the VCO away from lock. The PFD has the advantage of producing an output even when the two signals being compared differ not only in phase but in frequency. A phase frequency detector prevents a false lock condition in PLL applications, in which the PLL synchronizes with the wrong phase of the input signal or with the wrong frequency (e.g., a harmonic of the input signal).
621:) instead of the original RCA/Motorola four flip-flops configurations, this problem could be elegantly overcome. For other types of phase-frequency detectors other, though possibly less-elegant, solutions exist to the dead zone phenomenon. Other solutions are necessary since the three-state phase-frequency detector does not work for certain applications involving randomized signal degradation, which can be found on the inputs to some signal regeneration systems (e.g.,
562:. When a phase detector based on logic gates is used in a PLL, it can quickly force the VCO to synchronize with an input signal, even when the frequency of the input signal differs substantially from the initial frequency of the VCO. Such phase detectors also have other desirable properties, such as better accuracy when there are only small phase differences between the two signals being compared and superior
100:
115:, but less well for pulses. In the case of square waves it acts as an XOR gate, which can also be made from NAND gates. On the middle left are two phase detectors: adding feedback and removing one NAND gate produces a time frequency detector. The delay line avoids a dead band. On the right is a charge pump with a filter at its output.
504:
478:
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The PFD improves the pull-in range and lock time over simpler phase detector designs such as multipliers or XOR gates. Those designs work well when the two input phases are already near lock or in lock, but perform poorly when the phase difference is too large. When the phase difference is too large
632:
phase detector employs a charge pump that supplies charge amounts in proportion to the phase error detected. Some have dead bands and some do not. Specifically, some designs produce both up and down control pulses even when the phase difference is zero. These pulses are small, nominally the same
178:
circuits may be classified in two types. A Type I detector is designed to be driven by analog signals or square-wave digital signals and produces an output pulse at the difference frequency. The Type I detector always produces an output waveform, which must be filtered to control the phase-locked
200:
such as sin(α) and cos(β). In general, computing the phase difference would involve computing the arcsine and arccosine of each normalized input (to get an ever-increasing phase) and doing a subtraction. Such an analog calculation is difficult. Fortunately, the calculation can be simplified by
633:
duration, and cause the charge pump to produce equal-charge positive and negative current pulses when the phase is perfectly matched. Phase detectors with this kind of control system don't exhibit a dead band and typically have lower minimum peak-to-peak jitter when used in PLLs.
183:(VCO). A type II detector is sensitive only to the relative timing of the edges of the input and reference pulses and produces a constant output proportional to phase difference when both signals are at the same frequency. This output will tend not to produce
546:
results in an analog voltage that is proportional to the phase difference between the two signals. The remainder of its characteristics are very similar to the analog mixer for capture range, lock time, reference spurious and low-pass filter requirements.
310:
The expression suggests a quadrature phase detector can be made by summing the outputs of two multipliers. The quadrature signals may be formed with phase shift networks. Two common implementations for multipliers are the double balanced diode mixer,
305:
195:
The phase detector needs to compute the phase difference of its two input signals. Let α be the phase of the first input and β be the phase of the second. The actual input signals to the phase detector, however, are not α and β, but rather
328:
609:
where the phases of inputs are close enough that the detector fires either both or neither of the charge pumps, for no total effect. Bang-bang phase detectors are simple but are associated with significant minimum peak-to-peak
483:
The first term provides the desired phase difference. The second term is a sinusoid at twice the reference frequency, so it can be filtered out. In the case of general waveforms the phase detector output is described with the
636:
In PLL applications it is frequently required to know when the loop is out of lock. The more complex digital phase-frequency detectors usually have an output that allows a reliable indication of an out-of-lock condition.
590:
introduced in the 1970s). The logic determines which of the two signals has a zero-crossing earlier or more often. When used in a PLL application, lock can be achieved even when it is off frequency.
218:
677:) light, it is said to measure the phase between the carriers. It is also possible to measure the delay between the envelopes of two short optical pulses by means of
922:
473:{\displaystyle \sin \alpha \cos \beta ={\sin(\alpha -\beta ) \over 2}+{\sin(\alpha +\beta ) \over 2}\approx {\alpha -\beta \over 2}+{\sin(\alpha +\beta ) \over 2}}
601:
charge pump phase frequency detector supplies current pulses with fixed total charge, either positive or negative, to the capacitor acting as an
649:
may require both the amplitude and the phase of a signal, to recover all the information encoded in that signal. One technique is to feed an
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689:, by sending a pulse into a nonlinear crystal. There the spectrum gets wider and at the edges the shape depends significantly on the phase.
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and a reference signal into the other port; the output of the detector will represent the phase difference between the signals.
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Instead of using two multipliers, a more common phase detector uses a single multiplier and a different trigonometric identity:
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930:
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originally made of four flip-flops (i.e., the phase-frequency detectors found in both the RCA CD4046 and the motorola MC4344
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The XOR detector compares well to the analog mixer in that it locks near a 90° phase difference and has a
300:{\displaystyle \alpha -\beta \approx \sin(\alpha -\beta )=\sin \alpha \cos \beta -\sin \beta \cos \alpha }
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In 1976 it was shown that by using a three-state phase frequency detector configuration (using only two
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circuit that generates a signal which represents the difference in phase between two signal inputs.
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Assume that the phase differences will be small (much less than 1 radian, for example). The
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An example CMOS digital phase frequency detector. Inputs are R and V while the outputs U
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Four phase detectors. Signal flow is from left to right. In the upper left is a
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146:(PLL). Detecting phase difference is important in other applications, such as
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in proportion to the phase difference. Applying the XOR gate's output to a
197:
650:
666:
611:
870:"Phase Locked Loops for High-Frequency Receivers and Transmitters-3"
503:
646:
605:. A phase detector for a bang-bang charge pump must always have a
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151:
98:
846:"Phase- and Delay-Locked Loop Clock Control in Digital Systems"
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phase between the envelope and the carrier of an optical pulse
36:
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output at twice the reference frequency. The output changes
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Devon
Fernandez and Sanjeev Manandhar (8 December 2003).
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Some signal processing techniques such as those used in
331:
221:
787:
472:
299:
142:The phase detector is an essential element of the
868:Mike Curtin and Paul O'Brien (July–August 1999).
550:Digital phase detectors can also be based on a
928:Phase-Lock Loop Applications Using the MAX9382
764:, pp. 17–23, 153, and several other pages
27:Electrical circuit detecting phase difference
8:
726:Cambridge University Press, Cambridge, 1989
614:, because of drift within the dead band.
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87:Learn how and when to remove this message
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755:
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50:This article includes a list of general
902:(2nd ed.), John Wiley & Sons,
773:
742:
740:
715:
923:Chapter 8 Modulators and Demodulators
790:Frequency Synthesizer Design Handbook
7:
685:. And it is possible to measure the
558:, or a logic circuit consisting of
187:in the control voltage of the VCO.
669:phase detectors are also known as
315:and the four-quadrant multiplier,
56:it lacks sufficient corresponding
25:
899:Frequency Synthesis by Phase-lock
722:Paul Horowitz and Winfield Hill,
810:Phase-Locked Loop Circuit Design
491:A mixer-based detector (e.g., a
41:
32:Autofocus § Phase detection
940:Phase-Lock Loop Phase Detectors
724:The Art of Electronics 2nd Ed.
519:A phase detector suitable for
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449:
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208:for the sine function and the
30:For autofocus in cameras, see
1:
486:phase detector characteristic
181:voltage-controlled oscillator
844:Zilic, Zeljko (2001-08-17).
523:signals can be made from an
828:"Digital Phase Locked Loop"
786:Crawford, James A. (1994),
210:sine angle addition formula
201:using some approximations.
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29:
896:Egan, William F. (2000),
641:Electronic phase detector
206:small-angle approximation
808:Wolaver, Dan H. (1991),
651:amplitude-limited signal
576:phase frequency detector
570:Phase frequency detector
661:Optical phase detectors
107:, which works well for
71:more precise citations.
960:Communication circuits
704:Differential amplifier
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515:feed to a charge pump.
499:Digital phase detector
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191:Analog phase detector
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584:asynchronous circuit
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174:Phase detectors for
955:Electronic circuits
675:amplitude modulated
653:into one port of a
933:2009-02-08 at the
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812:, Prentice Hall,
683:nonlinear crystal
679:cross correlation
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133:analog multiplier
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18:Phase comparator
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890:Further reading
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854:the original
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834:. Retrieved
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113:square waves
105:Gilbert cell
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556:charge pump
554:circuit, a
521:square wave
69:introducing
949:Categories
880:2006-04-25
860:2006-04-25
850:TechOnLine
836:2006-04-25
710:References
625:designs).
619:flip-flops
603:integrator
560:flip-flops
540:duty cycle
536:pulse wave
529:logic gate
313:diode ring
109:sine waves
52:references
607:dead band
599:bang-bang
459:β
453:α
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429:β
426:−
423:α
417:≈
405:β
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232:≈
229:β
226:−
223:α
198:sinusoids
158:systems,
150:control,
77:June 2018
931:Archived
693:See also
582:) is an
734:pg. 644
212:yield:
65:improve
906:
816:
798:
730:
667:optics
612:jitter
527:(XOR)
185:ripple
54:, but
831:(PDF)
681:in a
647:radar
511:and D
179:loop
170:Types
160:servo
152:radar
148:motor
137:logic
127:is a
904:ISBN
814:ISBN
796:ISBN
728:ISBN
154:and
111:and
665:In
588:ICs
580:PFD
444:sin
390:sin
357:sin
342:cos
333:sin
289:cos
280:sin
268:cos
259:sin
235:sin
135:or
123:or
951::
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