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would be. The bits where you'd think they would go don't have to be zero, they are used for other things (bit 63 is the NX bit, bits 52 through 62 are "available" for the OS to use as it wants). So in terms of anything specifiable by a programmer, even a system programmer, bits 52-63 of physical addresses (nor even of the PTEs they came from) are not the subject of any "must be zero" rule. They just can't be specified at all. There is no place to do so.
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61:
32:
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and the maximum size of a RAM module. These issues are hinted at in the lede but not mentioned in the article body - which means they shouldn't be in the lede. The section on CPU address limits leaves the reader with the impression that whatever the "address pin" count on the CPU is, that's the RAM limit and that's it. Wrong.
499:
between a set of high bits and a set of low bits, with an accompanying pin to indicate which is valid. The memory subsystem can latch these into two halves of a parallel register that contains the entire address. Thus the number of effective memory address bits could be double the number of "memory address pins".
608:
grossly inadequate. Again, there is perhaps room for an article that describes the evolution of memory support in OSs, why various decisions were made, etc. But a simple list of product characteristics is not what WP articles should be. Especially not when that information is already in the products' articles.
641:
Regarding the notion that the "unsupported" bits of a physical address being required to be zero... it's more like they can't be specified at all, at least not on x64 with 52-bit physical addresses supported. There is just no place in the PTE to specify what bits 52 through 63 of a physical address
607:
As with the chip-by-chip stuff there is little reason here to enumerate operating systems and describe the RAM limits of each - this info should go in each OS's article. Various OSs are different enough from each other that a simple list "this one supports this much, that one supports that much" is
603:
Why is this the starting point? What about OSs for minicomputers, superminis, mainframes? Nobody cares, other than historically, about the RAM limits of CP/M. If we do care about history - and as an encyclopedia, we should - then we should cover older OSs, and non-personal computer OSs. If we don't
541:
CPU address limits may be further constrained by the chipset. A large number of chipsets for
Pentium Pro, and later the 32-bit Xeons, do not support the entire possible address width of their processors. Then there are motherboard limitations such as the sheer number of RAM module sockets available
502:
For another example, on the
Pentium Pro and later Xeons that first supported PAE, PAE does increase the physical address width to 36 bits - but there were only 33 address pins on the CPU, numbered A3 through A36. Bits A0, A1, and A2 never leave the CPU, as RAM is always read and written in 8-byte
474:
A 64-bit address space is enough to give everyone on earth nearly 2 gigabytes of RAM - only problem is, even with 1 nanosecond RAM it would take 595 years to do the first pass through RAM on a power-on self test. In 1981 my desktop PC ran happily with 150 ns RAM and 385 kbytes - today you can get
498:
Even in the days when there were separate "memory address pins" you can't count the pins and say the maximum addressable memory is two to that number bytes. First, the assertion early on that all of the address pins must be valid at the same time is false. Address pins can be shared, for example
534:
is both unsourced and highly dubious. We do have serial interfaces to memory now, wherein addresses and data flow over the same wires. There are such things as multiplexed memory address/data pins. And even before such interfaces, not every CPU was designed with a goal of reducing this supposed
576:(1983), generated 24-bit external addresses with no performance penalty by multiplexing the top 8 bits of the address on the data bus pins during the Φ1 part of the machine cycle, which was unused by the 6502 CPU. (All other operations happen on the Φ2 part of the cycle.)
637:
Nor by the way is there a processor-imposed division of RAM between "kernel" and "user" space. In
Windows at least there's no such OS-imposed division either. The user/kernel division only exists in virtual address space.
633:
The "sign extension" mechanism alluded to is not "sometimes different" for phys/virt. It only happens for virtual addresses, not physical, and discussion of virtual addresses has no place in an article called "RAM limit".
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All references to limits of specific processors and operating systems should be left to their respective articles. There is no need to duplicate that information here. There is perhaps room for an article describing the
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by which RAM addresses are limited, but it will need to be far better-referenced than this one. I suspect the material would be just a couple of paragraphs that would better be placed in something like the
220:
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This entire article reads more like an essay written by someone in an AP high school class who maybe completed a project in digital logic. I do not believe it is salvageable in its present form.
471:
Trying to fix this. As usual, we have a list of specs and no mention of *why* the specs exist. Many technology articles in
Knowledge (XXG) read as if we'd raked through an Area 51 crash.
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chunks. These CPUs do allow physical memory to be addressed at the byte level, but anything smaller than an eight-byte chunk is all resolved in the CPU-to-memory cache.
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There is no reference in article about motherboard design imposing limitation in the maximal memory capacity. Seems like we should add some comments about it.
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42:
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Modern CPUs do not have separate "memory address pins". The memory addresses are multiplexed onto the same pins as the data from memory transactions.
709:
201:
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On x86, not if the OS enables protected memory. The "16 bits" is then merely the "displacement" from the base address of the current memory segment.
694:
143:
704:
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48 "nonzero" bits (actually from 0 upto 2^47 for user and from -2^47 to -0xfff...fff for kernel), sometimes different for phys/virt addreses.
389:
367:
671:
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performance problem. In some cases memory access was fast enough even without presenting all the bits of an address in parallel.
739:
72:
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page should include limits of other technologies/architectures, or be renamed 'Wintel RAM limits' or something similar.
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Note that this is wrong not only for modern CPUs, but even quite old ones. For example, the successor to the 6502, the
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must be valid at the same time, otherwise access to memory would be delayed and performance would be seriously reduced.
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78:
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on
Knowledge (XXG). If you would like to participate, please visit the project page, where you can join
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on
Knowledge (XXG). If you would like to participate, please visit the project page, where you can join
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And this assertion is the basis for this entire section, rendering the entire section questionable.
31:
617:
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Why does it say a 16-bit OS has 15/16M addressable ram...shouldn't a 16-bit OS only have 64K?
366:... there were electrical limits due to loading that limited some systems to three DIMM slots
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In fact... the opening sentence of the "CPU addressing limits" section:
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care about history then all of the "no longer current" stuff can go.
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Someone should write a counterpart article about harddrives, this:
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For performance reasons, all the parallel address lines of an
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multiple gigabytes, but the speed is hardly 10 times more. --
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article, though that one is also sadly lacking references.
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Start-Class
Computer hardware articles of Mid-importance
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The first major operating system for microcomputers ...
281:, a collaborative effort to improve the coverage of
130:, a collaborative effort to improve the coverage of
715:Start-Class software articles of Low-importance
623:Sign extension in virtual vs physical addresses
491:"Pins" counts are mostly wrong, also misleading
591:And then there's the operating systems section
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295:Knowledge (XXG):WikiProject Microsoft Windows
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750:Low-importance Microsoft Windows articles
730:Mid-importance Computer hardware articles
41:on 8 February 2009 (UTC). The result of
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745:Start-Class Microsoft Windows articles
725:Start-Class Computer hardware articles
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298:Template:WikiProject Microsoft Windows
152:Knowledge (XXG):WikiProject Computing
7:
275:This article is within the scope of
124:This article is within the scope of
77:It is of interest to the following
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700:Mid-importance Computing articles
660:Motherboard limitations (01/2019)
710:Low-importance software articles
445:Too MSDOS/Windows/Intel focussed
388:would be a good starting point.
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315:This article has been rated as
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1:
705:Start-Class software articles
627:A previous edit comment said
398:08:03, 6 September 2009 (UTC)
376:11:52, 15 February 2009 (UTC)
337:This article is supported by
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278:WikiProject Microsoft Windows
218:This article is supported by
194:This article is supported by
146:and see a list of open tasks.
586:13:17, 3 December 2021 (UTC)
221:Computer hardware task force
680:18:31, 1 January 2019 (UTC)
485:15:07, 24 August 2012 (UTC)
771:
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321:project's importance scale
301:Microsoft Windows articles
178:project's importance scale
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140:information technology
67:This article is rated
720:All Software articles
340:WikiProject Computing
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127:WikiProject Computing
71:on Knowledge (XXG)'s
197:WikiProject Software
595:Which starts out:
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158:Computing articles
73:content assessment
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670:comment added by
518:more on pin count
455:comment added by
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283:Microsoft Windows
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16:(Redirected from
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343:(assessed as
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672:86.98.87.149
666:— Preceding
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451:— Preceding
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79:WikiProjects
47:no consensus
46:
528:address bus
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69:Start-class
689:Categories
551:principles
574:WDC 65816
254:Computing
149:Computing
136:computing
132:computers
98:Computing
668:unsigned
453:unsigned
411:unsigned
103:Software
39:deletion
319:on the
176:on the
403:error?
138:, and
75:scale.
676:talk
648:talk
614:talk
582:talk
564:talk
509:talk
481:talk
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419:talk
394:talk
372:talk
45:was
644:Jeh
610:Jeh
578:Cjs
560:Jeh
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431:Jeh
311:Low
168:Mid
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