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that measured how much of the machine's time was spent in non-wait states; this was called the "efficiency meter." When running the floating-point interpretive system, the efficiency meter tended to show around 50%, but if prospective customers were visiting, a more efficient program could be loaded for demonstration purposes.
322:. The operation bits determined things as the sign of the data to be used; if the accumulator was cleared (changing an addition into a load), if a rotation was to be applied, and so on. Also, there was an operation bits that determined if the next instruction would come from register or memory, or the sum of both.
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Since a magnetic drum does not support random access, some time is lost waiting for an instruction or piece of data become available. In a poorly written program, the average wait time could be half the drum rotation time, but there were ways to reduce this. A notable feature of the ZEBRA was a meter
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Thanks to a clever design, the multiplication routine needed only one instruction per bit, and the division routine two instructions per bit, so that multiplication and division were relatively fast, with a minimum of hardware. Programming aids included the Normal Code (assembler), trace utility, a
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Each bit of the operation field had a distinct meaning and could be used in nearly any combination, leading to many elegant tricks that today might be considered the domain of
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In contrast to most processors, the ZEBRA didn't have different types of instructions. Instead, the operation of an instruction was controlled by fifteen bits in the
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Hoffmann W. (Eds) Digitale
Informationswandler / Digital Information Processors / Dispositifs traitant des informations numériques. Vieweg+Teubner Verlag, Wiesbaden.
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holding 8K words organised as 256 tracks of 32 instructions; accumulators were also implemented as recirculating drum tracks in a manner similar to that used in the
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494:"Standard Telephones and Cables Limited, London | Selling the Computer Revolution | Computer History Museum"
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floating-point interpretive system, the Simple Code, the Matrix
Interpretive Scheme, and an Algol compiler.
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554:"Less is more in the Fifties. Encounters between Logical Minimalism and Computer Design during the 1950s"
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translated Very Simple Binary
Automatic Calculator) was one of the first computers to be designed in the
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258:") and one of the first Dutch computers to be commercially available. It was designed by
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ALU primitives add, subtract, shift right, shift left, and increment.
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machine with a 33-bit word length. Storage was provided by a magnetic
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Rod
Delamere’s reminiscences on the Stantec ZEBRA at Newport in 1961
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Mol, Liesbeth De; Bullynck, Maarten; Daylight, Edgar G. (2018).
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152:. Unsourced material may be challenged and removed.
415:The Logical Principles of Some Simple Computers.
547:. MENU -> Memories -> Computer Memories.
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1605:Computer performance by orders of magnitude
53:Learn how and when to remove these messages
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468:The instruction set of the ZEBRA in detail
2543:Science and technology in the Netherlands
264:Netherlands Post, Telegraph and Telephone
230:Learn how and when to remove this message
212:Learn how and when to remove this message
110:Learn how and when to remove this message
478:De ZEBRA, de eerste computer van de RuG
73:This article includes a list of general
558:IEEE Annals of the History of Computing
353:
564:. 5.1 From ZERO to ZEBRA (pp. 16-20).
488:Stantec ZEBRA emulator using Python-Tk
248:Zeer Eenvoudige Binaire Reken Automaat
2553:Computers designed in the Netherlands
7:
1576:Floating-point operations per second
150:adding citations to reliable sources
428:van der Poel, Willem Louis (1962).
430:"Micro-programming and Trickology"
79:it lacks sufficient corresponding
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541:"STL Harlow Quarter Century Club"
311:(or I/O) address, and the 15-bit
34:This article has multiple issues.
2502:Semiconductor device fabrication
536:Memories about the Stantec ZEBRA
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16:Early computer using drum memory
2477:History of general-purpose CPUs
704:Nondeterministic Turing machine
368:Parliamentary Debates (Hansard)
361:Roberts, Goronwy (1967-03-06).
137:needs additional citations for
42:or discuss these issues on the
657:Deterministic finite automaton
268:Standard Telephones and Cables
1:
1448:Simultaneous and heterogenous
2132:Integrated memory controller
2114:Translation lookaside buffer
1313:Memory dependence prediction
756:Random-access stored program
709:Probabilistic Turing machine
1588:Synaptic updates per second
442:10.1007/978-3-322-96260-7_7
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1992:Heterogeneous architecture
914:Orthogonal instruction set
684:Alternating Turing machine
672:Quantum cellular automaton
506:BitSavers document archive
254:, (the first one was the "
2482:Microprocessor chronology
2445:Dynamic frequency scaling
1600:Cache performance metrics
417:Thesis, Amsterdam (1956).
2497:Hardware security module
1840:Digital signal processor
1817:Graphics processing unit
1629:Graphics processing unit
390:"Willem L. van der Poel"
273:The ZEBRA was a binary,
2450:Dynamic voltage scaling
2233:Memory address register
2127:Branch target predictor
2091:Address generation unit
1834:Physics processing unit
1623:Central processing unit
1582:Transactions per second
1570:Instructions per second
1493:Array processing (SIMT)
637:Stored-program computer
498:www.computerhistory.org
94:more precise citations.
2256:Hardwired control unit
2138:Memory management unit
2103:Memory management unit
1852:Secure cryptoprocessor
1846:Tensor Processing Unit
1828:Vision processing unit
1562:Cycles per instruction
1556:Instructions per cycle
1503:Associative processing
1194:Instruction pipelining
616:Processor technologies
532:www.alanflavell.org.uk
473:Evolution of the ZEBRA
2339:Sum-addressed decoder
2085:Arithmetic logic unit
1212:Classic RISC pipeline
1166:Epiphany architecture
1013:Motorola 68000 series
570:10.1353/ahc.2018.0002
394:IEEE Computer Society
161:"ZEBRA" computer
2460:Performance per watt
2038:replacement policies
1704:Package on a package
1594:Performance per watt
1498:Pipelined processing
1268:Tomasulo's algorithm
1073:Clipper architecture
929:Application-specific
642:Finite-state machine
146:improve this article
2492:Digital electronics
2145:Instruction decoder
2097:Floating-point unit
1751:Soft microprocessor
1698:System in a package
1273:Reservation station
803:Transport-triggered
502:Marketing brochures
260:Willem van der Poel
2364:Integrated circuit
2208:Processor register
1862:Baseband processor
1207:Operand forwarding
667:Cellular automaton
298:Gerrit van der Mey
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1692:Multi-chip module
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1285:Register renaming
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983:Quantum computing
978:VISC architecture
860:Secondary storage
776:Microarchitecture
736:Register machines
545:www.stlqcc.org.uk
528:"Alan J. Flavell"
516:www.swansea.ac.uk
451:978-3-322-96126-6
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2307:Demultiplexer
2305:
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2228:Memory buffer
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2223:Register file
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2163:Combinational
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1263:Scoreboarding
1261:
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1245:False sharing
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1049:
1046:
1044:
1041:
1039:
1038:Stanford MIPS
1036:
1034:
1031:
1029:
1026:
1024:
1021:
1019:
1016:
1014:
1011:
1010:
1008:
1002:
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989:
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899:architectures
894:
888:
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868:
867:Heterogeneous
865:
861:
858:
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851:
848:
846:
843:
839:
836:
834:
831:
829:
826:
824:
821:
820:
819:
818:Memory access
816:
814:
811:
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801:
799:
796:
792:
789:
788:
787:
784:
782:
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771:
769:
765:
757:
754:
752:
751:Random-access
749:
747:
744:
742:
739:
738:
737:
734:
732:
731:Stack machine
729:
727:
724:
720:
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712:
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681:
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668:
665:
663:
660:
658:
655:
653:
650:
648:
647:with datapath
645:
644:
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638:
635:
633:
630:
629:
627:
625:
621:
617:
610:
605:
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579:
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461:
453:
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431:
423:
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205:
194:
191:
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184:
180:
177:
173:
170:
166:
163: –
162:
158:
157:Find sources:
151:
147:
141:
140:
135:This article
133:
129:
124:
123:
114:
111:
103:
93:
89:
83:
82:
76:
71:
62:
61:
56:
54:
47:
46:
41:
40:
35:
30:
21:
20:
2517:Chip carrier
2455:Clock gating
2374:Mixed-signal
2271:Write buffer
2248:Control unit
2060:Clock signal
1799:accelerators
1781:Cypress PSoC
1438:Simultaneous
1255:Out-of-order
887:Neuromorphic
768:Architecture
726:Belt machine
719:Zeno machine
652:Hierarchical
561:
557:
544:
531:
521:
515:
497:
433:
422:
414:
409:
397:. Retrieved
393:
384:
373:. Retrieved
366:
356:
343:
339:
324:
317:
302:
295:
287:
272:
247:
243:
241:
226:
208:
199:
189:
182:
175:
168:
156:
144:Please help
139:verification
136:
106:
97:
78:
50:
43:
37:
36:Please help
33:
2302:Multiplexer
2266:Data buffer
1977:Single-core
1949:bit slicing
1807:Coprocessor
1662:Coprocessor
1543:performance
1465:Cooperative
1455:Speculative
1415:Distributed
1374:Superscalar
1359:Instruction
1327:Parallelism
1300:Speculative
1132:System/3x0
1004:Instruction
781:Von Neumann
694:Post–Turing
436:: 269–311.
363:"Computers"
292:Programming
283:Bendix G-15
279:drum memory
275:two-address
252:Netherlands
202:August 2012
100:August 2012
92:introducing
2532:Categories
2422:management
2317:Multiplier
2178:Logic gate
2168:Sequential
2075:Functional
2055:Clock rate
2028:Data cache
2001:Components
1982:Multi-core
1970:Core count
1460:Preemptive
1364:Pipelining
1347:Bit-serial
1290:Wide-issue
1235:Structural
1157:Tilera ISA
1123:MicroBlaze
1093:ETRAX CRIS
988:Comparison
833:Load–store
813:Endianness
399:17 January
375:2017-07-08
349:References
172:newspapers
75:references
39:improve it
2356:Circuitry
2276:Microcode
2200:Registers
2043:coherence
2018:CPU cache
1876:Word size
1541:Processor
1185:Execution
1088:DEC Alpha
1066:Power ISA
882:Cognitive
689:Universal
45:talk page
2294:Datapath
1987:Manycore
1959:variable
1797:Hardware
1433:Temporal
1113:OpenRISC
808:Cellular
798:Dataflow
791:modified
578:13715301
327:Zuse Z22
309:register
270:, Ltd.
2470:Related
2401:Quantum
2391:Digital
2386:Boolean
2284:Counter
2183:Quantum
1944:512-bit
1939:256-bit
1934:128-bit
1777:(MPSoC)
1762:on chip
1760:Systems
1578:(FLOPS)
1391:Process
1240:Control
1222:Hazards
1108:Itanium
1103:Unicore
1061:PowerPC
786:Harvard
746:Pointer
741:Counter
699:Quantum
262:of the
186:scholar
88:improve
2406:Switch
2396:Analog
2134:(IMC)
2105:(MMU)
1954:others
1929:64-bit
1924:48-bit
1919:32-bit
1914:24-bit
1909:16-bit
1904:15-bit
1899:12-bit
1736:Mobile
1652:Stream
1647:Barrel
1642:Vector
1631:(GPU)
1590:(SUPS)
1558:(IPC)
1410:Memory
1403:Vector
1386:Thread
1369:Scalar
1171:Others
1118:RISC-V
1083:SuperH
1052:Power
1048:MIPS-X
1023:PDP-11
872:Fabric
624:Models
576:
448:
188:
181:
174:
167:
159:
77:, but
2462:(PPW)
2420:Power
2312:Adder
2188:Array
2155:Logic
2116:(TLB)
2099:(FPU)
2093:(AGU)
2087:(ALU)
2077:units
2013:Cache
1894:8-bit
1889:4-bit
1884:1-bit
1848:(TPU)
1842:(DSP)
1836:(PPU)
1830:(VPU)
1819:(GPU)
1788:(NoC)
1771:(SoC)
1706:(PoP)
1700:(SiP)
1694:(MCM)
1635:GPGPU
1625:(CPU)
1615:Types
1596:(PPW)
1584:(TPS)
1572:(IPS)
1564:(CPI)
1335:Level
1146:S/390
1141:S/370
1136:S/360
1078:SPARC
1056:POWER
939:TRIPS
907:Types
574:S2CID
482:Dutch
244:ZEBRA
193:JSTOR
179:books
2440:ACPI
2173:Glue
2065:FIFO
2008:Core
1746:ASIP
1687:CPLD
1682:FPOA
1677:FPGA
1672:ASIC
1525:SPMD
1520:MIMD
1515:MISD
1508:SWAR
1488:SIMD
1483:SISD
1398:Data
1381:Task
1352:Word
1098:M32R
1043:MIPS
1006:sets
973:ZISC
968:NISC
963:OISC
958:MISC
951:EPIC
946:VLIW
934:EDGE
924:RISC
919:CISC
828:HUMA
823:NUMA
480:(in
446:ISBN
401:2022
371:. HC
256:ARRA
242:The
165:news
2435:APM
2430:PMU
2322:CPU
2279:ROM
2050:Bus
1667:PAL
1342:Bit
1128:LMC
1033:ARM
1028:x86
1018:VAX
566:doi
438:doi
329:or
148:by
2534::
2369:3D
572:.
562:40
560:.
556:.
543:.
530:.
514:.
496:.
444:.
432:.
413:*
392:.
365:.
315:.
300:.
48:.
608:e
601:t
594:v
580:.
568::
534:.
518:.
500:.
484:)
454:.
440::
426:*
403:.
378:.
246:(
233:)
227:(
215:)
209:(
204:)
200:(
190:·
183:·
176:·
169:·
142:.
113:)
107:(
102:)
98:(
84:.
55:)
51:(
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