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If a memory address operand is not 16-byte-aligned, a general protection exception (#GP) will be raised. This can cause strange interoperability bugs when ordinary code calls an external code that was compiled with the assumption of a 16-byte-aligned stack frame boundary.
32:. This action involves copying a pair of numbers to temporary space in the processor for use in other computations. MOVAPD is one of the fastest ways to accomplish this effect - it is faster than the comparable instruction MOVSD.
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Intel 64 and IA-32 Architectures
Software Developer's Manual Volume 2A: Instruction Set Reference, A-M
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246:"The Hell that MOVAPS Hath Wrought | Mystery Bail Theater"
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Intel 64 and IA-32 Architectures
Optimization Reference Manual
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is the name for a specific action performable by modern
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The destination operand can be either an XMM register (
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Specifically, MOVAPD causes a 16-byte-aligned packed-
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171:void _mm_store_pd(double* p, __m128 a)
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373:. You can help Knowledge (XXG) by
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18:x86 assembly programming language
425:Programming language topic stubs
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122:__m128 _mm_load_pd(double* p)
60:Assembly (AT&T syntax)
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39:source to be copied to an
349:x86 instruction listings
68:intrinsic equivalent(s)
57:Assembly (Intel syntax)
195:) or a memory address (
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369:-related article is a
367:programming-language
203:Potential Exceptions
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414:Categories
212:References
131:66 0F 29
82:66 0F 28
324:MOVSLDUP
319:MOVSHDUP
309:MOVMSKPD
305:MOVMSKPS
260:See also
218:gcc info
314:MOVNTPS
291:MOVLHPS
277:MOVHLPS
272:MOVDDUP
268:/MOVAPD
155:MOVAPD
139:MOVAPD
106:MOVAPD
90:MOVAPD
54:Opcode
37:doubles
16:In the
342:MOVUPD
338:MOVUPS
300:MOVLPD
296:MOVLPS
286:MOVHPD
282:MOVHPS
266:MOVAPS
22:MOVAPD
365:This
333:MOVSD
329:MOVSS
47:Usage
28:with
371:stub
197:m128
193:xmm1
186:m128
182:xmm2
165:m128
161:xmm1
157:xmm2
149:xmm2
145:m128
141:xmm1
116:xmm1
112:m128
108:xmm2
100:m128
96:xmm2
92:xmm1
188:).
73:gcc
65:icc
41:XMM
416::
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133:/r
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84:/r
20:,
402:e
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388:v
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