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168:). When the source operand is an XMM register, the destination operand must be a memory address. When the source operand is a memory address, the destination operand must be an XMM register.
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Specifically, MOVHPD causes the value at an 8-byte memory region to be either copied to or assigned from the upper half of an XMM register.
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Intel 64 and IA-32 Architectures
Software Developer's Manual Volume 2A: Instruction Set Reference, A-M
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Note that the lower half of the XMM register is unaffected by this operation.
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is the name for a specific action performable by modern
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30:2nd-generation Streaming SIMD Extensions (SSE2)
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106:__m128d _mm_loadh_pd(__m128d a, double *dp)
147:void _mm_storeh_pd(double *pd, __m128d a)
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18:x86 assembly programming language
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52:Assembly (AT&T syntax)
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326:x86 instruction listings
60:intrinsic equivalent(s)
49:Assembly (Intel syntax)
162:) or a memory address (
191:This section is empty.
175:Potential exceptions
233:, November, 2006.
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68:built-in(s)
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214:References
202:July 2010
115:66 0F 17
74:66 0F 16
334:Category
302:MOVSLDUP
297:MOVSHDUP
287:MOVMSKPD
283:MOVMSKPS
238:See also
292:MOVNTPS
269:MOVLHPS
265:/MOVHPD
258:MOVHLPS
253:MOVDDUP
135:MOVHPD
123:MOVHPD
94:MOVHPD
82:MOVHPD
46:Opcode
16:In the
320:MOVUPD
316:MOVUPS
278:MOVLPD
274:MOVLPS
263:MOVHPS
248:MOVAPD
244:MOVAPS
22:MOVHPD
311:MOVSD
307:MOVSS
226:page.
39:Usage
28:with
224:info
221:gcc
197:.
165:m64
159:xmm
141:m64
137:xmm
129:xmm
125:m64
100:xmm
96:m64
88:m64
84:xmm
65:gcc
57:icc
336::
139:,
127:,
117:/r
98:,
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76:/r
20:,
318:/
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204:)
200:(
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