31:
465:
of the digital system are satisfied by the logic stages. Each logic stage introduces delay that affects timing performance, and the timing performance of the digital design can be evaluated relative to the timing requirements by a timing analysis. Often special consideration must be made to meet the
439:
lines become significantly more resistive as line dimensions are decreased. This increased line resistance is one of the primary reasons for the increasing significance of clock distribution on synchronous performance. Finally, the control of any differences and uncertainty in the arrival times of
193:
so long as the inputs to latches on one phase only depend on outputs from latches on the other phase. Since a gated latch uses only four gates versus six gates for an edge-triggered flip-flop, a two phase clock can lead to a design with a smaller overall gate count but usually at some penalty in
152:
A clock signal might also be gated, that is, combined with a controlling signal that enables or disables the clock signal for a certain part of a circuit. This technique is often used to save power by effectively shutting down portions of a digital circuit when they are not in use, but comes at a
715:
Motorola's
Component Products Department sold hybrid ICs that included a quartz oscillator. These IC produced the two-phase non-overlapping waveforms the 6800 and 8080 required. Later Intel produced the 8224 clock generator and Motorola produced the MC6875. The Intel 8085 and the Motorola 6802
317:
The vast majority of digital devices do not require a clock at a fixed, constant frequency. As long as the minimum and maximum clock periods are respected, the time between clock edges can vary widely from one edge to the next and back again. Such digital devices work just as well with a clock
397:, is a metal grid. In a large microprocessor, the power used to drive the clock signal can be over 30% of the total power used by the entire chip. The whole structure with the gates at the ends and all amplifiers in between have to be loaded and unloaded every cycle. To save energy,
208:
microprocessors. The next generation of microprocessors incorporated the clock generation on chip. The 8080 uses a 2 MHz clock but the processing throughput is similar to the 1 MHz 6800. The 8080 requires more clock cycles to execute a processor instruction. Due to their
133:. In some cases, more than one clock cycle is required to perform a predictable action. As ICs become more complex, the problem of supplying accurate and synchronized clocks to all the circuits becomes increasingly difficult. The preeminent example of such complex chips is the
416:) distributes the clock signal(s) from a common point to all the elements that need it. Since this function is vital to the operation of a synchronous system, much attention has been given to the characteristics of these clock signals and the
487:
Novel structures are currently under development to ameliorate these issues and provide effective solutions. Important areas of research include resonant clocking techniques ("resonant clock mesh"), on-chip optical interconnect, and
304:
of the microprocessor. This allows the CPU to operate at a much higher frequency than the rest of the computer, which affords performance gains in situations where the CPU does not need to wait on an external factor (like memory or
483:
The delay components that make up a general synchronous system are composed of the following three individual subsystems: the memory storage elements, the logic elements, and the clocking circuitry and distribution network.
330:
do not even have a maximum clock period (or in other words, minimum clock frequency); such devices can be slowed and paused indefinitely, then resumed at full clock speed at any later time.
628:
213:, the 6800 has a minimum clock rate of 100 kHz and the 8080 has a minimum clock rate of 500 kHz. Higher speed versions of both microprocessors were released by 1976.
427:
and operate at the highest speeds of any signal within the synchronous system. Since the data signals are provided with a temporal reference by the clock signals, the clock
370:
with the same voltage range. Differential signals radiate less strongly than a single line. Alternatively, a single line shielded by power and ground lines can be used.
373:
In CMOS circuits, gate capacitances are charged and discharged continually. A capacitor does not dissipate energy, but energy is wasted in the driving transistors. In
224:
uses the same 2-phase logic internally, but also includes a two-phase clock generator on-chip, so it only needs a single phase clock input, simplifying system design.
420:
used in their distribution. Clock signals are often regarded as simple control signals; however, these signals have some very special characteristics and attributes.
242:, requiring a four phase clock input consisting of four separate, non-overlapping clock signals. This was particularly common among early microprocessors such as the
726:
860:
power consumed by the clock subsystem of EV6 was about 32% of the total core power. To compare, it was about 25% for EV56, about 37% for EV5 and about 40% for EV4.
129:(ICs) of sufficient complexity use a clock signal in order to synchronize different parts of the circuit, cycling at a rate slower than the worst-case internal
476:. The proper design of the clock distribution network helps ensure that critical timing requirements are satisfied and that no race conditions exist (see also
676:
177:, a "two-phase clock" refers to clock signals distributed on 2 wires, each with non-overlapping pulses. Traditionally one wire is called "phase 1" or "φ1" (
489:
612:
586:
634:
381:
can be used to store this energy and reduce the energy loss, but they tend to be quite large. Alternatively, using a sine wave clock, CMOS
210:
842:
113:. Circuits using the clock signal for synchronization may become active at either the rising edge, falling edge, or, in the case of
1063:
1020:
968:
466:
timing requirements. For example, the global performance and local timing requirements may be satisfied by the careful insertion of
940:
1027:
872:
Chan, S. C.; Shepard, K. L.; Restle, P. J. (2005). "Uniform-phase uniform-amplitude resonant-load global clock distributions".
339:
94:
741:
431:
must be particularly clean and sharp. Furthermore, these clock signals are particularly affected by technology scaling (see
270:
Four phase clocks have only rarely been used in newer CMOS processors such as the DEC WRL MultiTitan microprocessor. and in
200:(MOS) ICs typically used dual clock signals (a two-phase clock) in the 1970s. These were generated externally for both the
1043:
261:
1054:
790:; Tang, J.F. (1989). "A 20-MIPS sustained 32-bit CMOS microprocessor with high ratio of sustained to peak performance".
522:
327:
343:
682:
532:
502:
323:
250:
197:
181:
1), the other wire carries the "phase 2" or "φ2" signal. Because the two phases are guaranteed non-overlapping,
1082:
190:
186:
165:
use only a "single phase clock" – in other words, all clock signals are (effectively) transmitted on 1 wire.
765:
547:
462:
454:
367:
83:
654:
609:
440:
the clock signals can severely limit the maximum performance of the entire system and create catastrophic
359:
243:
146:
1077:
537:
507:
472:
319:
98:
573:
393:
The most effective way to get the clock signal to every part of a chip that needs it, with the lowest
82:
circuit, the most common type of digital circuit, the clock signal is applied to all storage devices,
881:
799:
552:
467:
374:
142:
458:
436:
221:
174:
162:
1064:
https://web.archive.org/web/20100711135550/http://www.sigda.org/newsletter/2005/eNews_051201.html
897:
417:
138:
126:
75:
1005:
1016:
964:
517:
382:
130:
79:
350:
rather than square waves as their clock signals, because square waves contain high-frequency
889:
848:
807:
787:
582:
527:
297:
287:
239:
233:
114:
63:
988:
1047:
995:
616:
275:
254:
102:
43:
915:
885:
826:
803:
702:
1001:
432:
134:
87:
1071:
996:"High-performance and Low-power Clock Network Synthesis in the Presence of Variation"
293:
201:
901:
974:
956:
449:
398:
355:
306:
55:
441:
182:
106:
39:
1040:
928:
740:(3). Cupertino CA: Microcomputer Associates: 7. September 1975. Archived from
512:
477:
394:
301:
271:
205:
110:
893:
811:
363:
347:
137:, the central component of modern computers, which relies on a clock from a
86:
and latches, and causes them all to change state simultaneously, preventing
71:
67:
17:
30:
428:
378:
351:
257:
979:"Clock Distribution Networks in Synchronous Digital Integrated Circuits"
1011:
V. G. Oklobdzija, V. M. Stojanovic, D. M. Markovic, and N. M. Nedovic,
300:" which multiplies a lower frequency external clock to the appropriate
59:
1058:
978:
542:
424:
413:
385:
and energy-saving techniques, the power requirements can be reduced.
264:
246:
1006:"Algorithmic Tuning of Clock Trees and Derived Non-Tree Structures"
117:, both in the rising and in the falling edges of the clock cycle.
29:
470:
into equally spaced time windows to satisfy critical worst-case
217:
66:) which oscillates between a high and a low state at a constant
1032:
Electronic
Systems Design Engineering Incorporating Chip Design
1013:
Digital System
Clocking: High-Performance and Low-Power Aspects
991:, International Symposium on Physical Design, Intel, IBM, 2010.
444:
in which an incorrect data signal may latch within a register.
178:
989:"ISPD 2010 High Performance Clock Network Synthesis Contest"
929:"Modeling and optimization of low power resonant clock mesh"
585:, Digital Systems Department. October 1968 . List DSD 68/6.
318:
generator that dynamically changes its frequency, such as
1008:, in Proc. Int'l. Conf. Comp.-Aided Design (ICCAD), 2011.
961:
1051:
354:
that can interfere with the analog circuitry and cause
678:
Cell cgf104: Two phase non-overlapping clock generator
575:
FM1600B Microcircuit
Computer Ferranti Digital Systems
274:'s Fast14 technology. Most modern microprocessors and
767:
Concepts in digital imaging - Four Phase CCD Clocking
423:
Clock signals are typically loaded with the greatest
656:
Concepts in
Digital Imaging - Two Phase CCD Clocking
633:, Tams-www.informatik.uni-hamburg.de, archived from
105:. The most common clock signal is in the form of a
998:, Ph.D. dissertation, University of Michigan, 2011.
927:Wulong Liu; Guoqing Chen; Yu Wang; Huazhong Yang.
716:include this circuitry on the microprocessor chip.
366:, and therefore half the timing uncertainty, of a
220:requires an external 2-phase clock generator. The
153:cost of increased complexity in timing analysis.
713:(8). New York: McGraw-Hill: 159. April 15, 1976.
453:systems consist of cascaded banks of sequential
985:, Vol. 89, No. 5, pp. 665–692, May 2001.
828:Intel's Atom Architecture: The Journey Begins
8:
412:, when this network forms a tree such as an
362:, because this type of signal has twice the
916:"Resonant clock mega-mesh for the IBM z13"
630:Two-phase non-overlapping clock generator
844:Alpha: The history in facts and comments
401:temporarily shuts off part of the tree.
565:
1023:, IEEE Press/Wiley-Interscience, 2003.
7:
874:IEEE Journal of Solid-State Circuits
792:IEEE Journal of Solid-State Circuits
461:between each set of registers. The
238:Some early integrated circuits use
194:design difficulty and performance.
358:. Such sine wave clocks are often
74:to synchronize actions of digital
25:
681:, Hpc.msstate.edu, archived from
320:spread-spectrum clock generation
1028:"The power of RTL Clock-gating"
703:"How to drive a microprocessor"
592:from the original on 2020-05-19
1062:Original text is available at
727:"Intel's Higher Speed 8080 μP"
1:
27:Timing of electronic circuits
581:. Bracknell, Berkshire, UK:
523:Electronic design automation
344:analog-to-digital converters
50:(historically also known as
42:and especially synchronous
1099:
406:clock distribution network
285:
278:use a single-phase clock.
231:
141:. The only exceptions are
841:Paul V. Bolotoff (2007),
825:Anand Lal Shimpi (2008),
615:November 9, 2007, at the
533:Integrated circuit design
503:Bit-synchronous operation
324:dynamic frequency scaling
251:Texas Instruments TMS9900
198:Metal oxide semiconductor
187:edge-triggered flip-flops
894:10.1109/JSSC.2004.838005
812:10.1109/JSSC.1989.572612
326:, etc. Devices that use
313:Dynamic frequency change
983:Proceedings of the IEEE
548:Pulse-per-second signal
463:functional requirements
34:Clock signal and legend
941:"Clock tree synthesis"
770:, Micro.magnet.fsu.edu
659:, Micro.magnet.fsu.edu
244:National Semiconductor
35:
1050:'s column in the ACM
538:Interface Logic Model
508:Clock domain crossing
490:local synchronization
340:mixed-signal circuits
189:can be used to store
143:asynchronous circuits
99:electronic oscillator
33:
734:Microcomputer Digest
553:Self-clocking signal
375:reversible computing
360:differential signals
342:, such as precision
260:chipset used in the
175:synchronous circuits
163:synchronous circuits
1034:, January 20, 2007.
971:, IEEE Press. 1995.
914:David Shan et. al.
886:2005IJSSC..40..102C
804:1989IJSSC..24.1348J
459:combinational logic
437:global interconnect
418:electrical networks
368:single-ended signal
222:MOS Technology 6502
127:integrated circuits
70:and is used like a
54:) is an electronic
1046:2014-08-12 at the
473:timing constraints
468:pipeline registers
383:transmission gates
157:Single-phase clock
139:crystal oscillator
131:propagation delays
97:is produced by an
36:
518:Design flow (EDA)
447:Most synchronous
191:state information
147:asynchronous CPUs
80:synchronous logic
16:(Redirected from
1090:
944:
938:
932:
925:
919:
912:
906:
905:
869:
863:
862:
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847:, archived from
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583:Ferranti Limited
580:
570:
528:Four-phase logic
435:), in that long
298:clock multiplier
288:Clock multiplier
282:Clock multiplier
276:microcontrollers
240:four-phase logic
234:Four-phase logic
121:Digital circuits
115:double data rate
44:digital circuits
21:
1098:
1097:
1093:
1092:
1091:
1089:
1088:
1087:
1083:Synchronization
1068:
1067:
1061:
1048:Wayback Machine
1037:
975:Eby G. Friedman
957:Eby G. Friedman
953:
951:Further reading
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617:Wayback Machine
610:Two-phase clock
608:
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595:
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498:
492:methodologies.
442:race conditions
391:
338:Some sensitive
336:
315:
290:
284:
255:Western Digital
236:
230:
171:
169:Two-phase clock
159:
123:
103:clock generator
88:race conditions
28:
23:
22:
15:
12:
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5:
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798:(5): 1348–59.
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335:
334:Other circuits
332:
314:
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294:microcomputers
286:Main article:
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170:
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135:microprocessor
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1039:Adapted from
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1021:0-471-27447-X
1018:
1014:
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1007:
1004:, D.-J. Lee,
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969:0-7803-1058-6
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851:on 2012-02-18
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747:on 2019-01-23
743:
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698:
695:
685:on 2012-02-08
684:
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637:on 2011-12-26
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228:4-phase clock
227:
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223:
219:
214:
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211:dynamic logic
207:
203:
202:Motorola 6800
199:
195:
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188:
184:
183:gated latches
180:
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19:
1078:Clock signal
1055:e-newsletter
1041:Eby Friedman
1038:
1031:
1026:Mitch Dale,
1012:
1002:I. L. Markov
982:
960:
936:
923:
910:
877:
873:
867:
859:
853:, retrieved
849:the original
843:
836:
827:
820:
795:
791:
788:Jouppi, N.P.
782:
772:, retrieved
766:
760:
749:. Retrieved
742:the original
737:
733:
721:
710:
706:
697:
687:, retrieved
683:the original
677:
671:
661:, retrieved
655:
649:
639:, retrieved
635:the original
629:
623:
605:
594:. Retrieved
574:
568:
486:
482:
471:
448:
446:
422:
409:
405:
403:
399:clock gating
392:
389:Distribution
372:
337:
328:static logic
316:
307:input/output
292:Many modern
291:
269:
237:
215:
196:
185:rather than
172:
161:Most modern
160:
151:
124:
92:
56:logic signal
51:
48:clock signal
47:
37:
18:Clock cycles
1059:Igor Markov
994:D.-J. Lee,
707:Electronics
433:Moore's law
109:with a 50%
107:square wave
40:electronics
1072:Categories
880:(1): 102.
855:2012-01-03
774:2012-01-08
751:2011-01-24
689:2012-01-08
663:2012-01-08
641:2012-01-08
596:2020-05-19
560:References
513:Clock rate
478:clock skew
410:clock tree
348:sine waves
302:clock rate
272:Intrinsity
253:, and the
232:See also:
206:Intel 8080
111:duty cycle
84:flip-flops
52:logic beat
455:registers
429:waveforms
379:inductors
364:slew rate
352:harmonics
101:called a
72:metronome
68:frequency
1044:Archived
981: ,
902:16239014
613:Archived
587:Archived
496:See also
258:MCP-1600
145:such as
93:A clock
78:. In a
76:circuits
959:(Ed.),
931:. 2015.
918:. 2015.
882:Bibcode
800:Bibcode
450:digital
296:use a "
64:current
60:voltage
1019:
967:
900:
543:Jitter
425:fanout
414:H-tree
346:, use
265:LSI-11
247:IMP-16
95:signal
1052:SIGDA
898:S2CID
745:(PDF)
730:(PDF)
590:(PDF)
579:(PDF)
457:with
356:noise
125:Most
1017:ISBN
965:ISBN
408:(or
404:The
395:skew
218:6501
216:The
204:and
90:.
46:, a
1057:by
890:doi
808:doi
480:).
309:).
262:DEC
179:phi
173:In
62:or
38:In
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1015:,
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963:,
896:.
888:.
878:40
876:.
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732:.
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709:.
705:.
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267:.
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943:.
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892::
884::
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810::
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58:(
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Text is available under the Creative Commons Attribution-ShareAlike License. Additional terms may apply.
