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156:; that is, a true output results if one, and only one, of the inputs to the gate is true. If both inputs are false (0/LOW) or both are true, a false output results. XOR represents the inequality function, i.e., the output is true if the inputs are not alike otherwise the output is false. A way to remember XOR is "must have one or the other but not both".
1785:
432:
450:
441:
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1012:
1866:
1110100101 (data) 11010 (target) 00111 (XOR) 2 zero bits 1110100101 11010 00000 5 zero bits 1110100101 11010 01110 2 zero bits 1110100101 11010 10011 2 zero bits 1110100101 11010 01000 4 zero bits 1110100101 11010 11111 0 zero bits
Matches by offset:
890:
for a total of eight transistors, four less than in the previous design. The XOR function is implemented by passing through to the output the inverted value of A when B is high and passing the value of A when B is at a logic low. so when both inputs are low the transmission gate at the bottom is off
1650:
Literal interpretation of the name "exclusive or", or observation of the IEC rectangular symbol, raises the question of correct behaviour with additional inputs. If a logic gate were to accept three or more inputs and produce a true output if exactly one of those inputs were true, then it would in
1870:
In this example, the best match occurs when the target sequence is offset by 1 bit and all five bits match. When offset by 5 bits, the sequence exactly matches its inverse. By looking at the difference between the number of ones and zeros that come out of the bank of XOR gates, it is easy to see
1658:
It is most common to regard subsequent inputs as being applied through a cascade of binary exclusive-or operations: the first two signals are fed into an XOR gate, then the output of that gate is fed into a second XOR gate together with the third signal, and so on for any remaining signals. The
891:
and the one at the top is on and lets A through which is low so the output is low. When both are high only the one at the bottom is active and lets the inverted value of A through and since A is high the output will again be low. Similarly if B stays high but A is low the output would be
1019:
The two leftmost transistors mentioned above, perform an optimized conditional inversion of A when B is at a logic high using pass transistor logic to reduce the transistor count and when B is at a logic low, their output is at a high impedance state. The two in the middle are a
1267:
1332:
which can be implemented using only four gates as shown on the right. intuitively, XOR is equivalent to OR except for when both A and B are high. So the AND of the OR with then NAND that gives a low only when both A and B are high is equivalent to the XOR.
1842:
when both inputs match. When searching for a specific bit pattern or PRN sequence in a very long data sequence, a series of XOR gates can be used to compare a string of bits from the data sequence against the target sequence in parallel. The number of
1064:
921:
The trade-off with the previous implementation is that since transmission gates are not ideal switches, there is resistance associated with them, so depending on the signal strength of the input, cascading them may degrade the output levels.
1610:
For the NAND constructions, the upper arrangement requires fewer gates. For the NOR constructions, the lower arrangement offers the advantage of a shorter propagation delay (the time delay between an input changing and the output changing).
1054:
As with the previous implementation, the direct connection of the inputs to the outputs through the pass gate transistors or through the two leftmost transistors, should be taken into account, especially when cascading them.
1775:
may be replaced by an XOR gate (or vice versa) without altering the resulting logic. This is convenient if the circuit is being implemented using simple integrated circuit chips which contain only one gate type per chip.
1071:
If a specific type of gate is not available, a circuit that implements the same function can be constructed from other available gates. A circuit implementing an XOR function can be trivially constructed from an
1555:
1142:
242:
1851:
receivers and decoders for error correction and channel codes. In a CDMA receiver, correlators are used to extract the polarity of a specific PRN sequence out of a combined collection of PRN sequences.
1475:
306:
1771:
In certain situations, the inputs to an OR gate (for example, in a full-adder) or to an XOR gate can never be both 1's. As this is the only combination for which the OR and XOR gate outputs differ, an
713:
1330:
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2153:
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159:
An XOR gate may serve as a "programmable inverter" in which one input determines whether to invert the other input, or to simply pass it along with no change. Hence it functions as a
647:
614:
3034:
1803:(LFSR), are defined in terms of the exclusive-or operation. Hence, a suitable setup of XOR gates can model a linear-feedback shift register, in order to generate random numbers.
649:
activate the 2 pMOS transistors of the top left or the 2 pMOS transistors of the top right respectively, connecting Vdd to the output for a logic high. The remaining input pairs
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result is a circuit that outputs a 1 when the number of 1s at its inputs is odd, and a 0 when the number of incoming 1s is even. This makes it practically useful as a
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The previous transmission gate implementation can be further optimized from eight to six transistors by implementing the functionality of the inverter that generates
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outputs can then be counted to determine how well the data sequence matches the target sequence. Correlators are used in many communications devices such as
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which is high as expected and if B is low but A is high the value of A passes through and the output is high completing the truth table for the XOR gate.
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1823:
An XOR gate may be used to easily change between buffering or inverting a signal. For example, XOR gates can be added to the output of a
1863:
would compare the incoming data bits against the target sequence at every possible offset while counting the number of matches (zeros):
1024:
that drives the output to the value of A when B is at a logic low and the two rightmost transistors form an inverter needed to generate
1496:
1083:
2373:
722:) are available, this gate can be used directly. Otherwise, two additional inverters with two transistors each are needed to generate
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where the sequence occurs and whether or not it is inverted. Longer sequences are easier to detect than short sequences.
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and the bottom pass-gate with just two transistors arranged like an inverter but with the source of the pMOS connected to
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detector (and indeed this is the case for only two inputs). However, it is rarely implemented this way in practice.
1262:{\displaystyle (A\cdot {\overline {B}})+({\overline {A}}\cdot B)\equiv (A+B)\cdot ({\overline {A}}+{\overline {B}})}
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129:
836:
This implementation uses two
Transmission gates and two inverters not shown in the diagram to generate
135:
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2848:
128:
that gives a true (1 or HIGH) output when the number of true inputs is odd. An XOR gate implements an
19:
This article is about XOR digital logic gate (e.g. SN7486 or CD4030B). For XOR logical operation, see
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There are three schematic symbols for XOR gates: the traditional ANSI and DIN symbols and the
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2889:
424:
The "=1" on the IEC symbol indicates that the output is activated by only one active input.
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symbol. In some cases, the DIN symbol is used with ⊕ instead of ≢. For more information see
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2953:
2824:
2734:"Comparison of different design techniques of XOR & AND gate using EDA simulation tool"
2718:
2336:
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1152:
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2711:
1674:
microchip is advertised as a three-input logic gate, and implements a parity generator.
1344:
are so-called "universal gates" and any logical function can be constructed from either
572:) implementations of the XOR gate corresponding to the AOI logic above are shown below.
3071:
2860:
1812:
960:
2738:
XOR & AND gates are most important basic building blocks of any VLSI applications.
2502:
2365:
Practical
Programmable Circuits: A Guide to PLDs, State Machines, and Microcontrollers
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The AOI implementation without inverted input has been used, for example, in the
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2. As a result, XOR gates are used to implement binary addition in computers. A
3118:
3085:
1587:
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402:
33:
2628:
Introduction to
Digital Systems: Modeling, Synthesis, and Simulation Using VHDL
1867:. : : : : : : : ----------- 0 1 2 3 4 5
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activate each one of the two nMOS paths in the bottom to Vss for a logic low.
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that adds any two bits together to output one bit. For example, if we add
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XOR chips are readily available. The most common standard chip codes are:
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3089:
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2321:
2301:
1757:
1486:
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1077:
492:, and ⊻ can be used to denote an XOR operation in algebraic expressions.
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1011:
2947:
2306:
1772:
1768:
circuit may be chained together in order to add longer binary numbers.
1711:
1652:
1566:
1148:. However, this approach requires five gates of three different kinds.
1051:
used by the transmission gate and the pass transistor logic circuit.
519:
1830:
to allow a user to choose between active-low or active-high output.
1784:
1493:
in a topology that emphasizes the construction of the function from
1413:
in a topology that emphasizes the construction of the function from
431:
449:
440:
1783:
1710:
1695:
1618:
1144:, we can construct an XOR gate circuit directly using AND, OR and
1062:
1010:
827:
499:
1550:{\displaystyle (A\cdot {\overline {B}})+({\overline {A}}\cdot B)}
1137:{\displaystyle (A\cdot {\overline {B}})+({\overline {A}}\cdot B)}
1848:
780:
569:
163:(a NOT gate) which may be activated or deactivated by a switch.
2775:
3256:
1623:
Philips 4070 quad dual input XOR chip on printed circuit board
1151:
As alternative, if different gates are available we can apply
2503:"Two interesting XOR circuits inside the Intel 386 processor"
510:(AND) in these languages, despite the similarity of symbol.)
237:{\displaystyle A\cdot {\overline {B}}+{\overline {A}}\cdot B}
1682:
XOR gates and AND gates are the two most-used structures in
1470:{\displaystyle (A+B)\cdot ({\overline {A}}+{\overline {B}})}
506:
to denote bitwise XOR. (Note that the caret does not denote
301:{\displaystyle (A+B)\cdot ({\overline {A}}+{\overline {B}})}
3280:
2752:
Digital integrated circuits : a design perspective
1752:
bit in this output is achieved with XOR, the preceding
1015:
Optimized transmission Gate Logic wiring of an XOR gate
776:, bringing the total number of transistors to twelve.
3287:
to it so that it can be listed with similar articles.
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708:{\displaystyle {\overline {A}}\cdot {\overline {B}}}
558:
An XOR gate using a 2-2 OAI gate and negated inputs.
1325:{\displaystyle (A+B)\cdot {\overline {(A\cdot B)}}}
817:The XOR gate can also be implemented by the use of
360:{\displaystyle (A+B)\cdot {\overline {(A\cdot B)}}}
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530:XOR gates can be implemented using AND-OR-Invert (
385:
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300:
236:
144:
2620:
2618:
583:transistors are arranged so that the input pairs
522:circuits. Some of those implementations include:
518:The XOR gate is most commonly implemented using
2659:Ross, Dickon; Lowe, Doug (24 September 2013).
2787:
2286:is an alternative analytical representation.
1937:is an analytical representation of XOR gate:
1489:. Another alternative arrangement is of five
8:
2556:
2554:
2552:
2220:{\displaystyle f(1,1)=1+1-2\cdot 1\cdot 1=0}
2148:{\displaystyle f(1,0)=1+0-2\cdot 1\cdot 0=1}
2076:{\displaystyle f(0,1)=0+1-2\cdot 0\cdot 1=1}
2004:{\displaystyle f(0,0)=0+0-2\cdot 0\cdot 0=0}
1724:The XOR logic gate can be used as a one-bit
832:Transmission gate implementation of XOR gate
2754:. Upper Saddle River, N.J.: Prentice-Hall.
2563:Designing combinational logic gates in CMOS
401:. The behavior of XOR is summarized in the
2794:
2780:
2772:
1336:An XOR gate circuit can be made from four
29:
3217:
3180:
3151:
3126:
3097:
3050:
3021:
2992:
2955:
2926:
2897:
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2594:. Springer Science & Business Media.
2522:Oklobdzija, Vojin G. (26 December 2001).
2413:An engineering approach to digital design
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2017:
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2470:Digital Electronics and Design with VHDL
1067:XOR gate circuit using three mixed gates
981:and the source of the nMOS connected to
2662:Electronics All-in-One For Dummies - UK
2354:
785:
718:If inverted inputs (for example from a
536:
393:all represent the XOR gate with inputs
2665:. John Wiley & Sons. p. 647.
2588:Annaratone, Silvia (6 December 2012).
2467:Pedroni, Volnei A. (25 January 2008).
1409:An alternative arrangement is of five
642:{\displaystyle {\overline {A}}\cdot B}
609:{\displaystyle A\cdot {\overline {B}}}
3029:{\displaystyle \not \leftrightarrow }
2631:. John Wiley & Sons. p. 38.
2625:Ferdjallah, Mohammed (15 June 2011).
1797:Pseudo-random number (PRN) generators
1634:4030: CMOS quad dual input XOR gates.
1631:4070: CMOS quad dual input XOR gates.
7:
166:XOR can also be viewed as addition
3272:needs additional or more specific
3219:
2994:
2828:
2693:Shustov, Michael A. (2023-07-04).
1834:Correlation and sequence detection
1811:XOR gates may be used in simplest
14:
2695:"The "XOR" versus "Sum modulo 2""
2525:The Computer Engineering Handbook
546:An XOR gate using a 2-1 AOI gate.
145:{\displaystyle \nleftrightarrow }
3261:
3241:
3058:{\displaystyle \leftrightarrow }
2847:
2368:. Elsevier Science. p. 20.
1760:. This is the main principle in
1748:in decimal). Since the trailing
1600:
1593:
1586:
1399:
1392:
1385:
1080:. If we consider the expression
926:Optimized pass-gate-logic wiring
800:
788:
568:The metal–oxide–semiconductor (
551:
539:
534:) or OR-AND-Invert (OAI) logic.
448:
439:
430:
1801:linear-feedback shift registers
1044:{\displaystyle {\overline {B}}}
1001:{\displaystyle {\overline {B}}}
950:{\displaystyle {\overline {A}}}
911:{\displaystyle {\overline {A}}}
883:{\displaystyle {\overline {B}}}
856:{\displaystyle {\overline {A}}}
769:{\displaystyle {\overline {B}}}
742:{\displaystyle {\overline {A}}}
174:consists of an XOR gate and an
51:
39:
3099:
3052:
2928:
2899:
2874:
2272:
2258:
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2239:
2178:
2166:
2106:
2094:
2034:
2022:
1962:
1950:
1930:{\displaystyle f(a,b)=a+b-2ab}
1900:
1888:
1792:pseudo-random number generator
1780:Pseudo-random number generator
1740:, we expect a two-bit answer,
1544:
1525:
1519:
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315:
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269:
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251:
1:
3134:{\displaystyle \nrightarrow }
2389:Van Houtven, Laurens (2017).
807:CMOS XOR gate using AOI-Logic
3159:{\displaystyle \nleftarrow }
2934:{\displaystyle \rightarrow }
2279:{\displaystyle f(a,b)=|a-b|}
1533:
1514:
1459:
1446:
1317:
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3105:{\displaystyle \downarrow }
2905:{\displaystyle \leftarrow }
2591:Digital CMOS Circuit Design
1269:as stated above, and apply
178:. The gate is also used in
3330:
2449:. University of Heidelberg
2444:"Aussagenlogik und Gatter"
2409:Fletcher, William (1980).
2362:Broesch, James D. (2012).
1756:bit is calculated with an
1641:quad dual input XOR gates.
18:
3238:
3201:
3081:
2976:
2880:{\displaystyle \uparrow }
2856:
2845:
2810:
2417:. Prentice-Hall. p.
1875:Analytical representation
1855:A correlator looking for
1819:Buffer or invert a signal
1585:
1580:
1577:
1574:
1379:
1376:
1373:
1340:. In fact, both NAND and
458:ANSI XOR Schematic Symbol
386:{\displaystyle A\oplus B}
40:
1273:to the last term to get
795:Example of CMOS XOR gate
668:{\displaystyle A\cdot B}
474:DIN XOR Schematic Symbol
466:IEC XOR Schematic Symbol
3144:Converse nonimplication
2750:Rabaey, Jan M. (1996).
3226:
3189:
3188:{\displaystyle \land }
3160:
3135:
3106:
3059:
3030:
3001:
2964:
2935:
2906:
2881:
2835:
2280:
2221:
2149:
2077:
2005:
1931:
1793:
1788:Example 16-bit Galois
1719:
1704:
1624:
1615:Standard chip packages
1551:
1471:
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1138:
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238:
146:
23:. For other uses, see
3248:Philosophy portal
3227:
3225:{\displaystyle \bot }
3190:
3161:
3136:
3107:
3060:
3031:
3002:
3000:{\displaystyle \neg }
2965:
2963:{\displaystyle \lor }
2936:
2907:
2882:
2836:
2834:{\displaystyle \top }
2281:
2222:
2150:
2078:
2006:
1932:
1859:in the data sequence
1825:seven-segment display
1787:
1714:
1699:
1622:
1565:is an inverted-input
1552:
1485:is an inverted-input
1472:
1360:, this results in an
1327:
1264:
1139:
1066:
1046:
1014:
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858:
831:
823:pass transistor logic
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191:algebraic expressions
147:
3216:
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2954:
2925:
2896:
2890:Converse implication
2871:
2825:
2233:
2160:
2088:
2016:
1944:
1882:
1838:XOR gates produce a
1764:. A slightly larger
1646:More than two inputs
1497:
1417:
1277:
1159:
1084:
1028:
985:
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405:shown on the right.
371:
312:
248:
196:
136:
25:XOR (disambiguation)
2804:logical connectives
2473:. Morgan Kaufmann.
2312:Inverter (NOT gate)
1352:alone. If the four
508:logical conjunction
468:
460:
37:
3222:
3185:
3156:
3131:
3102:
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2861:Alternative denial
2831:
2717:2009-12-29 at the
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2001:
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819:Transmission gates
813:Transmission gates
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665:
639:
606:
419:Logic Gate Symbols
383:
357:
298:
234:
154:mathematical logic
142:
120:and pronounced as
30:
3302:
3301:
3285:adding categories
3254:
3253:
2761:978-0-13-178609-7
2672:978-1-118-58971-7
2638:978-1-118-00770-9
2601:978-1-4613-2285-6
2535:978-0-8493-0885-7
2480:978-0-08-055755-7
1670:For example, the
1608:
1607:
1581:NOR construction
1578:NAND construction
1536:
1517:
1462:
1449:
1407:
1406:
1380:NOR construction
1377:NAND construction
1320:
1254:
1241:
1198:
1179:
1123:
1104:
1039:
1022:transmission gate
996:
970:{\displaystyle B}
945:
906:
878:
851:
764:
737:
703:
690:
631:
604:
575:On the left, the
479:
478:
355:
293:
280:
226:
213:
107:
106:
3321:
3297:
3294:
3288:
3265:
3257:
3246:
3245:
3244:
3231:
3229:
3228:
3223:
3194:
3192:
3191:
3186:
3165:
3163:
3162:
3157:
3140:
3138:
3137:
3132:
3111:
3109:
3108:
3103:
3064:
3062:
3061:
3056:
3035:
3033:
3032:
3027:
3006:
3004:
3003:
2998:
2969:
2967:
2966:
2961:
2940:
2938:
2937:
2932:
2911:
2909:
2908:
2903:
2886:
2884:
2883:
2878:
2851:
2840:
2838:
2837:
2832:
2796:
2789:
2782:
2773:
2766:
2765:
2747:
2741:
2740:
2730:
2724:
2709:
2703:
2702:
2690:
2684:
2683:
2681:
2679:
2656:
2650:
2649:
2647:
2645:
2622:
2613:
2612:
2610:
2608:
2585:
2579:
2578:
2576:
2574:
2568:
2558:
2547:
2546:
2544:
2542:
2519:
2513:
2512:
2510:
2509:
2498:
2492:
2491:
2489:
2487:
2464:
2458:
2457:
2455:
2454:
2448:
2439:
2433:
2432:
2416:
2406:
2400:
2399:
2397:
2386:
2380:
2379:
2359:
2285:
2283:
2282:
2277:
2275:
2261:
2226:
2224:
2223:
2218:
2154:
2152:
2151:
2146:
2082:
2080:
2079:
2074:
2010:
2008:
2007:
2002:
1936:
1934:
1933:
1928:
1862:
1858:
1846:
1841:
1747:
1743:
1735:
1731:
1661:parity generator
1604:
1597:
1590:
1572:
1571:
1556:
1554:
1553:
1548:
1537:
1529:
1518:
1510:
1476:
1474:
1473:
1468:
1463:
1455:
1450:
1442:
1403:
1396:
1389:
1371:
1370:
1356:are replaced by
1331:
1329:
1328:
1323:
1321:
1316:
1299:
1268:
1266:
1265:
1260:
1255:
1247:
1242:
1234:
1199:
1191:
1180:
1172:
1143:
1141:
1140:
1135:
1124:
1116:
1105:
1097:
1050:
1048:
1047:
1042:
1040:
1032:
1008:instead of GND.
1007:
1005:
1004:
999:
997:
989:
976:
974:
973:
968:
956:
954:
953:
948:
946:
938:
917:
915:
914:
909:
907:
899:
889:
887:
886:
881:
879:
871:
862:
860:
859:
854:
852:
844:
804:
792:
775:
773:
772:
767:
765:
757:
748:
746:
745:
740:
738:
730:
714:
712:
711:
706:
704:
696:
691:
683:
674:
672:
671:
666:
648:
646:
645:
640:
632:
624:
615:
613:
612:
607:
605:
597:
555:
543:
505:
496:C-like languages
452:
443:
434:
427:
426:
392:
390:
389:
384:
366:
364:
363:
358:
356:
351:
334:
307:
305:
304:
299:
294:
286:
281:
273:
243:
241:
240:
235:
227:
219:
214:
206:
151:
149:
148:
143:
38:
36:
3329:
3328:
3324:
3323:
3322:
3320:
3319:
3318:
3304:
3303:
3298:
3292:
3289:
3278:
3266:
3255:
3250:
3242:
3240:
3234:
3214:
3213:
3197:
3177:
3176:
3148:
3147:
3123:
3122:
3094:
3093:
3077:
3047:
3046:
3018:
3017:
2989:
2988:
2972:
2952:
2951:
2923:
2922:
2894:
2893:
2869:
2868:
2852:
2843:
2823:
2822:
2806:
2800:
2770:
2769:
2762:
2749:
2748:
2744:
2732:
2731:
2727:
2719:Wayback Machine
2710:
2706:
2692:
2691:
2687:
2677:
2675:
2673:
2658:
2657:
2653:
2643:
2641:
2639:
2624:
2623:
2616:
2606:
2604:
2602:
2587:
2586:
2582:
2572:
2570:
2566:
2560:
2559:
2550:
2540:
2538:
2536:
2521:
2520:
2516:
2507:
2505:
2500:
2499:
2495:
2485:
2483:
2481:
2466:
2465:
2461:
2452:
2450:
2446:
2441:
2440:
2436:
2429:
2408:
2407:
2403:
2395:
2388:
2387:
2383:
2376:
2361:
2360:
2356:
2351:
2346:
2337:Boolean algebra
2292:
2231:
2230:
2158:
2157:
2086:
2085:
2014:
2013:
1942:
1941:
1880:
1879:
1877:
1868:
1860:
1856:
1844:
1839:
1836:
1828:decoder circuit
1821:
1813:phase detectors
1809:
1807:Phase detectors
1799:, specifically
1782:
1745:
1741:
1733:
1729:
1722:
1721:
1707:
1706:
1692:
1680:
1648:
1617:
1559:de Morgan's Law
1495:
1494:
1479:de Morgan's Law
1415:
1414:
1300:
1275:
1274:
1271:de Morgan's Law
1157:
1156:
1153:Boolean algebra
1082:
1081:
1061:
1026:
1025:
983:
982:
959:
958:
932:
931:
928:
893:
892:
865:
864:
838:
837:
815:
808:
805:
796:
793:
751:
750:
724:
723:
677:
676:
651:
650:
618:
617:
585:
584:
566:
559:
556:
547:
544:
528:
516:
503:
411:
369:
368:
335:
310:
309:
246:
245:
194:
193:
134:
133:
124:) is a digital
31:
28:
17:
12:
11:
5:
3327:
3325:
3317:
3316:
3306:
3305:
3300:
3299:
3269:
3267:
3260:
3252:
3251:
3239:
3236:
3235:
3233:
3232:
3221:
3202:
3199:
3198:
3196:
3195:
3184:
3166:
3155:
3141:
3130:
3115:Nonimplication
3112:
3101:
3082:
3079:
3078:
3076:
3075:
3072:Digital buffer
3065:
3054:
3036:
3025:
3007:
2996:
2977:
2974:
2973:
2971:
2970:
2959:
2941:
2930:
2912:
2901:
2887:
2876:
2857:
2854:
2853:
2846:
2844:
2842:
2841:
2830:
2811:
2808:
2807:
2801:
2799:
2798:
2791:
2784:
2776:
2768:
2767:
2760:
2742:
2725:
2704:
2685:
2671:
2651:
2637:
2614:
2600:
2580:
2548:
2534:
2514:
2501:Shiriff, Ken.
2493:
2479:
2459:
2434:
2427:
2401:
2381:
2375:978-0323139267
2374:
2353:
2352:
2350:
2347:
2345:
2344:
2339:
2334:
2329:
2324:
2319:
2314:
2309:
2304:
2299:
2293:
2291:
2288:
2274:
2270:
2267:
2264:
2260:
2256:
2253:
2250:
2247:
2244:
2241:
2238:
2228:
2227:
2216:
2213:
2210:
2207:
2204:
2201:
2198:
2195:
2192:
2189:
2186:
2183:
2180:
2177:
2174:
2171:
2168:
2165:
2155:
2144:
2141:
2138:
2135:
2132:
2129:
2126:
2123:
2120:
2117:
2114:
2111:
2108:
2105:
2102:
2099:
2096:
2093:
2083:
2072:
2069:
2066:
2063:
2060:
2057:
2054:
2051:
2048:
2045:
2042:
2039:
2036:
2033:
2030:
2027:
2024:
2021:
2011:
2000:
1997:
1994:
1991:
1988:
1985:
1982:
1979:
1976:
1973:
1970:
1967:
1964:
1961:
1958:
1955:
1952:
1949:
1926:
1923:
1920:
1917:
1914:
1911:
1908:
1905:
1902:
1899:
1896:
1893:
1890:
1887:
1876:
1873:
1865:
1835:
1832:
1820:
1817:
1808:
1805:
1781:
1778:
1709:
1708:
1694:
1693:
1691:
1688:
1686:applications.
1679:
1676:
1663:or a modulo-2
1647:
1644:
1643:
1642:
1635:
1632:
1616:
1613:
1606:
1605:
1598:
1591:
1583:
1582:
1579:
1576:
1557:, noting from
1546:
1543:
1540:
1535:
1532:
1527:
1524:
1521:
1516:
1513:
1508:
1505:
1502:
1477:, noting from
1466:
1461:
1458:
1453:
1448:
1445:
1440:
1437:
1434:
1431:
1428:
1425:
1422:
1405:
1404:
1397:
1390:
1382:
1381:
1378:
1375:
1319:
1315:
1312:
1309:
1306:
1303:
1297:
1294:
1291:
1288:
1285:
1282:
1258:
1253:
1250:
1245:
1240:
1237:
1232:
1229:
1226:
1223:
1220:
1217:
1214:
1211:
1208:
1205:
1202:
1197:
1194:
1189:
1186:
1183:
1178:
1175:
1170:
1167:
1164:
1133:
1130:
1127:
1122:
1119:
1114:
1111:
1108:
1103:
1100:
1095:
1092:
1089:
1076:followed by a
1060:
1057:
1038:
1035:
995:
992:
966:
944:
941:
927:
924:
905:
902:
877:
874:
850:
847:
814:
811:
810:
809:
806:
799:
797:
794:
787:
763:
760:
736:
733:
702:
699:
694:
689:
686:
664:
661:
658:
638:
635:
630:
627:
603:
600:
595:
592:
565:
562:
561:
560:
557:
550:
548:
545:
538:
527:
524:
515:
514:Implementation
512:
477:
476:
471:
469:
463:
461:
454:
453:
446:
444:
437:
435:
410:
407:
382:
379:
376:
354:
350:
347:
344:
341:
338:
332:
329:
326:
323:
320:
317:
297:
292:
289:
284:
279:
276:
271:
268:
265:
262:
259:
256:
253:
233:
230:
225:
222:
217:
212:
209:
204:
201:
141:
105:
104:
101:
98:
94:
93:
90:
87:
83:
82:
79:
76:
72:
71:
68:
65:
61:
60:
57:
54:
50:
49:
44:
15:
13:
10:
9:
6:
4:
3:
2:
3326:
3315:
3312:
3311:
3309:
3296:
3286:
3282:
3276:
3275:
3270:This article
3268:
3264:
3259:
3258:
3249:
3237:
3211:
3207:
3206:Contradiction
3204:
3203:
3200:
3182:
3174:
3170:
3167:
3153:
3145:
3142:
3128:
3120:
3116:
3113:
3091:
3087:
3084:
3083:
3080:
3073:
3069:
3066:
3044:
3040:
3039:Biconditional
3037:
3023:
3015:
3011:
3008:
2986:
2982:
2979:
2978:
2975:
2957:
2949:
2945:
2942:
2920:
2916:
2913:
2891:
2888:
2866:
2862:
2859:
2858:
2855:
2850:
2820:
2816:
2813:
2812:
2809:
2805:
2797:
2792:
2790:
2785:
2783:
2778:
2777:
2774:
2763:
2757:
2753:
2746:
2743:
2739:
2735:
2729:
2726:
2723:
2720:
2716:
2713:
2708:
2705:
2700:
2696:
2689:
2686:
2674:
2668:
2664:
2663:
2655:
2652:
2640:
2634:
2630:
2629:
2621:
2619:
2615:
2603:
2597:
2593:
2592:
2584:
2581:
2569:. p. 233
2565:
2564:
2557:
2555:
2553:
2549:
2537:
2531:
2528:. CRC Press.
2527:
2526:
2518:
2515:
2504:
2497:
2494:
2482:
2476:
2472:
2471:
2463:
2460:
2445:
2438:
2435:
2430:
2428:0-13-277699-5
2424:
2420:
2415:
2414:
2405:
2402:
2398:. p. 17.
2394:
2393:
2385:
2382:
2377:
2371:
2367:
2366:
2358:
2355:
2348:
2343:
2340:
2338:
2335:
2333:
2330:
2328:
2325:
2323:
2320:
2318:
2315:
2313:
2310:
2308:
2305:
2303:
2300:
2298:
2295:
2294:
2289:
2287:
2268:
2265:
2262:
2254:
2248:
2245:
2242:
2236:
2214:
2211:
2208:
2205:
2202:
2199:
2196:
2193:
2190:
2187:
2184:
2181:
2175:
2172:
2169:
2163:
2156:
2142:
2139:
2136:
2133:
2130:
2127:
2124:
2121:
2118:
2115:
2112:
2109:
2103:
2100:
2097:
2091:
2084:
2070:
2067:
2064:
2061:
2058:
2055:
2052:
2049:
2046:
2043:
2040:
2037:
2031:
2028:
2025:
2019:
2012:
1998:
1995:
1992:
1989:
1986:
1983:
1980:
1977:
1974:
1971:
1968:
1965:
1959:
1956:
1953:
1947:
1940:
1939:
1938:
1924:
1921:
1918:
1915:
1912:
1909:
1906:
1903:
1897:
1894:
1891:
1885:
1874:
1872:
1864:
1853:
1850:
1833:
1831:
1829:
1826:
1818:
1816:
1814:
1806:
1804:
1802:
1798:
1791:
1786:
1779:
1777:
1774:
1769:
1767:
1763:
1759:
1755:
1751:
1739:
1727:
1718:
1715:Example half
1713:
1703:
1700:Example full
1698:
1689:
1687:
1685:
1677:
1675:
1673:
1668:
1666:
1662:
1656:
1654:
1645:
1640:
1636:
1633:
1630:
1629:
1628:
1621:
1614:
1612:
1603:
1599:
1596:
1592:
1589:
1584:
1573:
1570:
1568:
1564:
1560:
1541:
1538:
1530:
1522:
1511:
1506:
1503:
1492:
1488:
1484:
1480:
1456:
1451:
1443:
1435:
1429:
1426:
1423:
1412:
1402:
1398:
1395:
1391:
1388:
1384:
1383:
1372:
1369:
1367:
1363:
1359:
1355:
1351:
1347:
1343:
1339:
1334:
1310:
1307:
1304:
1295:
1289:
1286:
1283:
1272:
1248:
1243:
1235:
1227:
1221:
1218:
1215:
1209:
1203:
1200:
1192:
1184:
1173:
1168:
1165:
1155:to transform
1154:
1149:
1147:
1128:
1125:
1117:
1109:
1098:
1093:
1090:
1079:
1075:
1065:
1058:
1056:
1052:
1033:
1023:
1013:
1009:
990:
980:
964:
939:
925:
923:
919:
900:
872:
845:
830:
826:
824:
820:
812:
803:
798:
791:
786:
784:
782:
777:
758:
731:
721:
716:
697:
692:
684:
662:
659:
656:
636:
633:
625:
598:
593:
590:
582:
578:
573:
571:
563:
554:
549:
542:
537:
535:
533:
526:AND-OR-Invert
525:
523:
521:
513:
511:
509:
501:
497:
493:
491:
490:
484:
483:logic symbols
475:
472:
470:
467:
464:
462:
459:
456:
455:
451:
447:
445:
442:
438:
436:
433:
429:
428:
425:
422:
420:
416:
408:
406:
404:
400:
396:
380:
377:
374:
345:
342:
339:
330:
324:
321:
318:
287:
282:
274:
266:
260:
257:
254:
231:
228:
220:
215:
207:
202:
199:
192:
187:
185:
181:
177:
173:
169:
164:
162:
157:
155:
139:
131:
127:
123:
119:
115:
111:
102:
99:
96:
95:
91:
88:
85:
84:
80:
77:
74:
73:
69:
66:
63:
62:
58:
55:
52:
48:
45:
43:
35:
26:
22:
3290:
3271:
3086:Joint denial
3013:
3010:Exclusive or
2751:
2745:
2737:
2728:
2707:
2698:
2688:
2676:. Retrieved
2661:
2654:
2642:. Retrieved
2627:
2605:. Retrieved
2590:
2583:
2571:. Retrieved
2562:
2539:. Retrieved
2524:
2517:
2506:. Retrieved
2496:
2484:. Retrieved
2469:
2462:
2451:. Retrieved
2442:Fischer, P.
2437:
2412:
2404:
2391:
2384:
2364:
2357:
2297:Exclusive or
2229:
1878:
1869:
1854:
1837:
1822:
1810:
1795:
1770:
1753:
1749:
1723:
1681:
1678:Applications
1669:
1657:
1651:effect be a
1649:
1626:
1609:
1575:Desired gate
1408:
1374:Desired gate
1335:
1150:
1070:
1059:Alternatives
1053:
1018:
929:
920:
835:
816:
778:
717:
574:
567:
529:
517:
494:
488:
480:
473:
465:
457:
423:
412:
398:
394:
188:
165:
158:
130:exclusive or
122:Exclusive OR
121:
117:
113:
109:
108:
46:
41:
21:Exclusive or
3314:Logic gates
3169:Conjunction
3119:NIMPLY gate
2944:Disjunction
2915:Implication
2699:www.edn.com
1762:Half Adders
977:instead of
403:truth table
184:comparators
180:subtractors
112:(sometimes
34:truth table
3274:categories
2919:IMPLY gate
2722:data sheet
2712:74LVC1G386
2678:9 November
2644:9 November
2607:8 November
2573:9 November
2541:8 November
2508:2024-01-14
2486:8 November
2453:2024-01-21
2392:Crypto 101
2349:References
2342:Logic gate
2332:IMPLY gate
1861:1110100101
1766:Full Adder
1672:74LVC1G386
1491:NAND gates
1354:NAND gates
1346:NAND logic
1338:NAND gates
172:half adder
126:logic gate
16:Logic gate
3220:⊥
3183:∧
3154:↚
3129:↛
3100:↓
3068:Statement
3053:↔
3043:XNOR gate
2995:¬
2958:∨
2929:→
2900:←
2875:↑
2865:NAND gate
2829:⊤
2815:Tautology
2327:XNOR gate
2317:NAND gate
2266:−
2206:⋅
2200:⋅
2194:−
2134:⋅
2128:⋅
2122:−
2062:⋅
2056:⋅
2050:−
1990:⋅
1984:⋅
1978:−
1916:−
1563:NAND gate
1539:⋅
1534:¯
1515:¯
1507:⋅
1460:¯
1447:¯
1436:⋅
1411:NOR gates
1362:XNOR gate
1358:NOR gates
1350:NOR logic
1342:NOR gates
1318:¯
1308:⋅
1296:⋅
1252:¯
1239:¯
1228:⋅
1210:≡
1201:⋅
1196:¯
1177:¯
1169:⋅
1146:NOT gates
1126:⋅
1121:¯
1102:¯
1094:⋅
1074:XNOR gate
1037:¯
994:¯
943:¯
904:¯
876:¯
849:¯
781:Intel 386
762:¯
735:¯
720:flip-flop
701:¯
693:⋅
688:¯
660:⋅
634:⋅
629:¯
602:¯
594:⋅
378:⊕
353:¯
343:⋅
331:⋅
291:¯
278:¯
267:⋅
229:⋅
224:¯
211:¯
203:⋅
140:↮
32:XOR gate
3308:Category
3293:May 2021
3281:help out
3173:AND gate
3090:NOR gate
3024:↮
3014:XOR gate
2985:NOT gate
2981:Negation
2715:Archived
2322:NOR gate
2302:AND gate
2290:See also
1758:AND gate
1690:Addition
1487:AND gate
1483:NOR gate
1366:NOR gate
1078:NOT gate
498:use the
176:AND gate
161:inverter
110:XOR gate
59:A XOR B
3279:Please
3175:)
3171: (
3121:)
3117: (
3092:)
3088: (
3070: (
3045:)
3041: (
3016:)
3012: (
2987:)
2983: (
2950:)
2948:OR gate
2946: (
2921:)
2917: (
2867:)
2863: (
2802:Common
2307:OR gate
1773:OR gate
1653:one-hot
1567:OR gate
1561:that a
1481:that a
520:MOSFETs
502:symbol
409:Symbols
152:) from
3212:
3146:
2892:
2821:
2758:
2669:
2635:
2598:
2532:
2477:
2425:
2372:
1744:(i.e.
1738:binary
1637:7486:
168:modulo
47:Output
3210:False
2567:(PDF)
2447:(PDF)
2396:(PDF)
1857:11010
1754:carry
1732:plus
1726:adder
1717:adder
1702:adder
1665:adder
821:with
783:CPU.
500:caret
116:, or
42:Input
2819:True
2756:ISBN
2680:2022
2667:ISBN
2646:2022
2633:ISBN
2609:2022
2596:ISBN
2575:2022
2543:2022
2530:ISBN
2488:2022
2475:ISBN
2423:ISBN
2370:ISBN
1849:CDMA
1790:LFSR
1684:VLSI
863:and
749:and
675:and
616:and
581:pMOS
579:and
577:nMOS
570:CMOS
564:CMOS
481:The
397:and
189:The
182:and
118:EXOR
3283:by
1750:sum
1736:in
1639:TTL
1368:).
1348:or
979:Vdd
532:AOI
485:⊕,
415:IEC
367:or
308:or
244:or
114:EOR
3310::
2736:.
2697:.
2617:^
2551:^
2421:.
2419:98
1815:.
1742:10
1667:.
1569:.
825:.
489:pq
421:.
186:.
103:0
92:1
81:1
70:0
3295:)
3291:(
3277:.
3208:/
3074:)
2817:/
2795:e
2788:t
2781:v
2764:.
2701:.
2682:.
2648:.
2611:.
2577:.
2545:.
2511:.
2490:.
2456:.
2431:.
2378:.
2273:|
2269:b
2263:a
2259:|
2255:=
2252:)
2249:b
2246:,
2243:a
2240:(
2237:f
2215:0
2212:=
2209:1
2203:1
2197:2
2191:1
2188:+
2185:1
2182:=
2179:)
2176:1
2173:,
2170:1
2167:(
2164:f
2143:1
2140:=
2137:0
2131:1
2125:2
2119:0
2116:+
2113:1
2110:=
2107:)
2104:0
2101:,
2098:1
2095:(
2092:f
2071:1
2068:=
2065:1
2059:0
2053:2
2047:1
2044:+
2041:0
2038:=
2035:)
2032:1
2029:,
2026:0
2023:(
2020:f
1999:0
1996:=
1993:0
1987:0
1981:2
1975:0
1972:+
1969:0
1966:=
1963:)
1960:0
1957:,
1954:0
1951:(
1948:f
1925:b
1922:a
1919:2
1913:b
1910:+
1907:a
1904:=
1901:)
1898:b
1895:,
1892:a
1889:(
1886:f
1845:0
1840:0
1746:2
1734:1
1730:1
1545:)
1542:B
1531:A
1526:(
1523:+
1520:)
1512:B
1504:A
1501:(
1465:)
1457:B
1452:+
1444:A
1439:(
1433:)
1430:B
1427:+
1424:A
1421:(
1314:)
1311:B
1305:A
1302:(
1293:)
1290:B
1287:+
1284:A
1281:(
1257:)
1249:B
1244:+
1236:A
1231:(
1225:)
1222:B
1219:+
1216:A
1213:(
1207:)
1204:B
1193:A
1188:(
1185:+
1182:)
1174:B
1166:A
1163:(
1132:)
1129:B
1118:A
1113:(
1110:+
1107:)
1099:B
1091:A
1088:(
1034:B
991:B
965:B
940:A
901:A
873:B
846:A
759:B
732:A
698:B
685:A
663:B
657:A
637:B
626:A
599:B
591:A
504:^
487:J
399:B
395:A
381:B
375:A
349:)
346:B
340:A
337:(
328:)
325:B
322:+
319:A
316:(
296:)
288:B
283:+
275:A
270:(
264:)
261:B
258:+
255:A
252:(
232:B
221:A
216:+
208:B
200:A
132:(
100:1
97:1
89:0
86:1
78:1
75:0
67:0
64:0
56:B
53:A
27:.
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