488:. A special pin on the chips, BootFromROM, indicated which method it should use. If BootFromROM was asserted when the chip was reset, it would begin processing at the instruction two bytes from the top of memory, which was normally used to perform a backward jump into the boot code. If this pin was not asserted, the chip would instead wait for bytes to be received on any network link. The first byte to be received was the length of the code to follow. Following bytes were copied into low memory and then jumped into once that number of bytes had been received.
921:
1409:
1349:
909:
212:
1074:-like devices, they included on-board RAM and a built-in RAM controller which enabled more memory to be added with no added hardware. Unlike other designs, transputers did not include I/O lines: these were to be added with hardware attached to the existing serial links. There was one 'Event' line, similar to a conventional processor's interrupt line. Treated as a channel, a program could 'input' from the event channel, and proceed only after the event line was asserted.
1468:
1437:
1397:
1337:
1325:
420:(ROM) and the outputs from the ROM were fed directly to the data path. For multi-cycle instructions, while the data path was performing the first cycle, the microcode decoded four possible options for the second cycle. The decision as to which of these options would actually be used could be made near the end of the first cycle. This allowed for very fast operation while keeping the architecture generic.
1385:
1373:
1361:
47:
1213:
1169:
1125:
1647:, in the early 1990s. The ability to quickly transform digital images in preparation for print gave the firm a significant edge over their competitors. This development was led by Michael Bengtson in the RR Donnelley Technology Center. Within a few years, the processing ability of even desktop computers ended the need for custom multi-processing systems for the firm.
204:
1315:
transputer instruction set is based on 8-bit instructions and can easily be used with any word size which is a multiple of 8 bits. The target market for the T100 was to be bus controllers such as
Futurebus, and an upgrade for the standard link adapters (C011 etc.). The project was stopped when the T840 (later to become the basis of the T9000) was started.
1588:(FPU) equipped T800 was shipping, other RISC designs had surpassed it. This could have been mitigated to a large extent if machines had used multiple transputers as planned, but T800s cost about $ 400 each when introduced, which meant a poor price/performance ratio. Few transputer-based workstation systems were designed; the most notable likely being the
1756:
1561:
149:
1005:, allowing blocks of code to be hidden and revealed, to make the structure of the code more apparent. Unfortunately, the combination of an unfamiliar programming language and equally unfamiliar development environment did nothing for the early popularity of the transputer. Later, Inmos would release more conventional Occam cross-compilers, the
1829:
design in the 21st century. Unlike the transputer architecture, the processing units in these systems typically use superscalar CPUs with access to substantial amounts of memory and disk storage, running conventional operating systems and network interfaces. Resulting from the more complex nodes, the
1726:
The asynchronous operation of the communications and computation allowed the development of asynchronous algorithms, such as Bane's "Asychronous
Polynomial Zero Finding" algorithm. The field of asynchronous algorithms, and the asynchronous implementation of current algorithms, is likely to play a key
528:
in memory. So programs asking for any input or output automatically paused while the operation completed, a task that normally required an operating system to handle as the arbiter of hardware. Operating systems on the transputer did not need to handle scheduling; the chip could be considered to have
1817:
delivered a tangible performance increase on existing bodies of code – which were mostly written in Pascal, Fortran, C and C++. Given these substantial and regular performance improvements to existing code there was little incentive to rewrite software in languages or coding styles which expose more
1314:
Although the prior SoC projects had had only limited success (the M212 was sold for a time), many designers still firmly believed in the concept and in 1987, a new project, the T100 was started which combined an 8-bit version of the transputer CPU with configurable logic based on state machines. The
360:
in the same machine. In a traditional machine, the processing capability of a disk controller, for instance, would be idle when the disk was not being accessed. In contrast, in a transputer system, spare cycles on any of these transputers could be used for other tasks, greatly increasing the overall
1661:
Transputers also found use in protocol analysers such as the
Siemens/Tektronix K1103 and in military applications where the array architecture suited applications such as radar and the serial links (that were high speed in the 1980s) served well to save cost and weight in sub-system communications.
993:
and channel-based inter-process or inter-processor communication as a fundamental part of the language. With the parallelism and communications built into the chip and the language interacting with it directly, writing code for things like device controllers became a triviality; even the most basic
936:
comprising a transputer and, optionally, external memory and/or peripheral devices, with simple standardised connectors providing power, transputer links, clock and system signals. Various sizes of TRAM were defined, from the basic Size 1 TRAM (3.66 in by 1.05 in) up to Size 8 (3.66 in by 8.75 in).
1833:
The fundamental transputer motive remains, yet was masked for over 20 years by the repeated doubling of transistor counts. Inevitably, microprocessor designers finally ran out of uses for the greater physical resources, almost at the same time when technology scaling began to hit its limits. Power
1808:
Growing internal parallelism has been one driving force behind improvements in conventional CPU designs. Instead of explicit thread-level parallelism (as is used in the transputer), CPU designs exploited implicit parallelism at the instruction-level, inspecting code sequences for data dependencies
491:
The general concept for the system was to have one transputer act as the central authority for booting a system containing a number of connected transputers. The selected transputer would have the BootFromROM permanently asserted, which would cause it to begin running a booter process from ROM on
475:
There were limits to the size of a system that could be built in this fashion. Since each transputer was linked to another in a fixed point-to-point layout, sending messages to a more distant transputer required that messages be relayed by each chip in the line. This introduced a delay with every
1543:
as the design language and with an optimized (and rewritten) microcode compiler. The project was conceived as early as 1990 when it was realized that the T9 would be too big for many applications. Actual design work started in mid-1992. Several trial designs were done, ranging from a very simple
1538:
Although not strictly a transputer, the ST20 was heavily influenced by the T4 and T9 and formed the basis of the T450, which was arguably the last of the transputers. The mission of the ST20 was to be a reusable core in the then emerging SoC market. The original name of the ST20 was the
Reusable
1852:
Recent trends have also tried to solve the transistor dilemma in ways that would have been too futuristic even for Inmos. On top of adding components to the CPU die and placing multiple dies in one system, modern processors increasingly place multiple cores in one die. The transputer designers
1568:
While the transputer was simple but powerful compared to many contemporary designs, it never came close to meeting its goal of being used universally in both CPU and microcontroller roles. In the microcontroller market, the market was dominated by 8-bit machines where cost was the most serious
1295:
The links in the T212 and T414/T424 transputers had hardware DMA engines so that transfers could happen in parallel with execution of other processes. A variant of the design, termed the T400, not to be confused with a later transputer of the same name, was designed where the CPU handled these
1510:
Long delays in the T9000's development meant that the faster load/store designs were already outperforming it by the time it was to be released. It consistently failed to reach its own performance goal of beating the T800 by a factor of ten. When the project was finally cancelled it was still
492:
startup. The other transputers would have the BootFromROM tied low, and would simply wait. The loader would boot the central transputer, which would then begin sending boot code to the other transputers in the network, and could customize the code sent to each one, for instance, sending a
459:
known as "os-link"s that allowed it to communicate with up to four other transputers, each at 5, 10, or 20 Mbit/s – which was very fast for the 1980s. Any number of transputers could be connected together over links (which could run tens of metres) to form one computing
511:
Added circuitry scheduled traffic over the links. Processes waiting for communications would automatically pause while the networking circuitry finished its reads or writes. Other processes running on the transputer would then be given that processing time. It included two
503:. This allowed inspection and changing of RAM in an unbooted transputer. After a peek, followed by a memory address, or a poke, with an address and single word of data, the transputer would return to waiting for a bootstrap. This mechanism was generally used for debugging.
427:
of 20 MHz was quite high for the era and the designers were very concerned about the practicality of distributing such a fast clock signal on a board. A slower external clock of 5 MHz was used, and this was multiplied up to the needed internal frequency using a
282:
It seemed that the only way forward was to increase the use of parallelism, the use of several CPUs that would work together to solve several tasks at the same time. This depended on such machines being able to run several tasks at once, a process termed
254:
For some time in the late 1980s, many considered the transputer to be the next great design for the future of computing. While the transputer did not achieve this expectation, the transputer architecture was highly influential in provoking new ideas in
1188:, but fabrication difficulties meant that this was redesigned as the T414 with 2 KB on-board RAM instead of the intended 4 KB. The T414 was available in 15 and 20 MHz varieties. The RAM was later reinstated to 4 KB on the
1001:(TDS). This was an unorthodox integrated development environment incorporating an editor, compiler, linker and (post-mortem) debugger. The TDS was a transputer application written in Occam. The TDS text editor was notable in that it was a
1853:
struggled to fit even one core into its transistor budget. Today designers, working with a 1000-fold increase in transistor densities, can now typically place many. One of the most recent commercial developments has emerged from the firm
1479:
which would collect instructions out of the cache and group them into larger packages of up to 8 bytes to feed the pipeline faster. Groups then completed in one cycle, as if they were single larger instructions working on a faster CPU.
1635:
was based on a network of over 300 synchronously clocked transputers divided into several subsystems. These controlled both the readout of the custom detector electronics and ran reconstruction algorithms for physics event selection.
1024:, and Pascal were also later released by both Inmos and third-party vendors. These usually included language extensions or libraries providing, in a less elegant way, Occam-like concurrency and channel-based communication.
1657:
A French company built the
Archipel Volvox Supercomputer with up to 144 T800 and T400 Transputers. It was controlled by a Silicon Graphics Indigo2 running UNIX and a special card that interfaced to the Volvox backplanes.
1857:, which has developed a family of embedded multi-core multi-threaded processors which resonate strongly with the transputer and Inmos. There is an emerging class of multicore/manycore processors taking the approach of a
287:. This had generally been too difficult for prior microprocessor designs to handle, but more recent designs were able to accomplish it effectively. It was clear that in the future, this would be a feature of all
1296:
transfers. This reduced the size of the device considerably since 4 link engines were approximately the same size as the whole CPU. The T400 was intended to be used as a core in what were then called
611:), which decoded the constant operand as an extended zero-operand opcode, providing for almost endless and easy instruction set expansion as newer implementations of the transputer were introduced.
476:"hop" over a link, leading to long delays on large nets. To solve this problem Inmos also provided a zero-delay switch that connected up to 32 transputers (or switches) into even larger networks.
352:
Originally the plan was to make the transputer cost only a few dollars per unit. Inmos saw them being used for practically everything, from operating as the main CPU for a computer to acting as a
1518:), whose focus was the embedded systems market, and eventually the T9000 project was abandoned. However, a comprehensively redesigned 32-bit transputer intended for embedded applications, the
603:
instructions allowed construction of larger constants by prepending their lower nibbles to the operands of following instructions. Further instructions were supported via the instruction code
557:
CPUs, the transputer had only three data registers, which behaved as a stack. In addition a workspace pointer pointed to a conventional memory stack, easily accessible via the instructions
2164:. B C O'Neill; G Coulson; K L Wong; R Hotchkiss; J H Ng; S Clark; and P D Thomas. "An Interface Device to Support a Distributed Parallel System for the StrongARM Microprocessor". p. 1031.
271:(CPUs) appeared to have reached a performance limit. Up to that time, manufacturing difficulties limited the amount of circuitry that could fit on a chip. Continued improvements in the
1483:
The link system was upgraded to a new 100 MHz mode, but unlike the prior systems, the links were no longer downwardly compatible. This new packet-based link protocol was called
1144:(the latter with an on-board disk controller) were the 16-bit offerings. The T212 was available in 17.5 and 20 MHz processor clock speed ratings. The T212 was superseded by the
298:. A low-cost CPU built for multiprocessing could allow the speed of a machine to be raised by adding more CPUs, potentially far more cheaply than by using one faster CPU design.
2483:– It emulates one T414 transputer (i.e., no FPU, no blitting instructions) and supplies the file and terminal I/O services that were usually supplied by a host computer system.
2353:
1184:
feature size. It was a 32-bit design, able to process 32-bit units of data and to address up to 4 GB of main memory. Originally, the first 32-bit variant was to be the
1499:
on the links. This meant programs no longer had to be aware of the physical layout of the connections. A range of DS-Link support chips were also developed, including the
345:", was selected to indicate the role the individual transputers would play: numbers of them would be used as basic building blocks in a larger integrated system, just as
1813:
processing. Superscalar processors are suited for optimising the execution of sequentially constructed fragments of code. The combination of superscalar processing and
757:
All these instructions take a constant, representing an offset or an arithmetic constant. If this constant was less than 16, all these instructions coded to one byte.
1539:
Micro Core (RMC). The architecture was loosely based on the original T4 architecture with a microcode-controlled data path. However, it was a full redesign, using
1284:. The M212 was based on a standard T212 core with the addition of a disk controller for the ST 506 and ST 412 Shugart standards. TV-toy was to be the basis for a
2528:
1511:
achieving only about 36 MIPS at 50 MHz. The production delays gave rise to the quip that the best host architecture for a T9000 was an overhead projector.
1276:(SoC) as they are commonly termed, are ubiquitous now, the concept was almost unheard of back in the early 1980s. Two projects were started in around 1983, the
337:
systems. The goal was to produce a family of chips ranging in power and cost that could be wired together to form a complete parallel computer. The name, from "
2398:
1460:(using random replacement) instead of RAM, but also allowed it to be used as memory and included MMU-like functionality to handle all of this (termed the
1232:
floating point standard. It also had 4 KB of on-board RAM and was available in 20 or 25 MHz versions. Breakpoint support was added in the later
1514:
This was too much for Inmos, which did not have the funding needed to continue development. By this time, the company had been sold to SGS-Thomson (now
294:
A side effect of most multitasking design is that it often also allows the processes to be run on physically different CPUs, in which case it is termed
1452:
during development). The T9000 shared most features with the T800, but moved several pieces of the design into hardware and added several features for
1830:
software architecture used for coordinating the parallelism in such systems is typically far more heavyweight than in the transputer architecture.
1611:, and Parsys. Several British academic institutions founded research activities in the application of transputer-based parallel systems, including
1247:
was planned, which would have had more RAM, more and faster links, extra instructions, and improved microcode, but this was cancelled around 1990.
436:
and designers were free to use whichever combination of these they wanted, so it could be argued that the transputer actually ran at 80 MHz.
2235:. p. 361. Makoto Tanaka; Naoya Fukuchi; Yutaka Ooki; and Chikara Fukunaga. "Design of a Transputer Core and its implementation in an FPGA". 2004.
412:
as the main method to control the data path, but unlike other designs of the time, many instructions took only one cycle to execute. Instruction
1408:
1348:
2162:"High-Performance Computing and Networking: International Conference and Exhibition, Amsterdam, the Netherlands, April 21-23, 1998 Proceedings"
1270:
Part of the original Inmos strategy was to make CPUs so small and cheap that they could be combined with other logic in one device. Although a
569:
by simply changing the workspace pointer to the memory used by another process (a method used in a number of contemporary designs, such as the
275:
process had largely removed this restriction. Within a decade, chips could hold more circuitry than the designers knew how to use. Traditional
2021:
573:). The three register stack contents were not preserved past certain instructions, like Jump, when the transputer could do a context switch.
1544:
RISC-style CPU with complex instructions implemented in software via traps to a rather complex superscalar design similar in concept to the
1766:
468:(I/O) tasks on some of their serial lines (hooked up to appropriate hardware) while they talked to one of their larger cousins acting as a
159:
1777:
170:
1240:, the former featuring separate address and data buses to improve performance. The T805 was also later available as a 30 MHz part.
1200:, released in September 1989, was a low-cost 20 MHz T425 derivative with 2 KB and two instead of four links, intended for the
437:
2129:
2474:
1620:
1495:(Virtual Channel Processor) which changed the links from point-to-point to a true network, allowing for the creation of any number of
966:
599:
nibble contained the one immediate constant operand, commonly used as an offset relative to the workspace (memory stack) pointer. Two
2489:– This is a PC port of the original T414 transputer emulator (called jserver) written by Julian Highfield in the mid- to late 1990s.
2344:
2281:
2123:
2075:
1941:
1795:
441:
188:
130:
440:
was used in many parts of the design to reduce area and increase speed. Unfortunately, these methods are difficult to combine with
408:
The original transputer used a very simple and rather unusual architecture to achieve a high performance in a small area. It used
1998:
Stoker, & White, A. . (2000). Mechatronic cine-film copying using transputer control. Mechatronics (Oxford), 10(7), 773–807.
1838:
increases unfeasible. These factors led the industry towards solutions little different in essence from those proposed by Inmos.
978:
592:
550:
538:
276:
2554:
2549:
1849:, are real-world incarnations of the transputer dream. They are vast assemblies of identical, relatively low-performance SoCs.
1975:
1890:
1735:
990:
942:
302:
68:
1522:
series, was later produced, using some technology developed for the T9000. The ST20 core was incorporated into chipsets for
537:
To include all this function on one chip, the transputer's core logic was simpler than most CPUs. While some have called it
1682:
1425:
982:
322:
2297:
111:
2194:
Borger, & Durdanovic, I. (1996). Correctness of compiling Occam to transputer code. Computer
Journal, 39(1), 52–92.
1589:
1048:
1021:
974:
962:
928:
To provide an easy means of prototyping, constructing and configuring multiple-transputer systems, Inmos introduced the
83:
2559:
1895:
1628:
524:
operation. The same logical system was used to communicate between programs running on one transputer, implemented as
64:
368:. Even one transputer would have all the circuitry needed to work by itself, a feature more commonly associated with
920:
2067:
1017:
389:
2096:
Stakem, Patrick H. The
Hardware and Software Architecture of the Transputer, 2011, PRB Publishing, ASIN B004OYTS1K
90:
57:
2492:
2405:
1527:
1077:
All transputers ran from an external 5 MHz clock input; this was multiplied to provide the processor clock.
372:. The intent was to allow transputers to be connected together as easily as possible, with no need for a complex
306:
1624:
1548:. The final design looked very similar to the original T4 core although some simple instruction grouping and a
1464:). For more speed the T9000 cached the top 32 locations of the stack, instead of three as in earlier versions.
1396:
1336:
1324:
1040:
986:
2034:
549:, had a limited register set, and complex memory-to-memory instructions, all of which place it firmly in the
2564:
2500:
1915:
1739:
1616:
1581:
554:
469:
268:
97:
2510:
1708:
1644:
1604:
1224:
transputer, introduced in 1987, had an extended instruction set. The most important addition was a 64-bit
1160:") plus some extra instructions from the T800 instruction set. Both the T222 and T225 ran at 20 MHz.
1081:
591:
nibble contained the 16 possible primary instruction codes, making it one of the very few commercialized
1862:
1814:
1770:
that states a
Knowledge (XXG) editor's personal feelings or presents an original argument about a topic.
1027:
The transputer's lack of support for virtual memory inhibited the porting of mainstream variants of the
284:
256:
163:
that states a
Knowledge (XXG) editor's personal feelings or presents an original argument about a topic.
1723:, is based on the T805 yielding around 4 MIPS and is scheduled to stay in production until about 2015.
79:
1599:
computing, where several vendors produced transputer-based systems in the late 1980s. These included
385:
314:
240:
232:
2208:
2148:
Kazuto Tanaka; Satoshi
Iwanami; Takeshi Yamakawa; Chikara Fukunaga; Kazuto Matsui; Takashi Yoshida.
908:
211:
1842:
1612:
1585:
1225:
1056:
517:
1384:
1372:
1360:
1981:
1728:
1720:
1712:
1686:
1669:
such as the ProVision 100 system made by Division Limited of Bristol, featuring a combination of
1596:
1545:
1515:
1285:
994:
code could watch the serial ports for I/O, and would automatically sleep when there was no data.
353:
334:
272:
228:
1623:
Project. Also, the Data Acquisition and Second Level Trigger systems of the High Energy Physics
1584:(MIPS) at 20 MHz). This was excellent performance for the early 1980s, but by the time the
484:
Transputers could boot from memory, as is the case for most computers, but could also be booted
333:
The transputer was the first general purpose microprocessor designed specifically to be used in
2271:
1958:
Hey, Anthony J. G. (1990-01-01). "Supercomputing with transputers---past, present and future".
318:
2277:
2119:
2071:
2059:
2017:
1971:
1945:
1937:
1822:
1289:
429:
365:
310:
279:(CISC) designs were reaching a performance plateau, and it wasn't clear it could be overcome.
2149:
2106:
1306:(SoC). It was this design that was to form part of TV-toy. The project was canceled in 1985.
760:
The first 16 'secondary' zero-operand instructions (using the OPR primary instruction) were:
1963:
1694:
1651:
1640:
1600:
1573:
1444:
Inmos improved on the performance of the T8 series transputers with the introduction of the
1302:
1272:
1136:, which lacked the scheduler and DMA-controlled block transfer on the links. At launch, the
1099:
1092:
970:
417:
397:
288:
1809:
and issuing multiple independent instructions to different execution units. This is termed
1091:
Transputer variants (except the cancelled T9000) can be categorised into three groups: the
305:
and telecommunications consultant Robert Milne. In 1990, May received an Honorary DSc from
2525:
Directory of ex-Inmos employees, plus photos and general info. Maintained by Ken Heddings.
2504:
1738:
2 (HETE-2) spacecraft used 4× T805 transputers and 8× DSP56001 yielding about 100 million
1666:
1475:
The T9000 used a five-stage pipeline for even more speed. An interesting addition was the
1250:
Inmos also produced a variety of support chips for the transputer processors, such as the
1201:
1071:
639:
Load local pointer – load a workspace-relative pointer onto the top of the register stack
485:
373:
369:
295:
2012:
541:(RISC) due to its rather sparse nature, and because that was then a desirable marketing
104:
2507:– A portable runtime for occam-pi and other languages based on the transputer bytecode.
1113:
1085:
1002:
566:
521:
513:
499:
The system also included the 'special' code lengths of 0 and 1 which were reserved for
248:
224:
1650:
The German company Jäger Messtechnik used transputers for their early ADwin real-time
1424:
TPCORE is an implementation of the transputer, including the os-links, that runs in a
1262:"link adapters" which allowed transputer links to be interfaced to an 8-bit data bus.
464:. A hypothetical desktop machine might have two of the "low end" transputers handling
2543:
2115:
1936:, James G. Williams (eds.) (1998) "Encyclopedia of Computer Science and Technology",
1826:
1639:
The parallel processing abilities of the transputer were put to use commercially for
1229:
933:
500:
493:
2486:
1491:
serial interconnect standard. The T9000 also added link routing hardware called the
1985:
1821:
Nevertheless, the model of cooperating concurrent processors can still be found in
946:
465:
433:
381:
235:
links to exchange data with other transputers. They were designed and produced by
2232:
2161:
2460:
2377:
2346:
Parallel Implementation of a Virtual Reality System on a Transputer Architecture
2258:
2245:
1999:
1810:
1674:
1577:
1523:
1453:
1044:
997:
The initial Occam development environment for the transputer was the Inmos D700
938:
456:
377:
46:
17:
1569:
consideration. Here, even the T2s were too powerful and costly for most users.
1456:
support. Unlike the earlier models, the T9000 had a true 16 KB high-speed
647:
Prefix – general way to increase lower nibble of following primary instruction
392:(RTOS) were all built in. In this way, the last of the transputers were single
2455:
2304:
1933:
1835:
1670:
1153:
932:(TRAnsputer Module) standard in 1987. A TRAM was essentially a building block
576:
The transputer instruction set consisted of 8-bit instructions assembled from
424:
357:
346:
35:
31:
1841:
Some of the most powerful supercomputers in the world, based on designs from
679:
Negative prefix – general way to negate (and possibly increase) lower nibble
2534:
2441:
2174:
1900:
1846:
1488:
1457:
1212:
1168:
1124:
1032:
546:
447:
Prentice-Hall published a book on the general principles of the transputer.
409:
1960:
Proceedings of the 4th international conference on Supercomputing - ICS '90
203:
2480:
961:
Transputers were intended to be programmed using the programming language
2195:
1967:
1885:
1866:
1608:
1180:
employed the equivalent of 900,000 transistors and was fabricated with a
1148:, with on-chip RAM expanded from 2 KB to 4 KB, and, later, the
1110:
663:
Load constant – load constant operand onto the top of the register stack
542:
259:, several of which have re-emerged in different forms in modern systems.
2516:
2465:
1436:
727:
Equals constant – test if top of register stack equals constant operand
2273:
Virtual Channels for Deadlock-Free Communication in Transputer Networks
1873:
1704:
1681:
HSP processors, together with T805 or T425 transputers, implementing a
1678:
1560:
1467:
1013:
581:
570:
244:
1690:
1580:
field, the transputer was fairly fast (operating at about 10 million
1228:(FPU) and three added registers for floating point, implementing the
1052:
1012:
Implementations of more mainstream programming languages, such as C,
950:
600:
584:
577:
413:
231:. To support this, each transputer had its own integrated memory and
1067:
The first transputers were announced in 1983 and released in 1984.
2175:"Inmos Technical Note 29: Dual-In-Line Transputer Modules (TRAMs)"
2150:"The Design and Performance of SpaceWire Router-network using CSP"
1910:
1905:
1559:
1466:
1435:
1036:
919:
907:
655:
Load non-local – load a value offset from address at top of stack
236:
210:
202:
2497:
2276:. 1993 World Transputer Congress. Aachen, Germany. p. 1047.
1055:, was also designed specifically for multi-transputer systems by
1854:
1716:
1632:
1540:
1028:
671:
Load non-local pointer – load address, offset from top of stack
364:
The transputer had large on chip memory making it essentially a
711:
Conditional jump – depending on value at top of register stack
1749:
1698:
215:
IMSB008 base platform with IMSB419 and IMSB404 modules mounted
142:
40:
2010:
Fuller, Samuel H. & Millett, Lynette I., Editors (2011).
1834:
consumption, and thus heat dissipation needs, render further
1192:(in 20, 25, and 30 MHz varieties), which also added the
695:
Add constant – add constant operand to top of register stack
743:
Store non-local – store at address offset from top of stack
301:
The first transputer designs were due to computer scientist
1767:
personal reflection, personal essay, or argumentative essay
444:
scan testing so they fell out of favour for later designs.
160:
personal reflection, personal essay, or argumentative essay
2064:
The Microprocessor and Its Application: An Advanced Course
1876:, UK, as a hub for microelectronic design and innovation.
953:. TRAM links operate at 10 Mbit/s or 20 Mbit/s.
825:
General call – swap top of stack and instruction pointer
2522:
2470:
1773:
166:
2473:
A group applying the principles of transputers (e.g.,
2328:
Edmunds, Nick (July 1993). "When two worlds collide".
735:
Store local – store at constant offset from workspace
1440:
T9000 Transputer with lid removed to show silicon die
1665:
The transputer also appeared in products related to
1196:
breakpoint support and extra T800 instructions. The
719:
Adjust workspace – add operand to workspace pointer
703:
Subroutine call – push instruction pointer and jump
631:
Jump – add immediate operand to instruction pointer
321:, then a leading engineer at Inmos, was awarded the
1595:The transputer was more successful in the field of
71:. Unsourced material may be challenged and removed.
27:
Series of pioneering microprocessors from the 1980s
309:, followed in 1991 by his election as a Fellow of
2531:winners from 1959 to 2009, Design Council website
2454:• SUPERNODE - EU Project Esprit-1085 (1985-1988)
751:Operate – general way to extend instruction set
614:The 16 'primary' one-operand instructions were:
496:to the transputer connected to the hard drives.
388:(RAM), a RAM controller, bus support and even a
2430:Asynchronous Polynomial Zero-Finding Algorithms
849:Greater than – the only comparison instruction
777:Reverse – swap two top items of register stack
416:were used as the entry points to the microcode
1471:Uncut silicon wafer of Inmos T9000 transputers
1300:(SOS) devices, now termed and better known as
687:Load local – load value offset from workspace
2432:". Parallel Computing 17, pp. 673-681. (1991)
2000:https://doi.org/10.1016/S0957-4158(99)00043-4
325:in 1987 for his work on the T414 transputer.
8:
2466:Ram Meenakshisundaram's Transputer Home Page
2207:Anning, Nick; Hebditch, David (1986-03-20).
1962:. New York, NY, USA: ACM. pp. 479–489.
455:The basic design of the transputer included
313:and the award of the Patterson Medal of the
2259:"Communication Interface US patent 5341371"
2058:Barron, Iann M. (1978). D. Aspinall (ed.).
2233:"Communicating Process Architectures 2004"
1872:The transputer and Inmos helped establish
2270:Harald W. Wabnig (20–22 September 1993).
1796:Learn how and when to remove this message
1643:by the world's largest printing company,
981:designs were built to run languages like
189:Learn how and when to remove this message
131:Learn how and when to remove this message
2298:"ADwin Fast Real-Time Automation System"
2144:
2142:
2016:, CSTB, National Academic Press, p. 84.
1288:and was joint project between Inmos and
1211:
1167:
1132:The prototype 16-bit transputer was the
1123:
762:
616:
1926:
1414:STMicroelectronics IMST805 (Inmos T805)
1354:STMicroelectronics IMST225 (Inmos T225)
1317:
1156:support (by extending the instruction "
1047:) were produced. An advanced Unix-like
432:(PLL). The internal clock actually had
2519:– Documents and more about transputer.
2511:The Kent Retargettable occam compiler.
2196:https://doi.org/10.1093/comjnl/39.1.52
1615:'s Bristol Transputer Centre and the
1552:were added to help with performance.
977:specifically, more than contemporary
384:had to be supplied, but little else:
7:
1869:Epiphany architecture, Tilera, etc.
1487:, and later formed the basis of the
897:Output word – send one-word message
889:Output byte – send one-byte message
69:adding citations to reliable sources
2498:The Transterpreter virtual machine.
2035:"The Prince Philip Designers Prize"
2013:The Future of Computing Performance
1946:"The Transputer Family of Products"
1719:and used by satellites such as the
2535:HETE-2 Spacecraft internal systems
2475:communicating sequential processes
1621:Edinburgh Concurrent Supercomputer
1031:operating system, though ports of
973:. The transputer was built to run
967:communicating sequential processes
349:had been used in earlier designs.
25:
1685:that could then be accessed as a
1603:(founded by ex-Inmos employees),
1319:T2, T4, and T8 series transputers
1080:The transputer did not include a
593:minimal instruction set computers
442:automatic test pattern generation
267:In the early 1980s, conventional
2135:from the original on 2022-10-09.
1754:
1564:Transputer-based computer (left)
1503:32-way crossbar switch, and the
1407:
1395:
1383:
1371:
1359:
1347:
1335:
1323:
539:reduced instruction set computer
277:complex instruction set computer
147:
45:
2359:from the original on 2022-10-09
941:for various host buses such as
937:Inmos produced a range of TRAM
56:needs additional citations for
2209:"New chip displays its powers"
2024:Retrieved on November 2, 2016.
1891:David May (computer scientist)
1736:High Energy Transient Explorer
1176:Launched in October 1985, the
1070:In keeping with their role as
943:Industry Standard Architecture
1:
2529:Prince Philip Designers Prize
2477:(CSP)) in other environments.
2428:T.L. Freeman and M.K. Bane, "
2399:"The Design of Space Systems"
1426:field-programmable gate array
999:Transputer Development System
565:. This allowed for very fast
361:performance of the machines.
323:Prince Philip Designers Prize
227:from the 1980s, intended for
2487:PC-based Transputer emulator
2177:. Transputer.net. 2008-07-04
1590:Atari Transputer Workstation
1049:distributed operating system
553:camp. Unlike register-heavy
2108:Transputer Reference Manual
1896:Ease (programming language)
1629:Hadron Elektron Ring Anlage
1254:32-way link switch and the
1035:operating systems (such as
434:four non-overlapping phases
2581:
2343:Bangay, Sean (July 1993).
2068:Cambridge University Press
394:Reusable Micro Cores (RMC)
390:real-time operating system
223:is a series of pioneering
29:
1528:Global Positioning System
393:
307:University of Southampton
2513:– The occam-pi compiler.
2244:Inmos T9000 CPU patent,
1818:task-level parallelism.
833:Input – receive message
269:central processing units
30:Not to be confused with
2493:Transputers can be fun.
2330:Personal Computer World
1916:Meiko Computing Surface
1742:(MIPS) of performance.
1740:instructions per second
1645:RR Donnelley & Sons
1617:University of Edinburgh
1582:instructions per second
1152:. This added debugging-
1105:series, and the 32-bit
2555:32-bit microprocessors
2550:16-bit microprocessors
2378:"The Myriade Platform"
2257:Inmos DS Link patent,
1948:, by Hamid R. Arabnia.
1825:systems that dominate
1776:by rewriting it in an
1711:platform developed by
1709:miniaturized satellite
1654:and control products.
1605:Floating Point Systems
1565:
1472:
1441:
1220:The second-generation
1217:
1173:
1129:
1082:memory management unit
925:
917:
865:Output – send message
486:over its network links
216:
208:
169:by rewriting it in an
2352:. Rhodes University.
1815:speculative execution
1563:
1470:
1439:
1215:
1171:
1127:
923:
911:
526:virtual network links
396:in the then emerging
380:. Power and a simple
257:computer architecture
214:
206:
1968:10.1145/77726.255192
1727:role in the move to
1530:(GPS) applications.
386:random-access memory
315:Institute of Physics
233:serial communication
207:T414 transputer chip
65:improve this article
2481:Transputer emulator
2246:"US patent 5742783"
1861:(NoC), such as the
1843:Columbia University
1631:(HERA) collider at
1627:Experiment for the
1613:Bristol Polytechnic
1586:floating-point unit
1402:Inmos T800, PREQUAL
1342:Inmos T222, PREQUAL
1330:Inmos T212, PREQUAL
1226:floating-point unit
1109:series with 64-bit
1057:Perihelion Software
366:processor-in-memory
2560:Parallel computing
2503:2017-03-03 at the
2461:The Transputer FAQ
2039:The Design Council
1778:encyclopedic style
1765:is written like a
1729:exascale computing
1713:Astrium Satellites
1597:massively parallel
1566:
1546:Tomasulo algorithm
1516:STMicroelectronics
1473:
1442:
1298:systems on silicon
1286:video game console
1218:
1208:T8: floating point
1174:
1130:
989:. Occam supported
926:
924:Selection of TRAMs
918:
354:channel controller
335:parallel computing
229:parallel computing
217:
209:
171:encyclopedic style
158:is written like a
2442:HETE-2 Spacecraft
2022:978-0-309-15951-7
1859:network on a chip
1845:and built as IBM
1823:cluster computing
1806:
1805:
1798:
1290:Sinclair Research
901:
900:
755:
754:
567:context switching
545:, it was heavily
529:an OS inside it.
430:phase-locked loop
311:The Royal Society
289:operating systems
243:company based in
199:
198:
191:
141:
140:
133:
115:
16:(Redirected from
2572:
2444:
2439:
2433:
2426:
2420:
2419:
2417:
2416:
2410:
2404:. Archived from
2403:
2397:David Chemouil.
2394:
2388:
2387:
2385:
2384:
2374:
2368:
2367:
2365:
2364:
2358:
2351:
2340:
2334:
2333:
2325:
2319:
2318:
2316:
2315:
2309:
2303:. Archived from
2302:
2294:
2288:
2287:
2267:
2261:
2255:
2249:
2242:
2236:
2230:
2224:
2223:
2221:
2220:
2215:. pp. 43–46
2204:
2198:
2192:
2186:
2185:
2183:
2182:
2171:
2165:
2159:
2153:
2146:
2137:
2136:
2134:
2113:
2103:
2097:
2094:
2088:
2087:
2085:
2084:
2060:"The Transputer"
2055:
2049:
2048:
2046:
2045:
2031:
2025:
2008:
2002:
1996:
1990:
1989:
1955:
1949:
1931:
1801:
1794:
1790:
1787:
1781:
1758:
1757:
1750:
1695:Sun SPARCstation
1683:rendering engine
1652:data acquisition
1641:image processing
1601:Meiko Scientific
1574:computer desktop
1497:virtual channels
1411:
1399:
1387:
1375:
1363:
1351:
1339:
1327:
1303:system on a chip
1273:system on a chip
1202:embedded systems
1195:
1183:
1159:
1007:Occam 2 Toolsets
971:process calculus
763:
617:
610:
564:
560:
418:read-only memory
370:microcontrollers
194:
187:
183:
180:
174:
151:
150:
143:
136:
129:
125:
122:
116:
114:
73:
49:
41:
21:
18:INMOS transputer
2580:
2579:
2575:
2574:
2573:
2571:
2570:
2569:
2540:
2539:
2517:transputer.net.
2505:Wayback Machine
2452:
2447:
2440:
2436:
2427:
2423:
2414:
2412:
2408:
2401:
2396:
2395:
2391:
2382:
2380:
2376:
2375:
2371:
2362:
2360:
2356:
2349:
2342:
2341:
2337:
2327:
2326:
2322:
2313:
2311:
2307:
2300:
2296:
2295:
2291:
2284:
2269:
2268:
2264:
2256:
2252:
2243:
2239:
2231:
2227:
2218:
2216:
2206:
2205:
2201:
2193:
2189:
2180:
2178:
2173:
2172:
2168:
2160:
2156:
2147:
2140:
2132:
2126:
2111:
2105:
2104:
2100:
2095:
2091:
2082:
2080:
2078:
2057:
2056:
2052:
2043:
2041:
2033:
2032:
2028:
2009:
2005:
1997:
1993:
1978:
1957:
1956:
1952:
1932:
1928:
1924:
1882:
1802:
1791:
1785:
1782:
1774:help improve it
1771:
1759:
1755:
1748:
1667:virtual reality
1558:
1550:workspace cache
1536:
1434:
1422:
1415:
1412:
1403:
1400:
1391:
1388:
1379:
1376:
1367:
1364:
1355:
1352:
1343:
1340:
1331:
1328:
1312:
1268:
1210:
1193:
1181:
1166:
1157:
1122:
1072:microcontroller
1065:
1063:Implementations
965:, based on the
959:
906:
857:Word subscript
793:Byte subscript
608:
562:
558:
555:load/store RISC
535:
533:Instruction set
514:priority levels
509:
482:
453:
406:
341:istor" and "com
331:
296:multiprocessing
265:
225:microprocessors
195:
184:
178:
175:
167:help improve it
164:
152:
148:
137:
126:
120:
117:
74:
72:
62:
50:
39:
28:
23:
22:
15:
12:
11:
5:
2578:
2576:
2568:
2567:
2565:Stack machines
2562:
2557:
2552:
2542:
2541:
2538:
2537:
2532:
2526:
2520:
2514:
2508:
2495:
2490:
2484:
2478:
2468:
2463:
2451:
2450:External links
2448:
2446:
2445:
2434:
2421:
2389:
2369:
2335:
2320:
2289:
2282:
2262:
2250:
2237:
2225:
2199:
2187:
2166:
2154:
2138:
2124:
2098:
2089:
2076:
2050:
2026:
2003:
1991:
1976:
1950:
1925:
1923:
1920:
1919:
1918:
1913:
1908:
1903:
1898:
1893:
1888:
1881:
1878:
1863:Cell processor
1804:
1803:
1762:
1760:
1753:
1747:
1744:
1557:
1554:
1535:
1532:
1507:link adapter.
1433:
1430:
1421:
1418:
1417:
1416:
1413:
1406:
1404:
1401:
1394:
1392:
1389:
1382:
1380:
1377:
1370:
1368:
1365:
1358:
1356:
1353:
1346:
1344:
1341:
1334:
1332:
1329:
1322:
1320:
1311:
1308:
1267:
1264:
1216:Inmos T805 die
1209:
1206:
1182:1.5 micrometre
1172:Inmos T425 die
1165:
1162:
1128:Inmos T225 die
1121:
1118:
1114:floating-point
1086:virtual memory
1064:
1061:
1003:folding editor
958:
955:
905:
902:
899:
898:
895:
891:
890:
887:
883:
882:
881:Start process
879:
875:
874:
871:
867:
866:
863:
859:
858:
855:
851:
850:
847:
843:
842:
839:
835:
834:
831:
827:
826:
823:
819:
818:
815:
811:
810:
807:
803:
802:
799:
795:
794:
791:
787:
786:
783:
779:
778:
775:
771:
770:
767:
753:
752:
749:
745:
744:
741:
737:
736:
733:
729:
728:
725:
721:
720:
717:
713:
712:
709:
705:
704:
701:
697:
696:
693:
689:
688:
685:
681:
680:
677:
673:
672:
669:
665:
664:
661:
657:
656:
653:
649:
648:
645:
641:
640:
637:
633:
632:
629:
625:
624:
621:
534:
531:
522:multiprocessor
508:
505:
481:
478:
452:
449:
405:
402:
330:
327:
264:
261:
249:United Kingdom
197:
196:
155:
153:
146:
139:
138:
53:
51:
44:
26:
24:
14:
13:
10:
9:
6:
4:
3:
2:
2577:
2566:
2563:
2561:
2558:
2556:
2553:
2551:
2548:
2547:
2545:
2536:
2533:
2530:
2527:
2524:
2521:
2518:
2515:
2512:
2509:
2506:
2502:
2499:
2496:
2494:
2491:
2488:
2485:
2482:
2479:
2476:
2472:
2469:
2467:
2464:
2462:
2459:
2458:
2457:
2456:
2449:
2443:
2438:
2435:
2431:
2425:
2422:
2411:on 2012-03-21
2407:
2400:
2393:
2390:
2379:
2373:
2370:
2355:
2348:
2347:
2339:
2336:
2331:
2324:
2321:
2310:on 2012-04-25
2306:
2299:
2293:
2290:
2285:
2283:9789051991406
2279:
2275:
2274:
2266:
2263:
2260:
2254:
2251:
2247:
2241:
2238:
2234:
2229:
2226:
2214:
2213:New Scientist
2210:
2203:
2200:
2197:
2191:
2188:
2176:
2170:
2167:
2163:
2158:
2155:
2151:
2145:
2143:
2139:
2131:
2127:
2125:0-13-929001-X
2121:
2117:
2116:Prentice-Hall
2110:
2109:
2102:
2099:
2093:
2090:
2079:
2077:0-521-22241-9
2073:
2069:
2065:
2061:
2054:
2051:
2040:
2036:
2030:
2027:
2023:
2019:
2015:
2014:
2007:
2004:
2001:
1995:
1992:
1987:
1983:
1979:
1973:
1969:
1965:
1961:
1954:
1951:
1947:
1943:
1942:0-8247-2292-2
1939:
1935:
1930:
1927:
1921:
1917:
1914:
1912:
1909:
1907:
1904:
1902:
1899:
1897:
1894:
1892:
1889:
1887:
1884:
1883:
1879:
1877:
1875:
1870:
1868:
1864:
1860:
1856:
1850:
1848:
1844:
1839:
1837:
1831:
1828:
1827:supercomputer
1824:
1819:
1816:
1812:
1800:
1797:
1789:
1786:February 2019
1779:
1775:
1769:
1768:
1763:This section
1761:
1752:
1751:
1745:
1743:
1741:
1737:
1732:
1730:
1724:
1722:
1718:
1714:
1710:
1707:, a European
1706:
1702:
1700:
1696:
1692:
1688:
1684:
1680:
1676:
1672:
1668:
1663:
1659:
1655:
1653:
1648:
1646:
1642:
1637:
1634:
1630:
1626:
1622:
1618:
1614:
1610:
1606:
1602:
1598:
1593:
1591:
1587:
1583:
1579:
1575:
1570:
1562:
1555:
1553:
1551:
1547:
1542:
1533:
1531:
1529:
1525:
1521:
1517:
1512:
1508:
1506:
1502:
1498:
1494:
1490:
1486:
1481:
1478:
1469:
1465:
1463:
1459:
1455:
1451:
1447:
1438:
1431:
1429:
1427:
1419:
1410:
1405:
1398:
1393:
1386:
1381:
1374:
1369:
1362:
1357:
1350:
1345:
1338:
1333:
1326:
1321:
1318:
1316:
1309:
1307:
1305:
1304:
1299:
1293:
1291:
1287:
1283:
1279:
1275:
1274:
1265:
1263:
1261:
1257:
1253:
1248:
1246:
1241:
1239:
1235:
1231:
1230:IEEE 754-1985
1227:
1223:
1214:
1207:
1205:
1203:
1199:
1191:
1187:
1179:
1170:
1163:
1161:
1155:
1151:
1147:
1143:
1139:
1135:
1126:
1119:
1117:
1115:
1112:
1108:
1104:
1101:
1097:
1094:
1089:
1087:
1083:
1078:
1075:
1073:
1068:
1062:
1060:
1058:
1054:
1050:
1046:
1042:
1038:
1034:
1030:
1025:
1023:
1019:
1015:
1010:
1008:
1004:
1000:
995:
992:
988:
984:
980:
976:
972:
968:
964:
956:
954:
952:
948:
944:
940:
935:
934:daughterboard
931:
922:
915:
910:
903:
896:
893:
892:
888:
885:
884:
880:
877:
876:
872:
869:
868:
864:
861:
860:
856:
853:
852:
848:
845:
844:
840:
837:
836:
832:
829:
828:
824:
821:
820:
816:
813:
812:
808:
805:
804:
800:
797:
796:
792:
789:
788:
784:
781:
780:
776:
773:
772:
768:
765:
764:
761:
758:
750:
747:
746:
742:
739:
738:
734:
731:
730:
726:
723:
722:
718:
715:
714:
710:
707:
706:
702:
699:
698:
694:
691:
690:
686:
683:
682:
678:
675:
674:
670:
667:
666:
662:
659:
658:
654:
651:
650:
646:
643:
642:
638:
635:
634:
630:
627:
626:
622:
619:
618:
615:
612:
606:
602:
598:
594:
590:
586:
583:
579:
574:
572:
568:
556:
552:
548:
544:
540:
532:
530:
527:
523:
519:
515:
506:
504:
502:
501:PEEK and POKE
497:
495:
494:device driver
489:
487:
479:
477:
473:
471:
467:
463:
458:
450:
448:
445:
443:
439:
438:Dynamic logic
435:
431:
426:
421:
419:
415:
411:
403:
401:
399:
395:
391:
387:
383:
379:
375:
371:
367:
362:
359:
355:
350:
348:
344:
340:
336:
328:
326:
324:
320:
316:
312:
308:
304:
299:
297:
292:
290:
286:
280:
278:
274:
270:
262:
260:
258:
252:
250:
246:
242:
241:semiconductor
238:
234:
230:
226:
222:
213:
205:
201:
193:
190:
182:
179:December 2023
172:
168:
162:
161:
156:This article
154:
145:
144:
135:
132:
124:
121:February 2008
113:
110:
106:
103:
99:
96:
92:
89:
85:
82: –
81:
77:
76:Find sources:
70:
66:
60:
59:
54:This article
52:
48:
43:
42:
37:
33:
19:
2523:Inmos alumni
2453:
2437:
2429:
2424:
2413:. Retrieved
2406:the original
2392:
2381:. Retrieved
2372:
2361:. Retrieved
2345:
2338:
2329:
2323:
2312:. Retrieved
2305:the original
2292:
2272:
2265:
2253:
2240:
2228:
2217:. Retrieved
2212:
2202:
2190:
2179:. Retrieved
2169:
2157:
2107:
2101:
2092:
2081:. Retrieved
2063:
2053:
2042:. Retrieved
2038:
2029:
2011:
2006:
1994:
1959:
1953:
1929:
1871:
1858:
1851:
1840:
1832:
1820:
1807:
1792:
1783:
1764:
1733:
1725:
1703:
1664:
1660:
1656:
1649:
1638:
1594:
1571:
1567:
1549:
1537:
1519:
1513:
1509:
1504:
1500:
1496:
1492:
1484:
1482:
1476:
1474:
1461:
1449:
1448:(code-named
1445:
1443:
1423:
1313:
1301:
1297:
1294:
1281:
1277:
1271:
1269:
1259:
1255:
1251:
1249:
1244:
1243:An enhanced
1242:
1237:
1233:
1221:
1219:
1197:
1189:
1185:
1177:
1175:
1149:
1145:
1141:
1137:
1133:
1131:
1106:
1102:
1098:series, the
1095:
1090:
1079:
1076:
1069:
1066:
1026:
1011:
1006:
998:
996:
960:
947:MicroChannel
939:motherboards
929:
927:
913:
801:End process
769:Description
759:
756:
623:Description
613:
604:
596:
588:
575:
536:
525:
510:
498:
490:
483:
474:
472:on another.
466:input/output
461:
457:serial links
454:
446:
422:
407:
404:Architecture
382:clock signal
363:
351:
342:
338:
332:
300:
293:
285:multitasking
281:
266:
253:
220:
218:
200:
185:
176:
157:
127:
118:
108:
101:
94:
87:
80:"Transputer"
75:
63:Please help
58:verification
55:
1811:superscalar
1578:workstation
1524:set-top box
1454:superscalar
1084:(MMU) or a
1045:Whitesmiths
991:concurrency
916:motherboard
904:Development
809:Difference
563:Store Local
516:to improve
378:motherboard
358:disk drives
347:transistors
273:fabrication
2544:Categories
2415:2011-08-22
2383:2011-08-22
2363:2012-05-06
2314:2011-11-16
2219:2022-06-22
2181:2013-10-12
2083:2009-05-18
2044:2019-12-01
1977:0897913698
1934:Allen Kent
1922:References
1836:clock rate
1671:Intel i860
1390:Inmos T425
1378:Inmos T414
1366:Inmos T400
1164:T4: 32-bit
1154:breakpoint
1120:T2: 16-bit
785:Load byte
559:Load Local
547:microcoded
425:clock rate
263:Background
221:transputer
91:newspapers
36:transcoder
32:transpiler
1901:IEEE 1355
1847:Blue Gene
1701:systems.
1489:IEEE 1355
1116:support.
1033:Unix-like
873:Subtract
766:Mnemonic
620:Mnemonic
518:real-time
507:Scheduler
410:microcode
319:Tony Fuge
317:in 1992.
303:David May
2501:Archived
2354:Archived
2130:Archived
2118:. 1988.
1886:Adapteva
1880:See also
1867:Adapteva
1677:/33 and
1609:Parsytec
1556:Adoption
1428:(FPGA).
1280:and the
1204:market.
1111:IEEE 754
1088:system.
957:Software
894:OUTWORD
886:OUTBYTE
841:Product
543:buzzword
400:market.
2152:. p. 2.
2070:: 343.
1986:8612995
1874:Bristol
1772:Please
1705:Myriade
1679:Toshiba
1572:In the
1485:DS-Link
1477:grouper
1014:FORTRAN
945:(ISA),
878:STARTP
605:Operate
585:nibbles
582:operand
571:TMS9900
480:Booting
414:opcodes
291:(OSs).
245:Bristol
165:Please
105:scholar
2280:
2122:
2074:
2020:
1984:
1974:
1940:
1746:Legacy
1721:Picard
1687:server
1420:TPCORE
1282:TV-toy
1100:32-bit
1093:16-bit
1053:Helios
983:Pascal
969:(CSP)
951:VMEbus
912:Empty
822:GCALL
668:LDNLP
601:prefix
595:. The
587:. The
578:opcode
329:Design
107:
100:
93:
86:
78:
2471:WoTUG
2409:(PDF)
2402:(PDF)
2357:(PDF)
2350:(PDF)
2308:(PDF)
2301:(PDF)
2133:(PDF)
2112:(PDF)
1982:S2CID
1911:iWarp
1906:Inmos
1675:80486
1458:cache
1446:T9000
1432:T9000
1043:from
1041:Idris
1037:Minix
1022:Forth
975:Occam
963:occam
949:, or
854:WSUB
838:PROD
806:DIFF
798:ENDP
790:BSUB
740:STNL
700:CALL
676:NFIX
652:LDNL
644:PFIX
636:LDLP
597:lower
589:upper
451:Links
376:, or
343:puter
339:trans
237:Inmos
112:JSTOR
98:books
2278:ISBN
2120:ISBN
2072:ISBN
2018:ISBN
1972:ISBN
1938:ISBN
1855:XMOS
1734:The
1717:CNES
1715:and
1633:DESY
1625:ZEUS
1576:and
1541:VHDL
1534:ST20
1526:and
1520:ST20
1505:C101
1501:C104
1310:T100
1278:M212
1266:T400
1260:C012
1258:and
1256:C011
1252:C004
1245:T810
1238:T805
1236:and
1234:T801
1222:T800
1198:T400
1190:T425
1186:T424
1178:T414
1150:T225
1146:T222
1142:M212
1140:and
1138:T212
1039:and
1029:Unix
979:CISC
930:TRAM
914:B008
870:SUB
862:OUT
817:Add
814:ADD
774:REV
748:OPR
732:STL
724:EQC
716:AJW
692:ADC
684:LDL
660:LDC
580:and
561:and
551:CISC
520:and
462:farm
423:The
356:for
239:, a
219:The
84:news
1964:doi
1699:VAX
1697:or
1689:by
1619:'s
1493:VCP
1462:PMI
1194:J 0
1158:J 0
1134:S43
1018:Ada
985:or
846:GT
830:IN
782:LB
708:CJ
609:Opr
470:CPU
398:SoC
374:bus
67:by
34:or
2546::
2211:.
2141:^
2128:.
2114:.
2066:.
2062:.
2037:.
1980:.
1970:.
1944:,
1865:,
1731:.
1693:,
1691:PC
1673:,
1607:,
1592:.
1450:H1
1292:.
1107:T8
1103:T4
1096:T2
1059:.
1051:,
1020:,
1016:,
1009:.
628:J
251:.
247:,
2418:.
2386:.
2366:.
2332:.
2317:.
2286:.
2248:,
2222:.
2184:.
2086:.
2047:.
1988:.
1966::
1799:)
1793:(
1788:)
1784:(
1780:.
987:C
607:(
192:)
186:(
181:)
177:(
173:.
134:)
128:(
123:)
119:(
109:·
102:·
95:·
88:·
61:.
38:.
20:)
Text is available under the Creative Commons Attribution-ShareAlike License. Additional terms may apply.
