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computer has virtual memory (where an errant program will eventually strike an invalid address). On older console computers having HLT with a value of zero would also lead to the computer immediately returning to the halted state should the operator flick the "Halt/Run" switch to "Run" with no program loaded.
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The original convention that HLT marks the end of a user program comes from computers with no operating systems. On these computers the job would end with a HLT instruction. That instruction would light the "HLT" light on the console: this light was readily apparent and often accompanied by a buzzer.
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However it is a simple optimisation to note that no special implementation is needed for HLT to operate outside Ring 0 to mark the end of the job. In this case, when the HLT instruction is run a software interrupt will be raised to mark an unauthorised use of an instruction, and control returned to
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Also of interest is the binary value of the HLT instruction. Many instruction sets ensure that the HLT instruction is a word in length with value 0. Thus a program which starts running in uninitialised memory strikes a HLT instruction and the program ends. This protection is less useful if the
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Other CPUs, such as the Z80, PDP-7, etc. have HLT instructions. The VAX, M68k, MIPS, etc. have HALT instructions. Since this article is titled HLT, not HLT (x86) or HLT (Intel), it should describe the uses of HALT instructions on CPUs besides the x86.
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The convention in many operating systems is that HLT marks the end of the execution of the user's program. Upon that HLT instruction the processor would raise a software interrupt, returning control from the user's job back to the operating system.
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This optimisation means that from reading the datasheet alone people are misled into thinking that HLT only has a use inside Ring 0. Whereas that isn't the case at all.
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the operating system. The operating system can then inspect the instruction at fault, note that it is HLT, and treat that as marking the ordinary end of the user's job.
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On many processors it is expected that HLT will be used outside of Ring 0. However no additional silicon is required to implement that.
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